V62/06604-01XE [TI]
OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS; 八路缓冲器/驱动器，具有三态输出
| 型号： | V62/06604-01XE |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS |
| 文件： | 总12页 (文件大小：510K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN74LV244A-EP
OCTAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCLS695–JANUARY 2006
FEATURES
•
Controlled Baseline
•
ESD Protection Exceeds JESD 22
– One Assembly/Test Site, One Fabrication
Site
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
•
•
Extended Temperature Performance of –55°C
to 125°C
– 1000-V Charged-Device Model (C101)
DW PACKAGE
(TOP VIEW)
Enhanced Diminishing Manufacturing
Sources (DMS) Support
•
•
•
•
•
Enhanced Product-Change Notification
1OE
1A1
2Y4
1A2
2Y3
1A3
2Y2
1A4
2Y1
GND
1
2
3
4
5
6
7
8
9
10
V
CC
20
19
18
17
16
15
14
(1)
Qualification Pedigree
2OE
1Y1
2A4
1Y2
2A3
1Y3
2-V to 5.5-V VCC Operation
Max tpd of 6.5 ns at 5 V
Typical VOLP (Output Ground Bounce)
<0.8 V at VCC = 3.3 V, TA = 25°C
•
•
•
•
Typical VOHV (Output VOH Undershoot)
>2.3 V at VCC = 3.3 V, TA = 25°C
13 2A2
12
11
1Y4
2A1
Supports Mixed-Mode Voltage Operation on
All Ports
Ioff Supports Partial-Power-Down Mode
Operation
Latch-Up Performance Exceeds 250 mA Per
JESD 17
(1) Component qualification in accordance with JEDEC and
industry standards to ensure reliable operation over an
extended temperature range. This includes, but is not limited
to, Highly Accelerated Stress Test (HAST) or biased 85/85,
temperature cycle, autoclave or unbiased HAST,
electromigration, bond intermetallic life, and mold compound
life. Such qualification testing should not be viewed as
justifying use of this component beyond specified
performance and environmental limits.
DESCRIPTION/ORDERING INFORMATION
This octal buffer/line driver is designed for 2-V to 5.5-V VCC operation.
The SN74LV244A-EP is designed specifically to improve both the performance and density of 3-state memory
address drivers, clock drivers, and bus-oriented receivers and transmitters.
The device is organized as two 4-bit line drivers with separate output-enable (OE) inputs. When OE is low, the
device passes data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance
state.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the devices when they are powered down.
ORDERING INFORMATION
TA
PACKAGE(1)
ORDERABLE PART NUMBER
TOP-SIDE MARKING
–55°C to 125°C
SOIC – DW
Reel of 2000
SN74LV244AMDWREP
LV244AMEP
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2006, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
SN74LV244A-EP
OCTAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCLS695–JANUARY 2006
FUNCTION TABLE
(EACH BUFFER)
INPUTS
OUTPUT
Y
OE
L
A
H
L
H
L
L
H
X
Z
LOGIC DIAGRAM (POSITIVE LOGIC)
1
19
1OE
2OE
2
18
16
14
12
11
13
15
17
9
7
5
3
1A1
1Y1
1Y2
1Y3
1Y4
2A1
2A2
2A3
2A4
2Y1
2Y2
2Y3
2Y4
4
1A2
6
1A3
8
1A4
Absolute Maximum Ratings(1)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX UNIT
VCC
VI
Supply voltage range
Input voltage range(2)
Voltage range applied to any output in the high-impedance or power-off state(2)
Output voltage range applied in the high or low state(2)(3)
–0.5
–0.5
–0.5
7
7
7
V
V
VO
VO
IIK
V
–0.5 VCC + 0.5
V
Input clamp current
VI < 0
–20
–50
±35
±70
mA
mA
mA
mA
IOK
IO
Output clamp current
VO < 0
Continuous output current
Continuous current through VCC or GND
Package thermal impedance(4)
Storage temperature range
VO = 0 to VCC
θJA
58 °C/W
150 °C
Tstg
–65
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
(3) This value is limited to 5.5 V maximum.
(4) The package thermal impedance is calculated in accordance with JESD 51-7.
2
SN74LV244A-EP
OCTAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCLS695–JANUARY 2006
Recommended Operating Conditions(1)
MIN
2
MAX
UNIT
VCC
Supply voltage
5.5
V
VCC = 2 V
1.5
VCC = 2.3 V to 2.7 V
VCC = 3 V to 3.6 V
VCC = 4.5 V to 5.5 V
VCC = 2 V
V
V
V
CC × 0.7
CC × 0.7
CC × 0.7
VIH
High-level input voltage
V
V
0.5
CC × 0.3
CC × 0.3
CC × 0.3
5.5
VCC = 2.3 V to 2.7 V
VCC = 3 V to 3.6 V
VCC = 4.5 V to 5.5 V
V
V
V
VIL
Low-level input voltage
VI
Input voltage
0
0
0
V
V
High or low state
3-state
VCC
5.5
VO
Output voltage
VCC = 2 V
–50
–2
µA
VCC = 2.3 V to 2.7 V
VCC = 3 V to 3.6 V
VCC = 4.5 V to 5.5 V
VCC = 2 V
IOH
High-level output current
Low-level output current
–8
mA
µA
–16
50
VCC = 2.3 V to 2.7 V
VCC = 3 V to 3.6 V
VCC = 4.5 V to 5.5 V
VCC = 2.3 V to 2.7 V
VCC = 3 V to 3.6 V
VCC = 4.5 V to 5.5 V
2
IOL
8
mA
16
200
100
20
∆t/∆v
Input transition rise or fall rate
Operating free-air temperature
ns/V
TA
–55
125
°C
(1) All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
3
SN74LV244A-EP
OCTAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCLS695–JANUARY 2006
Electrical Characteristics
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
IOH = –50 µA
VCC
2 V to 5.5 V
2.3 V
MIN
VCC – 0.1
2
TYP
MAX
UNIT
IOH = –2 mA
VOH
V
V
IOH = –8 mA
3 V
2.48
IOH = –16 mA
4.5 V
3.8
IOL = 50 µA
2 V to 5.5 V
2.3 V
0.1
0.4
0.44
0.55
±1
IOL = 2 mA
VOL
IOL = 8 mA
3 V
IOL = 16 mA
4.5 V
II
VI = 5.5 V or GND
VO = VCC or GND
VI = VCC or GND, IO = 0
VI or VO = 0 to 5.5 V
VI = VCC or GND
0 to 5.5 V
5.5 V
µA
µA
µA
µA
pF
IOZ
ICC
Ioff
Ci
±5
5.5 V
20
0
5
3.3 V
2.3
Switching Characteristics
over recommended operating free-air temperature range, VCC = 2.5 V ± 0.2 V (unless otherwise noted) (see Figure 1)
TA = 25°C
TYP
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
PARAMETER
MIN
MAX
UNIT
MIN
MAX
15.3
17.8
19.2
2
tpd
ten
A
Y
Y
Y
9.5
1
1
1
18
21
21
2
ns
ns
ns
ns
OE
OE
10.8
CL = 50 pF
tdis
13.4
tsk(o)
Switching Characteristics
over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1)
TA = 25°C
TYP
6.8
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
PARAMETER
MIN
MAX
UNIT
MIN
MAX
11.9
14.1
16
tpd
ten
A
Y
Y
Y
1
1
1
13.5
16
ns
ns
ns
ns
OE
OE
7.8
CL = 50 pF
tdis
11
18
tsk(o)
1.5
1.5
4
SN74LV244A-EP
OCTAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCLS695–JANUARY 2006
Switching Characteristics
over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
TA = 25°C
TYP
4.9
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
PARAMETER
MIN
MAX
UNIT
MIN
MAX
7.5
9.3
14.2
1
tpd
ten
A
Y
Y
Y
1
1
1
8.5
10.5
15.5
1
ns
ns
ns
ns
OE
OE
5.6
CL = 50 pF
tdis
8.8
tsk(o)
Noise Characteristics(1)
VCC = 3.3 V, CL = 50 pF, TA = 25°C
PARAMETER
Quiet output, maximum dynamic VOL
Quiet output, minimum dynamic VOL
MIN TYP MAX UNIT
VOL(P)
VOL(V)
VOH(V)
VIH(D)
VIL(D)
0.55
–0.5
2.9
V
V
V
V
V
Quiet output, minimum dynamic VOH
High-level dynamic input voltage
Low-level dynamic input voltage
2.31
0.99
(1) Characteristics are for surface-mount packages only.
Operating Characteristics
TA = 25°C
PARAMETER
TEST CONDITIONS
CL = 50 pF, f = 10 MHz
VCC
TYP UNIT
3.3 V
5 V
14
pF
16
Cpd
Power dissipation capacitance
5
SN74LV244A-EP
OCTAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCLS695–JANUARY 2006
PARAMETER MEASUREMENT INFORMATION
V
CC
S1
Open
GND
R
L
= 1 kΩ
TEST
/t
S1
From Output
Under Test
Test
Point
From Output
Under Test
t
t
Open
PLH PHL
C
L
C
L
t
/t
V
CC
PLZ PZL
(see Note A)
(see Note A)
/t
GND
PHZ PZH
Open Drain
V
CC
LOAD CIRCUIT FOR
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
3-STATE AND OPEN-DRAIN OUTPUTS
V
CC
50% V
CC
Timing Input
0 V
t
w
t
h
t
su
V
CC
V
CC
50% V
50% V
CC
Input
Input
CC
50% V
50% V
CC
Data Input
CC
0 V
0 V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
V
V
CC
CC
Output
Control
50% V
50% V
50% V
50% V
CC
CC
CC
CC
0 V
0 V
t
t
PZL
PLZ
t
t
t
PHL
PLH
Output
Waveform 1
≈V
V
CC
OH
In-Phase
Output
50% V
50% V
CC
50% V
CC
CC
S1 at V
CC
V
V
+ 0.3 V
OL
V
OL
V
OL
(see Note B)
t
t
t
PZH
PHZ
PHL
PLH
Output
Waveform 2
S1 at GND
V
V
OH
OL
OH
Out-of-Phase
Output
− 0.3 V
OH
50% V
50% V
50% V
CC
CC
CC
V
≈0 V
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. C includes probe and jig capacitance.
L
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, Z = 50 Ω, t ≤ 3 ns, t ≤ 3 ns.
O
r
f
D. The outputs are measured one at a time, with one input transition per measurement.
E.
F.
G.
t
t
t
and t
and t
and t
are the same as t
.
dis
.
PLZ
PZL
PHL
PHZ
are the same as t
PZH
en
are the same as t .
PLH pd
H. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuits and Voltage Waveforms
6
PACKAGE OPTION ADDENDUM
www.ti.com
18-Sep-2008
PACKAGING INFORMATION
Orderable Device
SN74LV244AMDWREP
V62/06604-01XE
Status (1)
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOIC
DW
20
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
DW
20
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN74LV244A-EP :
Catalog: SN74LV244A
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
SN74LV244AMDWREP
SOIC
DW
20
2000
330.0
24.4
10.8
13.0
2.7
12.0
24.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SOIC DW 20
SPQ
Length (mm) Width (mm) Height (mm)
367.0 367.0 45.0
SN74LV244AMDWREP
2000
Pack Materials-Page 2
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