V62/18616-01XE-T [TI]
采用塑料封装的耐辐射、2.2V 至 20V 输入、1A 可调节 LDO 稳压器 | DCQ | 6 | -55 to 125;型号: | V62/18616-01XE-T |
厂家: | TEXAS INSTRUMENTS |
描述: | 采用塑料封装的耐辐射、2.2V 至 20V 输入、1A 可调节 LDO 稳压器 | DCQ | 6 | -55 to 125 稳压器 |
文件: | 总31页 (文件大小:2269K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
TPS73801-SEP
ZHCSJ39A –DECEMBER 2018 –REVISED MAY 2021
TPS73801-SEP 1A 采用增强型航天塑料的
低噪声快速瞬态响应低压降稳压器
1 特性
2 应用
• VID V62/18616
• 耐辐射
• 支持近地轨道(LEO) 航天应用
• 用于射频、VCO、接收器和放大器的耐辐射低噪声
线性稳压器电源
• 洁净模拟电源要求
– SEL、SEB 和SEGR 对于
LET 的抗扰度高达43MeV-cm2/mg
– SET 和SEFI 的
• 航天卫星有效载荷
• 命令和数据处理(C&DH)
• 光学成像有效载荷
• 雷达成像有效载荷
LET 特征值高达43MeV-cm2/mg
– 每个晶圆批次的保障TID 高达
20krad(Si)
• 卫星电力系统(EPS)
– TID 特征值高达50krad(Si)
• 增强型航天塑料
3 说明
– Au 键合线和NiPdAu 铅涂层
– 采用增强型塑封实现低释气
– 制造、组装和测试一体化基地
– 延长了产品生命周期
– 延长了产品变更通知周期
– 产品可追溯性
TPS73801-SEP 是一款针对快速瞬态响应进行了优化
的低压降 (LDO) 稳压器。该器件可提高 1A 的输出电
流(压降为 300mV)。工作静态电流为 1mA,在关断
时下降至小于 1µA。与许多其他稳压器相比,静态电
流受到很好的控制,在压降时不上升。除了快速瞬态响
应,TPS73801-SEP 稳压器还有很低的输出噪声,因
此非常适合灵敏射频电源应用。
• 针对快速瞬态响应进行了优化
• 输出电流:1A
• 压降电压:300mV
输出电压范围是 1.21V 至 20V,与低至 10µF 的输出
电容器搭配使用时可保持稳定。使用小型陶瓷电容器可
无需额外的 ESR。内部保护电路包括反向电池保护、
电流限制、热限制和反向电流保护。TPS73801-SEP
稳压器可采用 6 引脚 TO-223 (DCQ) 封装,提供可调
的1.21V 基准电压。
• 低噪声:45μVRMS(10Hz 至100kHz)
• 1mA 静态电流
• 无需保护二极管
• 压降中的受控静态电流
• 可调节输出电压:1.21V 至20V
• 关断模式下静态电流小于1µA
• 与10µF 输出电容器搭配使用时可保持稳定
• 与陶瓷电容器搭配使用时可保持稳定
• 反向电池保护
器件信息
器件型号(1)
等级
封装
TPS73801MDCQTPSEP
TPS73801MDCQPSEP
SOT-223 (6)
6.55mm × 7.26mm
质量= 119.8mg(2)
20krad(Si)
RLAT
• 无反向电流
• 热限制
(1) 如需了解所有可用封装,请参阅数据表末尾的可订购产品附
VOUT
IN
OUT
录。
(2) 质量误差在±10% 以内。
+
VIN
R2
R1
TPS73801-SEP
FB
EN
GND
简化版原理图
本文档旨在为方便起见,提供有关TI 产品中文版本的信息,以确认产品的概要。有关适用的官方英文版本的最新信息,请访问
www.ti.com,其内容始终优先。TI 不保证翻译的准确性和有效性。在实际设计之前,请务必参考最新版本的英文版本。
English Data Sheet: SLVSER5
TPS73801-SEP
ZHCSJ39A –DECEMBER 2018 –REVISED MAY 2021
www.ti.com.cn
Table of Contents
8 Application and Implementation..................................14
8.1 Application Information............................................. 14
8.2 Typical Application.................................................... 14
9 Power Supply Recommendations................................17
10 Layout...........................................................................18
10.1 Layout Guidelines................................................... 18
10.2 Layout Example...................................................... 18
10.3 Thermal Considerations..........................................18
11 Device and Documentation Support..........................20
11.1 Receiving Notification of Documentation Updates..20
11.2 支持资源..................................................................20
11.3 Trademarks............................................................. 20
11.4 Electrostatic Discharge Caution..............................20
11.5 Glossary..................................................................20
12 Mechanical, Packaging, and Orderable
1 特性................................................................................... 1
2 应用................................................................................... 1
3 说明................................................................................... 1
4 Revision History.............................................................. 2
5 Pin Configuration and Functions...................................3
6 Specifications.................................................................. 4
6.1 Absolute Maximum Ratings........................................ 4
6.2 ESD Ratings............................................................... 4
6.3 Recommended Operating Conditions.........................4
6.4 Thermal Information....................................................4
6.5 Electrical Characteristics.............................................5
6.6 Typical Characteristics................................................7
7 Detailed Description......................................................11
7.1 Overview................................................................... 11
7.2 Functional Block Diagram......................................... 11
7.3 Feature Description...................................................11
7.4 Device Functional Modes..........................................13
Information.................................................................... 21
4 Revision History
注:以前版本的页码可能与当前版本的页码不同
Changes from Revision * (December 2018) to Revision A (May 2021)
Page
• 更新了整个文档中的表格、图和交叉参考的编号格式.........................................................................................1
• 更新了特性部分中的耐辐射和增强型航天塑料要点............................................................................................1
• 更新了应用部分..................................................................................................................................................1
• 向“器件信息”表添加了器件质量和尺寸...........................................................................................................1
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5 Pin Configuration and Functions
5
4
3
2
1
EN
FB
6
GND
OUT
IN
图5-1. DCQ Package
SOT-223
Top View
表5-1. Pin Functions
PIN
I/O
DESCRIPTION
NO.
NAME
Input. Power is supplied to the device through the IN pin. A bypass capacitor is required on this pin if
the device is more than six inches away from the main input filter capacitor. In general, the output
impedance of a battery rises with frequency, so it is advisable to include a bypass capacitor in battery-
powered circuits. A bypass capacitor (ceramic) in the range of 1 µF to 10 µF is sufficient. The
TPS73801-SEP regulators are designed to withstand reverse voltages on the IN pin with respect to
ground and the OUT pin. In the case of a reverse input, which can happen if a battery is plugged in
backwards, the device acts as if there is a diode in series with its input. There is no reverse current
flow into the regulator, and no reverse voltage appears at the load. The device protects both itself and
the load.
1
IN
—
Output. The output supplies power to the load. A minimum output capacitor (ceramic) of 10 µF is
required to prevent oscillations. Larger output capacitors are required for applications with large
transient loads to limit peak voltage transients.
2
3
4
OUT
GND
FB
—
—
I
Ground.
Feedback. This is the input to the error amplifier. This pin is internally clamped to ±7 V. It has a bias
current of 3 µA that flows into the pin. The FB pin voltage is 1.21 V referenced to ground, and the
output voltage range is 1.21 V to 20 V.
Enable. The EN pin is used to put the TPS73801-SEP regulators into a low-power shutdown state.
The output is off when the EN pin is pulled low. The EN pin can be driven either by 5-V logic or open-
collector gate, normally several microamperes, and the EN pin current, typically 3 µA. If unused, the
EN pin must be connected to the IN pin. The device is in the low-power shutdown state if the EN pin is
not connected.
5
6
EN
I
GND
Ground.
—
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN
–20
–20
–20
–7
MAX
20
UNIT
IN
OUT
20
VIN
Input voltage
Input-to-output differential(2)
20
V
FB
EN
7
20
–20
tshort
TJ
Output short-circuit duration
Indefinite
150
150
Operating virtual-junction temperature
Storage temperature
°C
°C
–55
–65
Tstg
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Absolute maximum input-to-output differential voltage cannot be achieved with all combinations of rated IN pin and OUT pin voltages.
With the IN pin at 20 V, the OUT pin may not be pulled below 0 V. The total measured voltage from IN to OUT cannot exceed ±20 V.
6.2 ESD Ratings
VALUE
2000
UNIT
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1)
V(ESD)
Electrostatic discharge
V
Charged-device model (CDM), per JEDEC specification JESD22-C101, all pins(2)
1000
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
20
UNIT
VIN
VIH
VIL
TJ
Input voltage
VOUT + VDO
2
V
V
EN high-level input voltage
EN low-level input voltage
Recommended operating junction temperature
20
0.25
125
V
°C
–55
6.4 Thermal Information
TPS73801-SEP
THERMAL METRIC(1)
DCQ (SOT-223)
UNIT
6 PINS
50.5
31.1
5.1
RθJA
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
RθJC(top)
RθJB
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
1
ψJT
5
ψJB
RθJC(bot)
—
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
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6.5 Electrical Characteristics
Over operating temperature range TA = –55°C to 125°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TJ
MIN TYP(9) MAX UNIT
VIN
Input voltage(1) (2)
25°C
2.2
1.192
1.174
1.9
20
V
VIN = 2.21 V, ILOAD = 1 mA
25°C
1.21 1.228
1.21 1.246
VFB
FB pin voltage(1) (3)
Line regulation(1)
Load regulation(1)
V
VIN = 2.5 V to 20 V, ILOAD = 1 mA to 1 A
Full range
Full range
25°C
1.5
2
5
8
mV
mV
ΔVIN = 2.21 V to 20 V, ILOAD = 1 mA
VIN = 2.5 V, ΔILOAD = 1 mA to 1 A
ILOAD = 1 mA
Full range
25°C
18
0.02
0.1
0.06
0.10
0.17
0.22
0.27
0.35
0.30
0.40
1.5
Full range
25°C
ILOAD = 100 mA
Dropout voltage(2) (5) (4)
VIN = VOUT(NOMINAL)
Full range
25°C
VDO
V
0.19
0.24
ILOAD = 500 mA
Full range
25°C
ILOAD = 1 A
Full range
Full range
Full range
Full range
Full range
Full range
ILOAD = 0 mA
ILOAD = 1 mA
ILOAD = 100 mA
ILOAD = 500 mA
ILOAD = 1 A
1
1.1
3.8
15
1.6
GND pin current(4) (6)
VIN = VOUT(NOMINAL) + 1
IGND
5.5
mA
25
35
80
COUT = 10 µF, ILOAD = 1 A,
BW = 10 Hz to 100 kHz
VN
IFB
Output voltage noise
25°C
45
µVRMS
µA
FB pin bias current(1) (7)
25°C
Full range
Full range
25°C
3
0.9
10
2
VOUT = OFF to ON
VOUT = ON to OFF
VEN = 0 V
VEN
Shutdown threshold
EN pin current
V
0.15
0.75
0.01
3
1
30
1
IEN
µA
VEN = 20 V
25°C
Quiescent current in shutdown VIN = 6 V, VEN = 0 V
25°C
0.01
µA
dB
VIN –VOUT = 1.5 V (avg), VRIPPLE = 0.5 VP-P
fRIPPLE = 120 Hz, ILOAD = 0.75 A
,
PSRR Ripple rejection(10)
25°C
55
63
2
VIN = 7 V, VOUT = 0 V
25°C
Full range
Full range
25°C
ICL
Current limit
A
VIN = VOUT(NOMINAL) + 1
VIN = –20 V, VOUT = 0 V
VOUT = 1.21 V, VIN < 1.21 V
1.6
IREV
IRO
Input reverse leakage current
Reverse output current(8)
1
mA
µA
300
600
(1) The TPS73801-SEP is tested and specified for these conditions with the FB pin connected to the OUT pin.
(2) Dropout voltages are limited by the minimum input voltage specification under some output voltage/load conditions.
(3) Operating conditions are limited by maximum junction temperature. The regulated output voltage specification does not apply for all
possible combinations of input voltage and output current. When operating at maximum input voltage, the output current range must be
limited. When operating at maximum output current, the input voltage range must be limited.
(4) To satisfy requirements for minimum input voltage, the TPS73801-SEP is tested and specified for these conditions with an external
resistor divider (two 4.12-kΩresistors) for an output voltage of 2.4 V. The external resistor divider adds a 300-mA DC load on the
output.
(5) Dropout voltage is the minimum input to output voltage differential needed to maintain regulation at a specified output current. In
dropout, the output voltage is equal to VIN –VDROPOUT
.
(6) GND pin current is tested with VIN = (VOUT(NOMINAL) + 1 V) and a current source load. The GND pin current decreases at higher input
voltages.
(7) FB pin bias current flows into the FB pin.
(8) Reverse output current is tested with the IN pin grounded and the OUT pin forced to the rated output voltage. This current flows into
the OUT pin and out the GND pin.
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(9) Typical values represent the likely parametric nominal values determined at the time of characterization. Typical values depend on the
application and configuration and may vary over time. Typical values are not ensured on production material.
(10) Parameter is specified by characterization and is not tested in production.
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6.6 Typical Characteristics
480
600
500
400
300
200
100
0
TA = 25èC
TA = 125èC
TA = œ55èC
Iout = 1 mA
Iout = 100 mA
Iout = 0.5 A
Iout = 0.75 A
Iout = 1 A
360
240
120
0
0
0.25
0.5 0.75
Output Current (A)
1
1.25
1.5
-75
-25
25
TA Free Air Temperature (°C)
75
125
D005
D001
图6-1. Dropout Voltage vs Output Current
图6-2. Dropout Voltage vs Temperature
1.5
1.4
1.3
1.2
1.1
1
1.23
1.225
1.22
1.215
1.21
1.205
1.2
0.9
0.8
0.7
0.6
0.5
1.195
1.19
-75
-50
-25
0
25
50
75
100
125
TA Free Air Temperature (èC)
-50
-25
0
25
50
75
100
125
D020
TA – Free-Air Temperature – °C
VIN = 2.9 V
IOUT = 1 mA
VIN = 6 V
IOUT = 0 A
VEN = VIN
图6-3. Quiescent Current vs Temperature
图6-4. Output Voltage vs Temperature
1.2
100
90
80
70
60
50
40
30
20
10
0
1
0.8
0.6
0.4
0.2
0
IOUT = 1 A
IOUT = 0.5 A
0
1
2
3
4
5
6
7
8
9
10
0
2
4
6
8
10 12 14 16
18 20
Input Voltage – V
Input Voltage – V
TJ = 25°C
VEN = VIN
TJ = 25°C
VOUT = 1.21 V
VEN = VIN
ROUT = 4.3 kΩ
图6-6. Ground Current vs Input Voltage
图6-5. Quiescent Current vs Input Voltage
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6.6 Typical Characteristics (continued)
10
80
70
60
50
40
30
20
10
0
8
6
4
2
0
IOUT = 300 mA
IOUT = 100 mA
IOUT = 10 mA
0
0.2
0.4
0.6
0.8
1
0
1
2
3
4
5
6
7
8
9
10
Input Voltage – V
Output Current – A
TJ = 25°C
VOUT = 1.21 V
VEN = VIN
VIN = VOUT(nom) + 1
图6-8. Ground Current vs Output Current
图6-7. Ground Current vs Input Voltage
2.5
0.2
0.15
0.1
2.25
2
1.75
1.5
1.25
1
0.05
0.75
0.5
0.25
0
0
-75
-50
-25
0
25
50
75
100
125
TA Free Air Temperature (èC)
D011
0
2
4
6
8
10 12 14 16 18 20
VEN = 0 V
图6-9. EN Input Current vs Temperature
EN Input Voltage – V
图6-10. EN Input Current vs EN Input Voltage
1
0.8
0.6
0.4
0.2
0
1
0.8
0.6
0.4
0.2
0
-75
-50
-25
0
TA Free Air Temperature (°C)
25
50
75
100
125
-75
-50
-25
0
TA Free Air Temperature (°C)
25
50
75
100
125
D013
D014
IOUT = 1 mA
IOUT = 1 mA
图6-12. EN Threshold (On to Off) vs Temperature
图6-11. EN Threshold (Off to On) vs Temperature
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6.6 Typical Characteristics (continued)
3.5
3
5
4
3
2
1
0
TA = -40°C
TA = 25°C
2.5
2
TA = 125°C
1.5
1
0.5
0
0
2
4
6
8
10 12
14
16 18
20
-75
-50
-25
0
25
50
TA Free Air Temperature (°C)
75
100
125
Input/Output Differential Voltage – V
D015
ΔVOUT = 100 mV
图6-13. FB Bias Current vs Temperature
图6-14. Current Limit vs Input/Output Differential Voltage
5
4
3
2
1
0
12
10
8
6
4
2
0
-2
0
2
4
6
8
10
-50
-25
0
25
50
75
TA – Free-Air Temperature – °C
100
125
Output Voltage – V
VIN = 7 V
VOUT = 0 V
TJ = 25°C
VIN = 0 V
Current flows into OUT pin
图6-15. Current Limit vs Temperature
图6-16. Reverse Output Current vs Output Voltage
80
1000
800
600
400
200
0
70
60
50
40
30
20
10
0
-75
-50
-25
0
25
50
TA Free Air Temperature (°C)
75
100
125
10
100
1k
10k
100k
1M
D008
Frequency – Hz
VIN = 0 V
VIN = 2.7 V
CIN = 0
VRIPPLE = 0.05 VPP IOUT = 750 mA
COUT = 10 µF (ceramic) TA = 25°C
图6-18. Ripple Rejection vs Frequency
图6-17. Reverse Output Current vs Temperature
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6.6 Typical Characteristics (continued)
20
15
10
1
TPS73801
5
0
-5
0.1
-10
-15
-20
-25
-30
-35
0.01
-50
-25
0
25
50
75
100
125
10
100k
100
1k
10k
TA – Free-Air Temperature – °C
Frequency – Hz
IOUT = 1 A
COUT = 10 µF (ceramic)
IOUT = 1 A
图6-19. Load Regulation vs Temperature
图6-20. Output Noise Voltage vs Frequency
VIN = 4.3 V
CIN = 10 µF COUT = 10 µF (ceramic)
VIN = 4.3 V
CIN = 10 µF COUT = 10 µF (ceramic)
图6-22. Max Load Transient Response
图6-21. Load Transient Response
IOUT = 1.5 A
CIN = 10 µF
COUT = 10 µF (ceramic)
图6-23. Line Transient Response
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7 Detailed Description
7.1 Overview
The TPS73801-SEP is a 1-A LDO regulator optimized for fast transient response. The devices are capable of
supplying 1 A at a dropout voltage of 300 mV. The low operating quiescent current (1 mA) drops to less than
1 µA in shutdown. In addition to the low quiescent current, the TPS73801-SEP regulators incorporate several
protection features which make them ideal for use in battery-powered systems. The devices are protected
against both reverse input and reverse output voltages. In battery-backup applications where the output can be
held up by a backup battery when the input is pulled to ground, the TPS73801-SEP acts as if it has a diode in
series with its output and prevents reverse current flow. Additionally, in dual-supply applications where the
regulator load is returned to a negative supply, the output can be pulled below ground by as much as 20 V and
still allow the device to start and operate.
7.2 Functional Block Diagram
Reverse
Current
Protection
Pass
Element
Current
Limit
IN
OUT
EN
Error Amplifier
+
Thermal
Overload
FB
+
Voltage Reference
Reverse
Voltage
Protection
GND
7.3 Feature Description
7.3.1 Adjustable Operation
The TPS73801-SEP has an adjustable output voltage range of 1.21 V to 20 V. The output voltage is set by the
ratio of two external resistors as shown in 图 7-1. The device maintains the voltage at the FB pin at 1.21 V
referenced to ground. The current in R1 is then equal to (1.21 V / R1), and the current in R2 is the current in R1
plus the FB pin bias current. The FB pin bias current, 3 µA at 25°C, flows through R2 into the FB pin. The output
voltage can be calculated using the formula shown in 方程式 1. The value of R1 should be less than 4.17 kΩ to
minimize errors in the output voltage caused by the FB pin bias current. Note that in shutdown the output is
turned off, and the divider current is zero.
IN
VOUT
OUT
+
VIN
R2
R1
TPS73801-SEP
FB
EN
GND
图7-1. Adjustable Operation
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The output voltage can be set using the following equations:
V
OUT = 1.21 V(1+ R2) +IFB ´R2
R1
(1)
(2)
(3)
(4)
VFB = 1.21 V
IFB = 3 µA at 25°C
Output Range = 1.21 to 20 V
7.3.2 Fixed Operation
The TPS73801-SEP can be used in a fixed voltage configuration. By connecting the FB pin to OUT, the
TPS73801-SEP will regulate the output to 1.21 V. During fixed voltage operation, the FB pin can be used for a
Kelvin connection if routed separately to the load. This allows the regulator to compensate for voltage drop
across parasitic resistances (RP) between the output and the load. This becomes more crucial with higher load
currents.
RP
IN
TPS73801-SEP
EN FB
OUT
+
VIN
Load
GND
RP
图7-2. Kelvin Sense Connection
7.3.3 Overload Recovery
Like many IC power regulators, the TPS73801-SEP has safe operating area protection. The safe area protection
decreases the current limit as input-to-output voltage increases and keeps the power transistor inside a safe
operating region for all values of input-to-output voltage. The protection is designed to provide some output
current at all values of input-to-output voltage up to the device breakdown.
When power is first turned on, as the input voltage rises, the output follows the input, allowing the regulator to
start up into very heavy loads. During start up, as the input voltage is rising, the input-to-output voltage
differential is small, allowing the regulator to supply large output currents. With a high input voltage, a problem
can occur wherein removal of an output short does not allow the output voltage to recover. Other regulators also
exhibit this phenomenon, so it is not unique to the TPS73801-SEP.
The problem occurs with a heavy output load when the input voltage is high and the output voltage is low.
Common situations occur immediately after the removal of a short circuit or when the shutdown pin is pulled high
after the input voltage has already been turned on. The load line for such a load may intersect the output current
curve at two points. If this happens, there are two stable output operating points for the regulator. With this
double intersection, the input power supply may need to be cycled down to zero and brought up again to make
the output recover.
7.3.4 Output Voltage Noise
The TPS73801-SEP regulators have been designed to provide low output voltage noise over the 10-Hz to 100-
kHz bandwidth while operating at full load. Output voltage noise is typically 40 nV/√Hz over this frequency
bandwidth for the TPS73801-SEP. For higher output voltages (generated by using a resistor divider), the output
voltage noise is gained up accordingly. This results in RMS noise over the 10-Hz to 100-kHz bandwidth of 14
µVRMS for the TPS73801-SEP.
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Higher values of output voltage noise may be measured when care is not exercised with regards to circuit layout
and testing. Crosstalk from nearby traces can induce unwanted noise onto the output of the TPS73801-SEP.
Power supply ripple rejection must also be considered; the TPS73801-SEP regulators do not have unlimited
power-supply rejection and pass a small portion of the input noise through to the output.
7.3.5 Protection Features
The TPS73801-SEP regulators incorporate several protection features that make them ideal for use in battery-
powered circuits. In addition to the normal protection features associated with monolithic regulators, such as
current limiting and thermal limiting, the devices are protected against reverse input voltages, reverse output
voltages, and reverse voltages from output to input.
Current limit protection and thermal overload protection are intended to protect the device against current
overload conditions at the output of the device. For normal operation, the junction temperature should not
exceed 125°C.
The input of the device withstands reverse voltages of 20 V. Current flow into the device is limited to less than 1
mA (typically less than 100 µA), and no negative voltage appears at the output. The device protects both itself
and the load. This provides protection against batteries that can be plugged in backward.
The output of the TPS73801-SEP can be pulled below ground without damaging the device. If the input is left
open circuit or grounded, the output can be pulled below ground by 20 V. The output acts like an open circuit; no
current flows out of the pin. If the input is powered by a voltage source, the output sources the short-circuit
current of the device and protects itself by thermal limiting. In this case, grounding the EN pin turns off the device
and stops the output from sourcing the short-circuit current.
The FB pin can be pulled above or below ground by as much as 7 V without damaging the device. If the input is
left open circuit or grounded, the FB pin acts like an open circuit when pulled below ground and like a large
resistor (typically 5 kΩ) in series with a diode when pulled above ground.
In situations where the FB pin is connected to a resistor divider that would pull the FB pin above its 7-V clamp
voltage if the output is pulled high, the FB pin input current must be limited to less than 5 mA. For example, a
resistor divider is used to provide a regulated 1.5-V output from the 1.21-V reference when the output is forced to
20 V. The top resistor of the resistor divider must be chosen to limit the current into the FB pin to less than 5 mA
when the FB pin is at 7 V. The 13-V difference between OUT and FB pins divided by the 5-mA maximum current
into the FB pin yields a minimum top resistor value of 2.6 kΩ.
In circuits where a backup battery is required, several different input and output conditions can occur. The output
voltage may be held up while the input is either pulled to ground, pulled to some intermediate voltage, or is left
open circuit. When the IN pin of the TPS73801-SEP is forced below the OUT pin or the OUT pin is pulled above
the IN pin, input current typically drops to less than 2 µA. This can happen if the input of the device is connected
to a discharged (low voltage) battery and the output is held up by either a backup battery or a second regulator
circuit. The state of the EN pin has no effect on the reverse output current when the output is pulled above the
input.
7.4 Device Functional Modes
See the device modes in 表7-1.
表7-1. Device Modes
EN
DEVICE STATE
Regulated voltage
Shutdown
H
L
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8 Application and Implementation
Note
Information in the following applications sections is not part of the TI component specification, and TI
does not warrant its accuracy or completeness. TI’s customers are responsible for determining
suitability of components for their purposes, as well as validating and testing their design
implementation to confirm system functionality.
8.1 Application Information
8.1.1 Output Capacitance and Transient Response
The TPS73801-SEP regulators are designed to be stable with a wide range of output capacitors. The ESR of the
output capacitor affects stability, most notably with small capacitors. A minimum output capacitor of 10 µF with
an ESR of 3 Ω or less is recommended to prevent oscillations. Larger values of output capacitance can
decrease the peak deviations and provide improved transient response for larger load current changes. Bypass
capacitors, used to decouple individual components powered by the TPS73801-SEP, increase the effective
output capacitor value.
Extra consideration must be given to the use of ceramic capacitors. Ceramic capacitors are manufactured with a
variety of dielectrics, each with different behavior over temperature and applied voltage. The most common
dielectrics used are Z5U, Y5V, X5R and X7R. The Z5U and Y5V dielectrics are good for providing high
capacitances in a small package, but exhibit strong voltage and temperature coefficients. When used with a 5-V
regulator, a 10-µF Y5V capacitor can exhibit an effective value as low as 1 µF to 2 µF over the operating
temperature range. The X5R and X7R dielectrics result in more stable characteristics and are more suitable for
use as the output capacitor. The X7R type has better stability across temperature, while the X5R is less
expensive and is available in higher values.
Voltage and temperature coefficients are not the only sources of problems. Some ceramic capacitors have a
piezoelectric response. A piezoelectric device generates voltage across its terminals due to mechanical stress,
similar to the way a piezoelectric accelerometer or microphone works. For a ceramic capacitor, the stress can be
induced by vibrations in the system or thermal transients.
8.2 Typical Application
This section will highlight some of the design considerations when implementing this device in various
applications.
IN
2.5 V at 1 A
OUT
TPS73801-SEP
+
R2
4.22 kꢀ
C2
10 µF
C1
10 µF
VIN = 5 V
FB
EN
GND
R1
4 kꢀ
All capacitors are ceramic.
图8-1. Adjustable Output Voltage Operation
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8.2.1 Design Requirements
表8-1 shows the design parameters for this application.
表8-1. Design Parameters
DESIGN PARAMETER
Input voltage (VIN)
Output voltage (VOUT
EXAMPLE VALUE
5 V
2.5 V
0 to 1 A
1%
)
Output current (IOUT
Load regulation
)
8.2.2 Detailed Design Procedure
The TPS73801-SEP has an adjustable output voltage range of 1.21 to 20 V. The output voltage is set by the
ratio of two external resistors R1 and R2 as shown in Adjustable Output Voltage Operation. The device
maintains the voltage at the FB pin at 1.21 V referenced to ground. The current in R1 is then equal to (1.21 V /
R1), and the current in R2 is the current in R1 plus the FB pin bias current. The FB pin bias current, 3 µA at
25°C, flows through R2 into the FB pin. The output voltage can be calculated using 方程式5.
V
OUT = 1.21 V(1+ R2) +IFB ´R2
R1
(5)
The value of R1 should be less than 4.17 kΩ to minimize errors in the output voltage caused by the FB pin bias
current. Note that in shutdown the output is turned off, and the divider current is zero. For an output voltage of
2.50 V, R1 will be set to 4.0 kΩ. R2 is then found to be 4.22 kΩusing the equation above.
4.22kW
V
OUT = 1.21V(1+
) + 3µA ´ 4.22kW
4.0kW
(6)
(7)
VOUT = 2.50 V
The adjustable device is tested and specified with the FB pin tied to the OUT pin for an output voltage of 1.21 V.
Specifications for output voltages greater than 1.21 V are proportional to the ratio of the desired output voltage to
1.21 V: VOUT / 1.21 V. For example, load regulation for an output current change of 1 mA to 1.5 A is –2 mV (typ)
at VOUT = 1.21 V. At VOUT = 2.50 V, the typical load regulation is:
(2.50 V / 1.21 V)(–2 mV) = –4.13 mV
(8)
图 8-2 shows the actual change in output is approximately 3 mV for a 1-A load step. The maximum load
regulation at 25°C is –8 mV. At VOUT = 2.50 V, the maximum load regulation is:
(2.50 V / 1.21 V)(–8 mV) = –16.53 mV
(9)
Since 16.53 mV is 0.7% of the 2.5-V output voltage, the load regulation will meet the design requirements.
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8.2.3 Application Curve
图8-2. 1-A Load Transient Response
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9 Power Supply Recommendations
The device is designed to operate with an input voltage supply up to 20 V. The minimum input voltage should
provide adequate headroom greater than the dropout voltage in order for the device to have a regulated output.
If the input supply is noisy, additional input capacitors with low ESR can help improve the output noise
performance.
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10 Layout
10.1 Layout Guidelines
1. For best performance, all traces should be as short as possible.
2. Use wide traces for IN, OUT, and GND to minimize the parasitic electrical effects.
3. A minimum output capacitor of 10 µF with an ESR of 3 Ωor less is recommended to prevent oscillations.
X5R and X7R dielectrics are preferred.
4. Place the output capacitor as close as possible to the OUT pin of the device.
5. The tab of the DCQ package should be connected to ground.
10.2 Layout Example
图10-1. SOT-223 Layout Example (DCQ)
10.3 Thermal Considerations
The power handling capability of the device is limited by the recommended maximum operating junction
temperature (125°C). The power dissipated by the device is made up of two components:
1. Output current multiplied by the input/output voltage differential: IOUT (VIN –VOUT
)
2. GND pin current multiplied by the input voltage: IGND × VIN
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The GND pin current can be found using the GND Pin Current graphs in 节 6.6 . Power dissipation is equal to
the sum of the two components listed above.
The TPS73801-SEP series regulators have internal thermal limiting designed to protect the device during
overload conditions. For continuous normal conditions, the recommended maximum operating junction
temperature is 125°C. It is important to give careful consideration to all sources of thermal resistance from
junction to ambient. Additional heat sources mounted nearby must also be considered.
10.3.1 Calculating Junction Temperature
Example: Given an output voltage of 3.3 V, an input voltage range of 4 V to 6 V, an output current range of 0 mA
to 500 mA, and a maximum ambient temperature of 50°C, what is the operating junction temperature?
The power dissipated by the device is equal to:
IOUT(MAX)(VIN(MAX) –VOUT) + IGND(VIN(MAX)
)
(10)
where
• IOUT(MAX) = 500 mA
• VIN(MAX) = 6 V
• IGND at (IOUT = 500 mA, VIN = 6 V) = 10 mA
So,
P = 500 mA × (6 V –3.3 V) + 10 mA × 6 V = 1.41 W
(11)
The thermal resistance of the DCQ package is 50.5°C/W. So the junction temperature rise above ambient is
approximately equal to:
1.41 W × 50.5°C/W = 71.2°C
(12)
The junction temperature rise can then be added to the maximum ambient temperature to find the operating
junction temperature (TJ):
TJ = 50°C + 71.2°C = 121.2°C
(13)
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11 Device and Documentation Support
11.1 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
11.2 支持资源
TI E2E™ 支持论坛是工程师的重要参考资料,可直接从专家获得快速、经过验证的解答和设计帮助。搜索现有解
答或提出自己的问题可获得所需的快速设计帮助。
链接的内容由各个贡献者“按原样”提供。这些内容并不构成 TI 技术规范,并且不一定反映 TI 的观点;请参阅
TI 的《使用条款》。
11.3 Trademarks
TI E2E™ is a trademark of Texas Instruments.
所有商标均为其各自所有者的财产。
11.4 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
11.5 Glossary
TI Glossary
This glossary lists and explains terms, acronyms, and definitions.
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12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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重要声明和免责声明
TI 提供技术和可靠性数据(包括数据表)、设计资源(包括参考设计)、应用或其他设计建议、网络工具、安全信息和其他资源,不保证没
有瑕疵且不做出任何明示或暗示的担保,包括但不限于对适销性、某特定用途方面的适用性或不侵犯任何第三方知识产权的暗示担保。
这些资源可供使用TI 产品进行设计的熟练开发人员使用。您将自行承担以下全部责任:(1) 针对您的应用选择合适的TI 产品,(2) 设计、验
证并测试您的应用,(3) 确保您的应用满足相应标准以及任何其他安全、安保或其他要求。这些资源如有变更,恕不另行通知。TI 授权您仅可
将这些资源用于研发本资源所述的TI 产品的应用。严禁对这些资源进行其他复制或展示。您无权使用任何其他TI 知识产权或任何第三方知
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TI 提供的产品受TI 的销售条款(https:www.ti.com/legal/termsofsale.html) 或ti.com 上其他适用条款/TI 产品随附的其他适用条款的约束。TI
提供这些资源并不会扩展或以其他方式更改TI 针对TI 产品发布的适用的担保或担保免责声明。重要声明
邮寄地址:Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2021,德州仪器(TI) 公司
PACKAGE OPTION ADDENDUM
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PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
TPS73801MDCQPSEP
TPS73801MDCQTPSEP
V62/18616-01XE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOT-223
SOT-223
SOT-223
SOT-223
DCQ
DCQ
DCQ
DCQ
6
6
6
6
78
250
250
78
RoHS & Green
RoHS & Green
RoHS & Green
RoHS & Green
NIPDAUAG
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
-55 to 125
-55 to 125
-55 to 125
-55 to 125
73801-SP
NIPDAUAG
NIPDAUAG
NIPDAUAG
73801-SP
73801-SP
73801-SP
V62/18616-01XE-T
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
16-Apr-2021
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Jan-2022
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TPS73801MDCQTPSEP SOT-223 DCQ
6
250
177.8
12.4
7.1
7.45
1.88
8.0
12.0
Q3
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Jan-2022
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SOT-223 DCQ
SPQ
Length (mm) Width (mm) Height (mm)
213.0 191.0 35.0
TPS73801MDCQTPSEP
6
250
Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Jan-2022
TUBE
*All dimensions are nominal
Device
Package Name Package Type
Pins
SPQ
L (mm)
W (mm)
T (µm)
B (mm)
TPS73801MDCQPSEP
V62/18616-01XE-T
DCQ
DCQ
SOT-223
SOT-223
6
6
78
78
532.13
532.13
8.63
8.63
3.6
3.6
3.68
3.68
Pack Materials-Page 3
PACKAGE OUTLINE
DCQ0006A
SOT - 1.8 mm max height
S
C
A
L
E
2
.
0
0
0
PLASTIC SMALL OUTLINE
7.26
6.86
3.6
3.4
NOTE 3
0.08
B
A
PIN 1
INDEX AREA
1
1.27
TYP
6.6
6.4
NOTE 3
5.08
6
3.05
2.95
0.1
C A B
5
0.51
5X
0.41
0.10
(1.6)
0.02
0.1
C A B
1.8 MAX
0.32
0.24
0.25
GAGE PLANE
1.14
0.91
SEATING PLANE
C
0 -8
TYP
4214845/C 11/2021
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
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EXAMPLE BOARD LAYOUT
DCQ0006A
SOT - 1.8 mm max height
PLASTIC SMALL OUTLINE
(6)
1
0.2 TYP
4X (1.27)
(1.35)
SYMM
(3.2)
6
(R0.05) TYP
(0.775) TYP
5X (0.65)
5
(2.05)
PKG
5X (2.05)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE: 10X
SOLDER MASK
OPENING
METAL
METAL UNDER
SOLDER MASK
SOLDER MASK
OPENING
EXPOSED METAL
EXPOSED METAL
0.07 MAX
ALL AROUND
0.07 MIN
ALL AROUND
SOLDER MASK DETAILS
4214845/C 11/2021
NOTES: (continued)
4. Publication IPC-7351 may have alternate designs.
5. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
6. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown
on this view. It is recommended that vias under paste be filled, plugged or tented.
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EXAMPLE STENCIL DESIGN
DCQ0006A
SOT - 1.8 mm max height
PLASTIC SMALL OUTLINE
(6)
1
(0.56) TYP
(0.755)
(1.27) TYP
SYMM
6
4X (1.31)
(R0.05) TYP
4X (0.92)
5X (0.65)
5
SYMM
5X (2.05)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE: 10X
4214845/C 11/2021
NOTES: (continued)
7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
8. Board assembly site may have different recommendations for stencil design.
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