74VHCT574AFT [TOSHIBA]
74VHC Series;
| 型号： | 74VHCT574AFT |
| 厂家： | 
TOSHIBA |
| 描述： | 74VHC Series 驱动 光电二极管 逻辑集成电路 |
| 文件： | 总9页 (文件大小：184K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
74VHCT574AFT
CMOS Digital Integrated Circuits Silicon Monolithic
74VHCT574AFT
1. Functional Description
•
Octal D-Type Flip Flop with 3-State Outputs
2. General
The 74VHCT574AFT is an advanced high speed CMOS OCTAL FLIP-FLOP with 3-STATE OUTPUT fabricated
with silicon gate C2MOS technology.
It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS
low power dissipation.
This 8-bit D-type flip-flop is controlled by a clock input (CK) and an output enable input (OE).
When the OE input is high, the eight outputs are in a high impedance state.
The input voltage is compatible with TTL output voltage.
This device may be used as a level converter for interfacing 3.3 V to 5 V system.
Input protection and output circuit ensure that 0 to 5.5 V can be applied to the input and output (Note) pins
without regard to the supply voltage. These structure prevents device destruction due to mismatched supply and
input/output voltages such as battery back up, hot board insertion, etc.
Note: Output in off-state
3. Features
(1) AEC-Q100 (Rev. H) (Note 1)
(2) Wide operating temperature range: Topr = -40 to 125
(3) High speed: fMAX = 140MHz (typ.) at VCC = 5.0 V
(4) Low power dissipation: ICC = 4.0 µA (max) at Ta = 25
(5) Compatible with TTL inputs: VIL = 0.8V (max)
VIH = 2.0V (min)
(6) Power-down protection is provided on all inputs and outputs.
(7) Balanced propagation delays: tPLH ≈ tPHL
(8) Low noise: VOLP = 1.5 V (max)
(9) Pin and function compatible with the 74 series (74ACT/HCT/AHCT etc.) 574 type.
Note 1: This device is compliant with the reliability requirements of AEC-Q100. For details, contact your Toshiba sales
representative.
Start of commercial production
2013-04
©2016 Toshiba Corporation
2016-08-04
Rev.3.0
1
74VHCT574AFT
4. Packaging
TSSOP20B
5. Pin Assignment
6. Marking
©2016 Toshiba Corporation
2016-08-04
Rev.3.0
2
74VHCT574AFT
7. IEC Logic Symbol
8. Truth Table
X:
Don't care
Z:
High impedance
No change
Qn:
9. System Diagram
©2016 Toshiba Corporation
2016-08-04
Rev.3.0
3
74VHCT574AFT
10. Absolute Maximum Ratings (Note)
Characteristics
Symbol
Note
Rating
Unit
Supply voltage
Input voltage
Output voltage
VCC
VIN
-0.5 to 7.0
-0.5 to 7.0
-0.5 to 7.0
-0.5 to VCC + 0.5
-20
V
V
V
VOUT
(Note 1)
(Note 2)
Input diode current
Output diode current
Output current
IIK
IOK
IOUT
ICC
PD
mA
mA
mA
mA
mW
(Note 3)
(Note 4)
±20
±25
VCC/ground current
Power dissipation
Storage temperature
±75
180
Tstg
-65 to 150
Note: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even
destruction.
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“HandlingPrecautions”/“DeratingConceptandMethods”)andindividualreliabilitydata(i.e. reliabilitytestreport
and estimated failure rate, etc).
Note 1: Output in off-state.
Note 2: High (H) or Low (L) state. IOUT absolute maximum rating must be observed.
Note 3: VOUT < GND, VOUT > VCC
Note 4: 180 mW in the range of Ta = -40 to 85 . From Ta = 85 to 125 a derating factor of -3.25 mW/ shall be
applied until 50 mW.
11. Operating Ranges (Note)
Characteristics
Symbol
Note
Rating
Unit
Supply voltage
Input voltage
Output voltage
VCC
VIN
4.5 to 5.5
0 to 5.5
V
V
V
VOUT
(Note 1)
(Note 2)
0 to 5.5
0 to VCC
-40 to 125
0 to 20
Operating temperature
Input rise and fall times
Topr
dt/dv
ns/V
Note: The operating ranges must be maintained to ensure the normal operation of the device.
Unused inputs must be tied to either VCC or GND.
Note 1: Output in Off-state.
Note 2: High (H) or Low (L) state.
©2016 Toshiba Corporation
2016-08-04
Rev.3.0
4
74VHCT574AFT
12. Electrical Characteristics
12.1. DC Characteristics (Unless otherwise specified, Ta = 25 )
Characteristics
Symbol
Test Condition
VCC (V)
Min
Typ.
Max
Unit
High-level input voltage
Low-level input voltage
High-level output voltage
VIH
VIL
4.5 to 5.5
4.5 to 5.5
4.5
2.0
0.8
V
V
V
VOH
VIN = VIH or VIL
IOH = -50 µA
IOH = -8 mA
IOL = 50 µA
IOL = 8 mA
4.40
3.94
4.50
4.5
Low-level output voltage
VOL
IOZ
VIN = VIH or VIL
4.5
0.0
0.10
0.36
±0.25
V
4.5
3-state output OFF-state
leakage current
VIN = VIH or VIL
VOUT = VCC or GND
5.5
µA
Input leakage current
IIN
ICC
VIN = 5.5 V or GND
VIN = VCC or GND
0 to 5.5
5.5
±0.1
4.0
µA
µA
Quiescent supply current
ICCT
Per input: VIN = 3.4 V
5.5
1.35
mA
Other input: VCC or GND
Output leakage current
(Power-OFF)
IOPD
VOUT = 5.5 V
0
0.5
µA
12.2. DC Characteristics (Unless otherwise specified, Ta = -40 to 85 )
Characteristics
Symbol
Test Condition
VCC (V)
Min
Max
Unit
High-level input voltage
Low-level input voltage
High-level output voltage
VIH
VIL
4.5 to 5.5
4.5 to 5.5
4.5
2.0
0.8
V
V
V
VOH
VIN = VIH or VIL
IOH = -50 µA
IOH = -8 mA
IOL = 50 µA
IOL = 8 mA
4.40
3.80
4.5
Low-level output voltage
VOL
IOZ
VIN = VIH or VIL
4.5
0.10
0.44
±2.50
V
4.5
3-state output OFF-state
leakage current
VIN = VIH or VIL
VOUT = VCC or GND
5.5
µA
Input leakage current
IIN
ICC
VIN = 5.5 V or GND
VIN = VCC or GND
0 to 5.5
5.5
±1.0
40.0
1.50
µA
µA
Quiescent supply current
ICCT
Per input: VIN = 3.4 V
5.5
mA
Other input: VCC or GND
Output leakage current
(Power-OFF)
IOPD
VOUT = 5.5 V
0
5.0
µA
12.3. DC Characteristics (Unless otherwise specified, Ta = -40 to 125 )
Characteristics
Symbol
Test Condition
VCC (V)
Min
Max
Unit
High-level input voltage
Low-level input voltage
High-level output voltage
VIH
VIL
4.5 to 5.5
4.5 to 5.5
4.5
2.0
0.8
V
V
V
VOH
VIN = VIH or VIL
IOH = -50 µA
IOH = -8 mA
IOL = 50 µA
IOL = 8 mA
4.40
3.70
4.5
Low-level output voltage
VOL
IOZ
VIN = VIH or VIL
4.5
0.10
0.55
±10.0
V
4.5
3-state output OFF-state
leakage current
VIN = VIH or VIL
VOUT = VCC or GND
5.5
µA
Input leakage current
IIN
ICC
VIN = 5.5 V or GND
VIN = VCC or GND
0 to 5.5
5.5
±2.0
80.0
1.50
µA
µA
Quiescent supply current
ICCT
Per input: VIN = 3.4 V
5.5
mA
Other input: VCC or GND
Output leakage current
(Power-OFF)
IOPD
VOUT = 5.5 V
0
20.0
µA
©2016 Toshiba Corporation
2016-08-04
Rev.3.0
5
74VHCT574AFT
12.4. Timing Requirements (Unless otherwise specified, Ta = 25, Input: tr = tf = 3 ns)
Characteristics
Minimum pulse width (CK)
Symbol
VCC (V)
Typ.
Limit
Unit
tw(L),tw(H)
5.0 ± 0.5
5.0 ± 0.5
5.0 ± 0.5
6.5
2.5
2.5
ns
ns
ns
Minimum setup time
Minimum hold time
tS
th
12.5. Timing Requirements
(Unless otherwise specified, Ta = -40 to 85, Input: tr = tf = 3 ns)
Characteristics
Symbol
VCC (V)
Limit
Unit
Minimum pulse width (CK)
Minimum setup time
Minimum hold time
tw(L),tw(H)
5.0 ± 0.5
5.0 ± 0.5
5.0 ± 0.5
8.5
2.5
2.5
ns
ns
ns
tS
th
12.6. Timing Requirements
(Unless otherwise specified, Ta = -40 to 125 , Input: tr = tf = 3 ns)
Characteristics
Symbol
VCC (V)
Limit
Unit
Minimum pulse width (CK)
Minimum setup time
Minimum hold time
tw(L),tw(H)
5.0 ± 0.5
5.0 ± 0.5
5.0 ± 0.5
8.5
3.0
2.5
ns
ns
ns
tS
th
12.7. AC Characteristics (Unless otherwise specified, Ta = 25 , Input: tr = tf = 3 ns)
Characteristics
Symbol
Note
Test Condition VCC (V) CL (pF)
Min
Typ.
Max
Unit
ns
Propagation delay time
(CK-Q)
tPLH,tPHL
5.0 ± 0.5
15
50
15
50
50
15
50
50
90
85
4.1
5.6
6.5
7.3
7.0
140
130
9.4
10.4
10.2
11.2
11.2
3-state output enable time
tPZL,tPZH
RL = 1 kΩ
5.0 ± 0.5
ns
3-state output disable time
Maximum clock frequency
tPLZ,tPHZ
fMAX
RL = 1 kΩ
5.0 ± 0.5
5.0 ± 0.5
ns
MHz
Output skew
tosLH,tosHL (Note 1)
5.0 ± 0.5
1.0
10
ns
pF
pF
pF
Input capacitance
CIN
4
Output capacitance
Power dissipation capacitance
COUT
9
CPD
(Note 2)
25
Note 1: Parameter guaranteed by design. (tosLH = |tPLHm-tPLHn|, tosHL = |tPHLm-tPHLn|)
Note 2: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current
consumption without load. Average operating current can be obtained by the equation.
ICC(opr) = CPD × VCC × fIN + ICC/8 (per F/F)
And the total CPD when n pcs of F/F operate can be gained by the following equation.
CPD (total) = 14 + 11 × n
©2016 Toshiba Corporation
2016-08-04
Rev.3.0
6
74VHCT574AFT
12.8. AC Characteristics
(Unless otherwise specified, Ta = -40 to 85 , Input: tr = tf = 3 ns)
Characteristics
Symbol
Note
Test Condition
VCC (V) CL (pF)
Min
Max
Unit
ns
Propagation delay time
(CK-Q)
tPLH,tPHL
5.0 ± 0.5
15
50
15
50
50
15
50
50
1.0
1.0
1.0
1.0
1.0
80
10.5
11.5
11.5
12.5
12.0
3-state output enable time
tPZL,tPZH
RL = 1 kΩ
5.0 ± 0.5
ns
3-state output disable time
Maximum clock frequency
tPLZ,tPHZ
fMAX
RL = 1 kΩ
5.0 ± 0.5
5.0 ± 0.5
ns
MHz
75
Output skew
tosLH,tosHL (Note 1)
CIN
5.0 ± 0.5
1.0
ns
Input capacitance
10
pF
Note 1: Parameter guaranteed by design. (tosLH = |tPLHm-tPLHn|, tosHL = |tPHLm-tPHLn|)
12.9. AC Characteristics
(Unless otherwise specified, Ta = -40 to 125 , Input: tr = tf = 3 ns)
Characteristics
Symbol
Note
Test Condition
VCC (V) CL (pF)
Min
Max
Unit
ns
Propagation delay time
(CK-Q)
tPLH,tPHL
5.0 ± 0.5
15
50
15
50
50
15
50
50
1.0
1.0
1.0
1.0
1.0
70
12.0
13.0
13.0
14.0
14.0
3-state output enable time
tPZL,tPZH
RL = 1 kΩ
5.0 ± 0.5
ns
3-state output disable time
Maximum clock frequency
tPLZ,tPHZ
fMAX
RL = 1 kΩ
5.0 ± 0.5
5.0 ± 0.5
5.0 ± 0.5
5.0 ± 0.5
ns
MHz
65
Output skew
tosLH,tosHL (Note 1)
CIN
1.0
ns
Input capacitance
10
pF
Note 1: Parameter guaranteed by design. (tosLH = |tPLHm-tPLHn|, tosHL = |tPHLm-tPHLn|)
12.10. Noise Characteristics (Unless otherwise specified, Ta = 25, Input: tr = tf = 3 ns)
Characteristics
Symbol
Test Condition
VCC (V)
Typ.
Limit
Unit
Quiet output maximum dynamic VOL
Quiet output minimum dynamic VOL
Minimum high-level dynamic input voltage
Maximum low-level dynamic input voltage
VOLP CL = 50 pF
VOLV CL = 50 pF
VIHD CL = 50 pF
5.0
5.0
5.0
5.0
1.1
-1.1
1.5
-1.5
2.0
0.8
V
V
V
V
VILD
CL = 50 pF
©2016 Toshiba Corporation
2016-08-04
Rev.3.0
7
74VHCT574AFT
Package Dimensions
Unit: mm
Weight: 0.071 g (typ.)
Package Name(s)
Nickname: TSSOP20B
©2016 Toshiba Corporation
2016-08-04
Rev.3.0
8
74VHCT574AFT
RESTRICTIONS ON PRODUCT USE
•
•
•
Toshiba Corporation, and its subsidiaries and affiliates (collectively "TOSHIBA"), reserve the right to make changes to the information
in this document, and related hardware, software and systems (collectively "Product") without notice.
This document and any information herein may not be reproduced without prior written permission from TOSHIBA. Even with TOSHIBA's
written permission, reproduction is permissible only if reproduction is without alteration/omission.
ThoughTOSHIBAworkscontinuallytoimproveProduct'squalityandreliability,Productcanmalfunctionorfail.Customersareresponsible
for complying with safety standards and for providing adequate designs and safeguards for their hardware, software and systems which
minimize risk and avoid situations in which a malfunction or failure of Product could cause loss of human life, bodily injury or damage
to property, including data loss or corruption. Before customers use the Product, create designs including the Product, or incorporate
the Product into their own applications, customers must also refer to and comply with (a) the latest versions of all relevant TOSHIBA
information, including without limitation, this document, the specifications, the data sheets and application notes for Product and the
precautions and conditions set forth in the "TOSHIBA Semiconductor Reliability Handbook" and (b) the instructions for the application
with which the Product will be used with or for. Customers are solely responsible for all aspects of their own product design or applications,
including but not limited to (a) determining the appropriateness of the use of this Product in such design or applications; (b) evaluating
and determining the applicability of any information contained in this document, or in charts, diagrams, programs, algorithms, sample
application circuits, or any other referenced documents; and (c) validating all operating parameters for such designs and applications.
TOSHIBA ASSUMES NO LIABILITY FOR CUSTOMERS' PRODUCT DESIGN OR APPLICATIONS.
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PRODUCT IS NEITHER INTENDED NOR WARRANTED FOR USE IN EQUIPMENTS OR SYSTEMS THAT REQUIRE
EXTRAORDINARILY HIGH LEVELS OF QUALITY AND/OR RELIABILITY, AND/OR A MALFUNCTION OR FAILURE OF WHICH MAY
CAUSE LOSS OF HUMAN LIFE, BODILY INJURY, SERIOUS PROPERTY DAMAGE AND/OR SERIOUS PUBLIC IMPACT
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equipment used in nuclear facilities, equipment used in the aerospace industry, medical equipment, equipment used for automobiles,
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representative.
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applicable laws or regulations.
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PURPOSE, ACCURACY OF INFORMATION, OR NONINFRINGEMENT.
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including without limitation, the EU RoHS Directive. TOSHIBA ASSUMES NO LIABILITY FOR DAMAGES OR LOSSES OCCURRING
AS A RESULT OF NONCOMPLIANCE WITH APPLICABLE LAWS AND REGULATIONS.
©2016 Toshiba Corporation
2016-08-04
Rev.3.0
9
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FAIRCHILD
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