TSM55N03CP [TSC]

N-Channel Enhancement Mode MOSFET; N沟道增强型MOSFET
TSM55N03CP
型号: TSM55N03CP
厂家: TAIWAN SEMICONDUCTOR COMPANY, LTD    TAIWAN SEMICONDUCTOR COMPANY, LTD
描述:

N-Channel Enhancement Mode MOSFET
N沟道增强型MOSFET

文件: 总3页 (文件大小:133K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
TSM55N03  
Preliminary  
N-Channel Enhancement Mode MOSFET  
VDS = 25V  
Pin assignment:  
1. Gate  
ID = 55A  
2. Drain  
RDS (on), Vgs @ 10V, Ids @ 30A = 6m  
3. Source  
RDS (on), Vgs @ 4.5V, Ids @ 30A = 9mΩ  
Features  
—
—
—
Advanced trench process technology  
—
Fully Characterized Avalanche Voltage and Current  
High Density Cell Design for Ultra Low On-Resistance — Specially Designed for DC/DC Converters and Motor  
Improved Shoot-Through FOM  
Drivers  
Block Diagram  
Ordering Information  
Part No.  
Packing  
Package  
TSM55N03CP  
Tape & Reel  
TO-252  
Absolute Maximum Rating (TA = 25 oC unless otherwise noted)  
Parameter  
Symbol  
VDS  
Limit  
Unit  
Drain-Source Voltage  
Gate-Source Voltage  
Continuous Drain Current  
Pulsed Drain Current  
25  
±20  
V
V
VGS  
ID  
55  
A
IDM  
350  
TA = 25 oC  
TA = 75 oC  
70  
W
W/oC  
oC  
Maximum Power Dissipation  
PD  
42  
Operating Junction Temperature  
TJ  
+150  
- 55 to +150  
Operating Junction and Storage Temperature Range  
Single Pulse Drain to Source Avalanche Energy  
(VDD = 100V, VGS=10V, IAS=2A, L=10mH, RG=25)  
TJ, TSTG  
oC  
EAS  
300  
mJ  
Thermal Performance  
Parameter  
Symbol  
TL  
Limit  
10  
Unit  
Lead Temperature (1/8” from case)  
Junction-to-case Thermal Resistance  
Junction to Ambient Thermal Resistance (PCB mounted)  
S
Rθjc  
1.8  
oC/W  
Rθja  
40  
Note: 1. Maximum DC current limited by the package  
2. 1-in2 2oz Cu PCB board  
TSM55N03  
1-3  
2005/04 rev. B  
Electrical Characteristics  
TJ = 25 oC, unless otherwise noted  
Parameter  
Conditions  
Symbol  
Min  
Typ  
Max  
Unit  
Static  
Drain-Source Breakdown Voltage  
Drain-Source On-State Resistance  
Drain-Source On-State Resistance  
Gate Threshold Voltage  
Zero Gate Voltage Drain Current  
Gate Body Leakage  
VGS = 0V, ID = 250uA  
VGS = 4.5V, ID = 30A  
VGS = 10V, ID = 30A  
VDS = VGS, ID = 250uA  
VDS = 25V, VGS = 0V  
VGS = ± 20V, VDS = 0V  
BVDSS  
RDS(ON)  
RDS(ON)  
VGS(TH)  
IDSS  
30  
--  
--  
7.5  
4.5  
1.6  
--  
--  
9.0  
6.0  
3.0  
1.0  
± 100  
--  
V
mΩ  
mΩ  
V
--  
1.0  
--  
uA  
nA  
IGSS  
--  
--  
Gate Resisrance  
Rg  
--  
--  
Forward Transconductance  
Dynamic  
VDS =15V, ID = 15A  
gfs  
--  
--  
--  
S
Total Gate Charge  
Qg  
Qgs  
Qgd  
td(on)  
tr  
--  
--  
--  
--  
--  
--  
--  
--  
--  
--  
26  
6.0  
5.0  
17  
--  
--  
--  
--  
--  
--  
--  
--  
--  
--  
V
DS = 15V, ID = 25A,  
GS = 10V  
nC  
Gate-Source Charge  
Gate-Drain Charge  
V
Turn-On Delay Time  
VDD = 15V, RL = 15,  
Turn-On Rise Time  
3.5  
40  
ID = 1A, VGEN = 10V,  
nS  
pF  
Turn-Off Delay Time  
td(off)  
tf  
RG = 6Ω  
Turn-Off Fall Time  
6.0  
2134  
343  
134  
Input Capacitance  
Ciss  
Coss  
Crss  
VDS = 15V, VGS = 0V,  
Output Capacitance  
f = 1.0MHz  
Reverse Transfer Capacitance  
Source-Drain Diode  
Max. Diode Forward Current  
Diode Forward Voltage  
IS  
--  
--  
--  
20  
A
V
IS = 20A, VGS = 0V  
VSD  
0.85  
1.3  
Note: 1. pulse test: pulse width <=300uS, duty cycle <=2%  
2. Negligible, Dominated by circuit inductance.  
TSM55N03  
2-3  
2005/04 rev. B  
TO-252 Mechanical Drawing  
E
J
TO-252 DIMENSION  
MILLIMETERS  
A
F
INCHES  
MIN  
DIM  
MIN  
MAX  
6.840  
10.400  
0.700  
2.670  
2.390  
0.570  
1.580  
0.570  
5.550  
1.640  
MAX  
0.269  
0.409  
0.028  
0.105  
0.094  
0.022  
0.062  
0.022  
0.219  
0.065  
A
B
C
D
E
F
G
H
I
6.570  
9.250  
0.550  
2.560  
2.300  
0.490  
1.460  
0.520  
5.340  
1.460  
0.259  
0.364  
0.022  
0.101  
0.090  
0.019  
0.057  
0.020  
0.210  
0.057  
I
B
G
C
D
H
J
TSM55N03  
3-3  
2005/04 rev. B  

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