UP6056 [UPI]
High Performance, Single Synchronous Step-Up Controller;![UP6056](http://pdffile.icpdf.com/pdf2/p00337/img/icpdf/UP6056_2072592_icpdf.jpg)
型号: | UP6056 |
厂家: | ![]() |
描述: | High Performance, Single Synchronous Step-Up Controller |
文件: | 总12页 (文件大小:178K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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Conceptual
uP6056
High Performance,
Single Synchronous Step-Up Controller
Features
General Description
The uP6056 is a high-efficiency, single synchronous boost
controller suitable for high power applications in Power Bank
and E-Cigarette. The proprietary RCOTTM technology
provides fast transient response and high noise immunity.
It supports ceramic output capacitors. This combination is
ideal for building modern low duty ratio, untra-fast load step
response DC-DC converters. The output voltage is 12 to
24V, and the conversion input voltage ranges is from 10V
to 20V. The switching frequency is fixed 450kHz. It is
available in a space saving VQFN3x3-16L package.
Wide Input Voltage Rageto 20V
Output Voltage: 12V to 24
Built-In 1% 1V Referce
Built-In LDO r Voltage Regulator
RCOTTM (Robust Cont On-Time) Control
Architecture
450kHz Swiching Frequency
4000ppm/oC RD) Current Sensing
8ms Sart
Ordering Information
Built-VP/VP/OCP/OTP
VN3x3-16L Package
Order Number
uP6056PQAD
Package Type
VQFN3x3-16L
Remark
mpliant and Halogen Free
Note:
Applications
(1) Please check the sample/production availability with
uPI representatives.
(2) uPI products are compatible with the current IPC/JED
J-STD-020 requirement. They are halogen-free, RoH
compliant and 100% matte tin (Sn) plating that are suitable
for use in SnPb or Pb-free soldering processes.
ortable Charging Devices
Power Bank
O Supplies
System Power Supplies
Pin Configuraon
HG 13
BOOT 14
NC 15
8
7
6
GND
AGND
VDD
GND
MODE 16
VIN
X3-16L
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1
Conceptual
uP6056
Typical Application Circuit
V
OUT=19V
+
_
+
_
22uF
22uF
560uF
560uF
1uH
VIN=12V
HG
SW
560uF 560uF
22uF
22uF 22uF
+
+
_
_
0.1uF
5.1
BOOT
VIN
VDD
2.2uF
100pF
75k
LGRIP
2.2uF
1nF
VREG
LG
FB
10uF
12.1k
Enable
AGND
pF
EN
Disable
OCP
49k
FCCM
MODE
PGND
COMP
4.7k
2.2nF
2
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Conceptual
uP6056
Functional Pin Description
Pin No.
Pin Name Pin Function
Over Current Protection Setting. Connect a resistor from this to GND to set the
over current protection level.
1
2
3
OCP
EN
Chip Enable. Short to GND to disable the device.
Feedback Input. This pin is the inverting input to therror amA resistor divider
from output to GND is used to set regulator voltage.
FB
Boost Controller Compensation. Connect a copnsation twork to ground.
Power Supply Input. Input voltage that supplies current e output voltage.
4
5
COMP
VIN
Controller Power Supply Input. This pin proves s voltage for the IC and powers
6
VDD
the internal 5V linear regulators. Connect this pn to VOUT and bypass it with an R/C
filter.
Signal Ground.
7
8
9
AGND
PGND
VREG
Controller Power GND Pin.
5V LDO Output and Gate Drive Sply Voltage Input.
Low Side Gate Driver Ripple Innnect a series RC form LGRIP to GND
and FB to compensate the control
10
11
12
13
LGRIP
LG
Low Side Gate Driver OutpuConnect this pin to an external lower MOSFET gate
input.
Switches Node. Connect hiin to the output inductor. Connect this pin to the
source of the external upper MOSET and the drain of the external lower MOSFET.
SW
High Side Gate DriveOutpConnect this pin to external upper MOSFET gate
input.
HG
Bootstrap Supply for the loating Upper MOSFET Gate Driver. Connect the
bootstrap capacbetween BOOT pin and the SW pin to form a bootstrap
circuit. The boacitor provides the charge to turn on the upper MOSFET.
Ensure that CBOOed near the IC.
14
BOOT
Not inrnally connected.
15
16
NC
Opetion Mode Selection Pin for The Device in Light Load Condition. When
this pis conneed to ground, the device works in Pulse-Skip mode. When this pin
is pulled hihe device works in Force CCM mode.
MODE
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3
Conceptual
uP6056
Functional Block Diagram
VDD
0.3V
UV
OV
Linear
Regulator
VIN
4.3
VDD
28V
VREG
BOOT
EN
EN / SS
Control
HG
SW
FB
COMP
OCP
EA
On-Time
Calculator
Control Logic
1V
PWM
XCON
Ramp
10uA
TO
One-t
x(-1/8)
OCP
LG
ZC
LGRIP
PGND
PSM / FCCM
MODE
AGND
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Conceptual
uP6056
Functional Description
The uP6056 implements a unique RCOTTM control topology The transition pin from discontinuous to continuous
for the synchronous boost. The RCOTTM supports extremely conduction mode can be calcud as:
low ESR output capacitors and makes the design easier
and robust. The input voltage ranges from 10V to 20V. The
conversion output voltage is 12V to 24V.
2
1
N
V
V
IN
I
OUT
=
×
1−
)
2×fOSC ×LOUT
OT
V
OUT
Adaptive on-time control tracks the preset switching
frequency over a wide input and output voltage range while
allowing the switching frequency to increase at the step-
up of the load.
Over Current Limit
the uP6056 monitors the inctor peak current by low side
MOSFET RDS(ON) whn turns oThe over current limit is
triggered once the sencurrent level is higher thanVOCSET
When triggered, the over cnt limit will keep low side
MOSFET off even oltage loop commands it to turn on.
.
The uP6056 has a MODE pin to select between Force
CCM and Pulse-Skip for light load conditions. The strong
gate drivers allow low RDS(ON)FETs for high-current
applications.
The output voltae will derease if the load continuously
demands more rrent than current limit level and
consequently causes OUT to decrease faster until UVP
occurs and down the uP6056.
Enable and Soft Start
When the EN pin voltage rises above the enable threshold
voltage (typically 1.8V), the controller enters its start-up
sequence. The internal LDO regulator starts immediately
and regulates to 5V at the VREGpin. In the second phase,
an internal DAC starts ramping up the reference voltage
from 0V to 1V. Smooth and constant ramp-up of the output
voltage is maintained during start-up regardless of load
current.
The peak nt mit threshold is set by connecting a
resr from oGND. The OCP pin will source a 10uA
currencreate a voltage drop across ROCP as the VOCSET
.
VOCROCP. When the voltage drop across the
low FET equals the voltage across the setting
resistorpeak current limit will be activated.
The ltage across LX andGNDpins is compared withVOCSET
for current limit. The peak current limit level is calculated
On-Time Control and Frequency
The uP6056 does not have a dedicated oscillator tha
determines switching frequency. However, the device runs
with pseudo-constant frequency by feed-forwarding the put
V
OCSET
I
+
RIPPLE
AK _ LIM
=
and output voltages into its on-time one-shot timerThe
RCOTTM control adjusts the on-time to be invery
proportional to the input voltage and proportional to the
output voltage. This makes the switching freuqrly
constant in steady state conditions over wide ie
range.
8×RDS(ON )
2
where IRIPPLE is the peak-to-peak inductor ripple current at
steady state.
Over Voltage/Under Voltage Protection
The uP6056 monitors output voltage to detect over voltage
and under voltage. When the output voltage becomes higher
than 28V, the OVP is triggered, low side MOSFET is off
and the high side MOSFET is on. When the feedback
voltage is lower than 0.3V, the UVP is triggered, then high
side MOSFET and low side MOSFET are latched. This
function is enabled after 13.5ms following ENhas become
high.
The off-time is modulated by a PWM omparator. The FB
node voltage (the mid-point of resistdivider) is ompared
to the internal 1Vreference voltage aed with a rp signal.
When both signals match, the PWM cparatasserts a
set signal to terminate the off-time (turn off the low-side
MOSFET and turn on high-side MOSFET). The set signal
is valid if the inductor currelevel is below the OCP
threshold, otherwise the off-time is nded until the current
level falls below the thre
UVLO Protection
The uP6056 uses VIN under voltage lockout protection
(UVLO). When the VIN voltage is lower than the UVLO
threshold voltage, the switch mode power supply shuts
off. This is non-latch protection.
Light Load Conditiose-Skip Operation
While the MODE pin inected to ground, uP6056
automatically reduces the swing frequency at light load
conditions to maintaiigh efficiency. This reduction of
the frequency is achieved sothly and without increasing
VOUT ripples or ld reguation. As the load current is
further decreased, it tlonger time to discharge the
output capacitor to the level than requires the next ONcycle.
Over Temperature Protection
The uP6056 monitors the temperature of itself. If the
temperature exceeds typical 130oC, the uP6056 will be
turned off. This is the non-latch protection. It will be recovered
once temperature is lower than 100oC.
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5
Conceptual
uP6056
Absolute Maximum Rating
(Note 1)
VOUTandVDD --------------------------------------------------------------------------------------------------------------------------- -0.3Vto +28V
SW Pin Voltage toGND ------------------------------------------------------------------------------------------------- -Vto (VOUT+ -0.3V)
BOOTPinVoltage---------------------------------------------------------------------------------------------------------------------- -VSW-0.3VtoVSW+6V
HGPinVoltage --------------------------------------------------------------------------------------------------------------VSW-0.3VtoVSW+6V
LGPinVoltage ------------------------------------------------------------------------------------------------------------------------- -0.3Vto +6V
VINPinVoltage -------------------------------------------------------------------------------------------------------------------------- -0.3Vto +22V
Other Pins toGND -------------------------------------------------------------------------------------------------------------------- -0.3Vto +6V
StorageTemperature Range ------------------------------------------------------------------------------------------------------ -55oC to +150oC
LeadTemperature (Soldering, 10 sec) ------------------------------------------------------------------------------------------------------------ 260oC
ESD Rating (Note 2)
HBM (Human Body Mode) ---------------------------------------------------------------------------------------------------------------- 2kV
MM (Machine Mode) ------------------------------------------------------------------------------------------------------------------------- 200V
Thermal Information
Package Thermal Resistance (Note 3)
VQFN3x3-16L θJA---------------------------------------------------------------------------------------------------------- 68oC/W
VQFN3x3-16L θJC ------------------------------------------------------------------------------------------------------ 6oC/W
PowerDissipation, PD @ TA = 25°C
VQFN3x3-16L ---------------------------------------------------------------------------------------------------------------------------- 1.47W
Rcommended Operation Conditions
(Note 4)
InputVoltage, VIN ------------------------------------------------------------------------------------------------------------------------- 10Vto 20V
OutputVoltage, VOUT ---------------------------------------------------------------------------------------------------------------------- 12Vto 24V
Operating JunctionTemperature Range ------------------------------------------------------------------------------ -40oC to +125oC
OperatingAmbientTemperature Range --------------------------------------------------------------------------- -40oC to +85oC
Note 1. Stresses listed as the abovAbsolute Maximum Ratings may cause permanent damage to the device.
These are for stress ratingsFunctionaperation of the device at these or any other conditions beyond those
indicated in the operational ctions of e specifications is not implied. Exposure to absolute maximum
rating conditions for extended odmay remain possibility to affect device reliability.
Note 2. Devices are ESDsensitive. Handling precaution recommended.
Note 3. θJA is measured in tnatural convection at TA = 25oC on a low effective thermal conductivity test board of
JEDEC 51-3 thermal meaement standard.
Note 4. The device is nanteed tfunction outside its operating conditions.
6
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Conceptual
uP6056
Electrical Characteristics
(VDD = 5V, TA =25OC, unless otherwise specified)
Parameter
Power Supply
Symbol
Test Conditions
Min
T
Max
Units
Rising
--
-
0.2
--
--
V
V
VIN UVLO Threshold
VUVLOVIN
Hysteresis
VIN Supply Current
VDD Supply Current
IVIN
VEN = 5V, VFB =1.1V, IOUT = No Load
VEN = 5V, VFB =1.1V, IOUT = No Load
--
0.6
1
1
mA
mA
IVDD
0.36
VIN Shutdown Current
VDD Shutdown Current
IVIN_SD
VEN = 0V, IOUT = No Load
--
--
--
--
10
30
uA
uA
IVDD_SD VEN = 0V, IOUT = No Load
Internal Reference Voltage
Feedback Voltage
FB Input Current
VFB
IFB
CCM condition, TA = 25oC
VFB = 1V, TA = 25oC
0.99
--
1
1.01
0.2
V
0.01
uA
Output Drivers
Source, IHGATE = -150m
Sink, IHGAT= -150m
Source, ILGAT150mA
Sink, ILGAT= -150mA
HGATE-ff to LTE-on
LGATE-oo HGATE-on
VOcharge
1.2
0.6
0.6
0.4
7
2
1
3
Upper Switch Resistance
Lower Switch Resistance
Dead Time
RHGATE
RLGATE
TD
Ω
Ω
ns
V
1.8
2.2
1.2
30
35
--
1
0.7
17
22
1.1
0.05
10
--
VFB of VOUT Discharge
VFB_DIS
H
--
--
Duty and Frequency Control
Minimum Off-ime
Minimum On-Time
Frequency
FF_MIN
TN
FSW
--
--
--
430
230
480
--
--
--
ns
ns
kHz
Soft Start
Soft Start Time
From VEN high to VOUT = 95%
--
8
--
ms
V
Logic Threshold
Enable
1.8
--
--
--
--
EN Pin Threshold Voltag
On-Time
VEN
Disable
0.5
RRT = open, fLX = 520kHz
TON
IEN
--
--
1.22
--
--
1
us
VIN = 10V, VOUT = 24V, IOUT= No Load
EN Input Current
VEN = 5V
uA
Protection: Current Sense
VOCP = 1V
Temp coef
9
10
11
--
uA
OCP Source Current
ICS
--
4000
ppm/oC
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7
Conceptual
uP6056
Electrical Characteristics
Parameter
Protection: UVP and OVP
OVP Threshold Voltage
UVP Threshold Voltage
UVP Propagation Delay Time
Output UVP Delay Time
VREG LDO Voltage
Symbol
Test Conditions
Min
Typ
Max
Units
VOVP
VUVP
VDD
FB
--
--
--
--
8
--
--
--
--
V
V
TUVPDEL
ms
ms
TUVPEN From Enable to UVP Workable
13.5
LDO Output Voltage
VREG
IREG
VDROP
4.625
5.0
--
5.375
50
V
LDO Output Current
--
--
mA
mV
LDO Drop Out Voltage
Thermal Shutdown
VDD = 4.5V, IREG = 20mA
300
--
Shutdown Temperare
Hysteresis
--
--
130
30
--
--
Thermal Shutdown Threshold
TSDN
oC
8
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Conceptual
uP6056
Typical Operation Characteristics
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9
Conceptual
uP6056
Application Information
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Conceptual
uP6056
Package Information
VQFN3x3 - 16L
0.30 - 0.
1.40 - 1.80
2.90 - 3.10
0.18 - 0.30
Bottom w - Exposed Pad
Pin 1 mark
0.80 - 1.00
0.00 - 0.05
0.2EF
Note
1.Package Outline UnitDescription:
BSC: Basic. Represents theoretical exact dor dimension target
MIN: Minimum dimension specified.
MAX: Maximum dimension specifie
REF: Reference. Represents dimnsion for reference use only. This value is not a device specification.
TYP. Typical. Provided as a genel value. Thvalue is not a device specification.
2.Dimensions in Millimeters.
3.Drawing not to scale.
4.These dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15mm.
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11
Conceptual
uP6056
Important Notice
uPI and its subsidiaries reserve the right to make corrections, modifications, enhancements, improveents, and other
changes to its products and services at any time and to discontinue any product or servicwit notice. Customers
should obtain the latest relevant information before placing orders and should verify that sh iation is current and
complete.
uPI products are sold subject to the taerms and conditions of sale supplied at the tiof order acknowledgment.
However, no responsibility is assumed by uPI or its subsidiaries for its use or appliation of y product or circuit; nor
for any infringements of patents or other rights of third parties which may result frouse or application, including but
not limited to any consequential or incidental damages. No uPI components are designintended or authorized for
use in military, aerospace, automotive applications nor in systems for surgical imtation or life-sustaining. No license
is granted by implication or otherwise under any patent or patent rights of uPor its ssidiaries.
COPYRIGHT (C) 2017, UPI SEMICONDUCTOR CORP.
uPI Semiconductor Corp.
Sales Branch Office
uPI Semiconductor Cor
Headquarter
12F-5, No. 408, Ruiguang Rd. NeihuDistrict,
Taipei Taiwan, R.O.C.
TEL : 886.2.8751.2062 FAX : 886.2.8751.5064
9F.,No.5, Taiyuan 1st St. Zbei City,
Hsinchu Taiwan, R..
TEL : 886.3.560.1666 FAX : 886.3.560.1888
12
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