uP7558PMD5 [UPI]

Current-Limited, Power Distribution Switches;


型号：	uP7558PMD5
厂家：	uPI Semiconductor Corp.
描述：	Current-Limited, Power Distribution Switches
文件：	总16页 (文件大小：619K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

Conceptual

Current-Limited, Power Distribution Switches

uP7558

Features

General Description

The uP7558 is a current limited high-side switch designed Compliant to USB Specifications

for applications where heavy capacitive loads and short-

circuits are likely to be met. This device operates with

inputs from 2.7V to 5.5V for both 3V and 5V systems. Its

low quiescent current and shutdown current(<1uA) conserve

battery power in portable.

Operating Range: 2.7 V to 5.5 V

75mΩ (5V Input) High Side MOSFET Switch

100uA Typical Quiescent Current

<1uA Typical Shutdown Current

Over Current/ Short Circuit Protection

Output Reverse Voltage/Current Protection

Fast Short-Circuit Response Time: 2us (typ.)

Thermal Shutdown Protection

Deglitched Open Drain Fault Flag

Slow Turn On and Fast Turn Off

Enable Active-High or Active-Low

Pb-Free (RoHS Compliant)

The power switch is controlled by a logic enable input and

driven by an internal charge pump circuit. When the output

load exceeds the current-limit threshold or a short is

present, the uP7558 asserts over current protection and

limits the output current to a safe level by driving the power

switch into saturation mode.

The uP7558 features glitch-blank fault flag that is asserted

by over current and over temperature. The 8ms glitch-

blanking time allows momentary faults to be ignored, thus

preventing false alarms to the host system.

UL Approved E316940

TuV R 50254704 Certification

Other features include soft-start to limit inrush current

during plug-in, thermal shutdown to prevent catastrophic

switch failure from high-current loads, under-voltage lockout

(UVLO) to ensure that the device remains off unless there

is a valid input voltage present, and output reverse voltage

to turn off the power switch when the output voltage is

higher than input voltage. The uP7558 is available in

TSOT23-5L, TSOT23-5L(Flip-Chip), SOT23 - 5L, and

MSOP-8L packages.

CB IEC60950-1 Certification

Applications

Notebook and Desktop PCs

USB Power Management

ACPI Power Distribution

Hot-Plug Power Supplies

Battery-Powered Equipments

Battery-Charger Circuits

Pin Configuration

OC#

GND

VOUT

GND

OC#

VIN

VOUT

GND

OC#

VIN

EN/EN#

VIN

EN/EN#

SOT23-5L

(uP7558RMA5/uP7558SMA5)

TSOT23-5L

(uP7558PMT5/uP7558QMT5)

SOT23-5L

(uP7558PMA5/uP7558QMA5)

VOUT

GND

OC#

VIN

GND

VIN

VOUT

OC#

VIN

EN/EN#

MSOP-8L

(uP7558PRA8/uP7558QRA8)

TSOT23-5L Flip-Chip

(uP7558PMD5/uP7558QMD5)

uP7558-DS-C3001, May 2018

www.upi-semi.com

Conceptual

uP7558

Ordering Information

Order Number

uP7558PRA8-XX

uP7558QRA8-XX

uP7558PMA5-XX

uP7558QMA5-XX

uP7558RMA5-XX

uP7558SMA5-XX

uP7558PMT5-XX

uP7558QMT5-XX

uP7558PMD5-XX

uP7558QMD5-XX

Package

MSOP-8L

Remark

Enable Active High

Enable Active Low

Enable Active High

Enable Active Low

Enable Active High

Enable Active Low

Enable Active High

Enable Active Low

Enable Active High

Enable Active Low

MSOP-8L

SOT23-5L

TSOT23-5L

TSOT23-5L (Flip-Chip)

Code XX

Typical Current Limit (A)

Typical Short Circuit Current (A)

1.5

2.1

2.5

3.3

4.3

0.9

1.0

1.5

2.0

2.6

Note:

(1) Please check the sample/production availability with uPI representatives.

(2) uPI products are compatible with the current IPC/JEDEC J-STD-020 requirement. They are halogen-free, RoHS

compliant and 100% matte tin (Sn) plating that are suitable for use in SnPb or Pb-free soldering processes.

Typical Application Circuit

OFF

VOUT

GND

EN/EN#

VIN

V_OUT

0.1uF

150uF

V_IN

100k

VIN

10uF

0.1uF

OC#

uP7558-DS-C3001, May 2018

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Conceptual

uP7558

Functional Pin Description

Pin Name Pin Function

Fault Flag. This is an active-low, open-drain fault flag output for the power switch. A 8ms deglitch on

both the rising and falling edges avoids false triggering at startup and during transients.

OC#

Output Voltage. This pins is output from N-Channel MOSFET Source. Bypass this pin with a

minimum 22uF capacitor to ground.

VOUT

Ground.

GND

Enable Input. This is the enable input to turn on/off the power switch.

EN/EN#

Supply Input. This is the input pin to N-Channel MOSFET Drain and supply to control circuit. Bypass

this pin with a 10uF capacitor to ground.

VIN

Functional Block Diagram

Output Reverse Voltage/Current

Protection

VIN

VOUT

Charge

Pump

Enable

Logic

EN#

Driver

Current Limit

OC#

GND

Thermal

Sense

Deglitch

UVLO

uP7558-DS-C3001, May 2018

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Conceptual

uP7558

Functional Description

Power Switch

Over Current Limit

The power switch is anN-channel MOSFET with a low on- The uP7558 continuous monitors the output current for over

state resistance. Configured as a high-side switch, the current protection to protect the system power, the power

power switch prevents current flow from VOUT to VINand switch, and the load from damage during output short circuit

VIN to VOUT when disabled. The power switch is controlled or soft start interval. When an overload or short circuit is

by a logic enable input and driven by an internal charge encountered, the current-sense circuitry sends a control

pump circuit. When the output load exceeds the current- signal to the driver. The driver in turn reduces the gate

limit threshold or a short is present, the uP7558 asserts voltage and drives the power FET into its saturation region,

over current protection and limits the output current to a which switches the output into a constant-current mode

safe level by driving the power switch into saturation mode. and holds the current constant while varying the voltage on

the load.

Charge Pump

Fault Flag

An internal charge pump supplies power to the driver circuit

and provides the necessary voltage to pull the gate of the The uP7558 asserts fault condition and pulls low OC# when

MOSFET above the source. The charge pump operates over current, over temperature condition is encountered.

from input voltage.

The output remains asserted until the over current and over

temperature condition is removed.A8ms deglitch on both

the rising and falling edges avoids false triggering at startup

and during transients. If an over temperature shutdown or

over current occurs,the OC# is asserted instantaneously.

Driver

The driver controls the gate voltage of the power switch. To

limit large current surges and reduce the associated

electromagnetic interference (EMI) produced, the driver

incorporates circuitry that controls the rise times and fall

times of the output voltage.

Over Temperature Protection

The uP7558 continuously monitor the operating temperature

of the power switch for over temperature protection. The

uP7558 asserts over temperature and turns off the power

switch to prevent the device from damage if the junction

temperature rises to approximately 135^OC due over current

or short-circuit conditions. Hysteresis is built into the

thermal sense, the switch will not turns back on until the

device has cooled approximately 20 degrees. The open-

drain false reporting output (OC#) is asserted (active low)

when an over temperature shutdown or over current occurs.

Chip Enable

Refer to Ordering Information,the uP7558 has active high

(EN) or active low (EN#).The ENpin receives aTTLor CMOS

compatible input to enable/disable the uP7558 Logic low

disables the power switch, charge pump, gate driver and

other circuitry and reduces the supply current down to less

than 1uA.Logic high restores bias to the drive and control

circuits and turns the switch on.

The EN# pin receives a TTL or CMOS compatible input to

enable/disable the uP7558. Logic high disables the power

switch, charge pump, gate driver and other circuitry

and reduces the supply current down to less than 1uA.

Logic low restores bias to the drive and control circuits and

turns the switch on.

Output Voltage Discharge When Disabled

The output voltage is discharged through an internal resistor

when the output voltage is disabled.

Soft Start

The uP7558 features soft start function to eliminate the

inrush current into downstream and voltage droop of

upstream when hot-plug-in with capacitive loads. The soft

start interval is 0.9ms typically. The uP7558 current limit

function may be active during the plug-in of extreme large

capacitive load. The fault flag is masked during the softstart

interval.

Under Voltage Lockout

A voltage sense circuit monitors the input voltage. When

the input voltage is below approximately 2.2V, a control

signal turns off the power switch.

uP7558-DS-C3001, May 2018

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Conceptual

uP7558

Functional Description

Reverse-Current Limit and Reverse-Voltage Protection

The uP7558 has a reverse current limit feature that protects the input source against significant back current flow from

output to input when the output side voltage is higher than the input side. This feature is activated and clamped to a

reverse-current level (200mAtypical) at a deglitch time of 4ms when the output side voltage is higher than the input side.

After 4ms deglitch time, the N-channel MOSFET is turned off, no current flows from the output to the input. The N-

channel MOSFET will be turned on if the output side voltage is lower than the input side (5mV typical).

In addition to reverse current limit, reverse voltage protection is also implemented.Areverse voltage comparator controls

theN-channel MOSFET to be turned ONor OFF. TheN-channel MOSFET is turned off after 40us (typical) deglitch time

as soon as VOUT-VIN exceeds 60mV. It turns on within 40us (typical) deglitch time until the voltage VOUT-VIN falls

below -40mV. The following Figures show typical protection behavior implementation using the uP7558.

Reverse Current

Limit Release Point

I_RCLX R_DS(ON)

0mV

VOUT-VIN

IOUT

MOS

Turn off

Reverse Current

Limit Trip Point

MOS

Turn on

T_DEG

OC#

Reverse Current Limit Protection

Reverse Voltage

Trip Point

Reverse Voltage

Release Point

0mV

VOUT-VIN

IOUT

MOS

Turn off

Reverse Current

Limit Trip Point

MOS

Turn on

OC#

Reverse Voltage Protection

uP7558-DS-C3001, May 2018

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Conceptual

uP7558

Absolute Maximum Rating

(Note 1)

Supply Input Voltage, VIN------------------------------------------------------------------------------------------------------------ -0.3V to +6V

Other Pins ------------------------------------------------------------------------------------------------------------------------------------- -0.3V to +6V

StorageTemperature Range ----------------------------------------------------------------------------------------------------------- -65^OC to +150^OC

JunctionTemperature ------------------------------------------------------------------------------------------------------------------------------------ 150^OC

LeadTemperature (Soldering, 10 sec) ------------------------------------------------------------------------------------------------------------ 260^OC

ESD Rating (Note 2)

HBM (Human Body Mode) --------------------------------------------------------------------------------------------------------------------- 2kV

MM (Machine Mode) ----------------------------------------------------------------------------------------------------------------------------- 200V

CDM (ChargedDevice Mode) ----------------------------------------------------------------------------------------------------------------- 1000V

Thermal Information

Package Thermal Resistance (Note 3)

TSOT23-5L θ_JA--------------------------------------------------------------------------------------------------------------------------- 250°C/W

TSOT23-5L θ_JC--------------------------------------------------------------------------------------------------------------------------- 100°C/W

TSOT23-5L (Flip-Chip)θ_JA---------------------------------------------------------------------------------------------------------- 126.5°C/W

SOT23-5L θ_JA----------------------------------------------------------------------------------------------------------------------------- 250°C/W

SOT23-5L θ_JC---------------------------------------------------------------------------------------------------------------------------- 140°C/W

MSOP-8L θ_JA---------------------------------------------------------------------------------------------------------------------------- 160°C/W

MSOP-8L θ_JC---------------------------------------------------------------------------------------------------------------------------- 40°C/W

PowerDissipation, P_D@ T_A= 25°C

TSOT23-5L ------------------------------------------------------------------------------------------------------------------------------------------ 0.40W

TSOT23-5L (Flip-Chip) --------------------------------------------------------------------------------------------------------------------------- 0.79W

SOP23-5L -------------------------------------------------------------------------------------------------------------------------------------------- 0.40W

MSOP-8L -------------------------------------------------------------------------------------------------------------------------------------------- 0.63W

Recommended Operation Conditions

(Note 4)

Operating Junction Temperature Range ---------------------------------------------------------------------------------- -40°C to +125°C

OperatingAmbient Temperature Range -------------------------------------------------------------------------------------- -40°C to +85°C

Supply Input Voltage, V_IN------------------------------------------------------------------------------------------------------ +2.7V to +5.5V

Electrical Characteristics

(V_IN= 5V, T_A= 25^OC, unless otherwise specified)

Parameter

Symbol Test Conditions

Min Typ Max Units

Supply Input

Suppy Input Voltage

Under Voltage Lockout

UVLO Hysteresis

Shutdown Current

Quiescent Current

2.7

5.5

V_UVLO

∆V_UVLO

I_SD

V_INrising

2.0 2.2 2.4

0.1

No load on V_OUT, disabled.

No load on V_OUT, enabled.

I_Q

100

uP7558-DS-C3001, May 2018

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Conceptual

uP7558

Electrical Characteristics

Parameter

Chip Enable

Symbol

Test Conditions

Min

Typ Max Units

2.7V < V_IN< 5.5V

Logic High Threshold

Logic Low Threshold

Enable Input Current

Turn On Time (Note 5)

Turn Off Time (Note 5)

Output Rise Time

1.4

0.4

0.5

0V < V_EN, V_EN#< 5.5V

-0.5

C_L= 1uF, R_L= 10Ω

T_ON

T_OFF

T_R

C_L= 1uF, R_L= 10Ω

0.1

0.9

0.1

C_L= 1uF, R_L= 10Ω

0.6

1.2

0.3

C_L= 1uF, R_L= 10Ω

Output Fall Time

T_F

V_IN= 5V, V_OUT= 5V,disabled. uP7558XXXX-XX

V_IN= 5V, V_OUT= 5V,disabled. uP7558PMD5-XX

V_IN= 5V, V_OUT= 5V,disabled. uP7558QMD5-XX

Output Discharge

Resistance when Disabled

200

300

Ω

Power Switch

N-MOSFET ON Resistance

(Note 6)

Test current = 0.5A

uP7558XXXX-XX

R_DS(ON)

mΩ

N-MOSFET ON Resistance

for TSOT23-5L Flip-Chip

Package Only

uP7558PMD5-XX

uP7558QMD5-XX

R_DS(ON)

(Note 6)

Current Limit

uP7558XXXX-10

uP7558XXXX-15

uP7558XXXX-20

uP7558XXXX-25

uP7558XXXX-30

uP7558XXXX-10

uP7558XXXX-15

uP7558XXXX-20

uP7558XXXX-25

uP7558XXXX-30

0.9

1.0

1.5

2.0

2.6

1.5

2.1

2.5

3.3

4.3

V_IN= 5.0V, V_OUTconnected to

GND, device enabled into

short-circuit

Short Circuit Output Current

I_SC

1.1

1.6

2.1

3.1

3.6

2.0

2.7

3.1

5.0

V_IN= 5.0V, current ramp <

100A/s on V_OUT

Over Current Trip Threshold

I_{SC_TRI}

Output Reverse Voltage Protection

Output Reverse Voltage

Trigger Point

V_OUT- V_IN

V_IN-V_OUT

Output Reverse Voltage

Release Trigger Point

VOUT Shutdown Current

I_{SD_OUT}V_OUT= 5.5V, VIN Short to GND

uP7558-DS-C3001, May 2018

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Conceptual

uP7558

Electrical Characteristics

Parameter

Symbol

Test Conditions

Min

Typ Max Units

Output Reverse Current Protection

Output Reverse Current

Threshold

0.2

Output Reverse Current

Deglitch Time

Over Temperature Protection

Shutdown-Level Threshold

Thermal Shutdown Hysteresis

Fault Flag (OC#)

Guarantee by design

135

^OC

Output Low Voltage

Off State Current

OC# Deglitch

V_OL

I_OC#= 5mA

0.4

_OC#= 5.5V

OC# assertion and deassertion delay

Note 1. Stresses beyond those listed as the above Absolute Maximum Ratings may cause permanent damage to

the device. These are for stress ratings only. Functional operation of the device at these or any other

conditions beyond those indicated in the Recommended Operation Condition section of the specifications is

not implied. Exposure to absolute maximum rating conditions for extended periods may remain possibility

to affect device reliability.

Note 2. Devices are ESDsensitive. Handling precaution recommended.

Note 3. θ_JAis measured in the natural convection at T_A= 25^OC on a low effective thermal conductivity test board of

JEDEC 51-3 thermal measurement standard.

Note 4. The device is not guaranteed to function outside its operating conditions.

Note 5. These items are not tested in production, specified by design.

Note 6. Catalog by pulsed current, duration 1mS, Frequency 100Hz.

uP7558-DS-C3001, May 2018

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Conceptual

uP7558

Electrical Characteristics

EN#

VOUT

T_R

T_F

T_ON

T_OFF

OC#

OC Trip Threshold

I_{SC_TRIP}

I_OUT

SC Output Current

I_SC

OCP Event

OTP Event

OTP Release

uP7558-DS-C3001, May 2018

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Conceptual

uP7558

Typical Operation Characteristics

Turn On

Turn Off

EN (2V/Div)

VOUT (2V/Div)

OC# (5V/Div)

EN (2V/Div)

VOUT (2V/Div)

OC# (5V/Div)

IOUT (500mA/Div)

Time : 200us/Div

VIN = 5V, VOUT = 5V, CL = 1uF, RL = 10Ω

OC# Response

Turn On at Short-Circuit

EN (5V/Div)

VOUT (2V/Div)

OC# (5V/Div)

VOUT (2V/Div)

IOUT (2A/Div)

IOUT (2A/DIV)

Time : 10ms/Div

VIN = 5V, VOUT = 5V, CL = 1uF

Time : 10ms/Div

VIN = 5V, VOUT = 5V, CL = 1uF

Quiescent Current vs. VIN

R_DS(ON)

100

80.0

70.0

uP7558, T = 25^oC

60.0

50.0

uP7558 (Flip-Chip), T =25^oC

40.0

30.0

20.0

2.5

3.5

4.5

VIN (V)

VIN = 2.7V ~ 6V, VOUT = 0.5V, No Load

5.5

6.5

VIN (V)

VIN= 2.7V ~ 5.5V, IOUT = 0.5A

uP7558-DS-C3001, May 2018

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Conceptual

uP7558

Application Information

Supply Input Filtering

The junction temperature is calculated as T_A+ 24^OC, where

T_Ais the expected maximum ambient temperature. A few

iterations are required until get final solutions.

VIN pins supply power to the power switch and internal

circuit. Both of them should be connect to upstrem power

supply with short and wide trace on the PCB.

Layout Consideration

The power circuitry of USB printed circuit boards requires

a customized layout to maximize thermal dissipation and

to minimized voltage drop and EMI

Place the device physically as close to the USB port

as possible. Keep all traces wide, short and direct to

minimized the parasitic inductance. This optimizes the

switch response time to output short circuit conditions.

Place both input and output bypass capacitors near to

the device.

Events such as hot-plug/unplug, output short circuit and

over temperature result in step change of input current with

sharp edges, which in turn causes voltage transient at supply

input due to di/dit effect of parasitic inductance on the current

path.A0.1uF ceramic capacitor fromVINtoGND, physically

located near the device is strongly recommended to control

the supply input transient. Minimizing the parasitic

inductance along the current path also alleviate the voltage

transient at the supply input.

All VOUT pins should be connected together on the

PCB. All VIN pins should be connected together on

the PCB.

Output Voltage Filtering

Bypassing the output voltage with a 0.1uF ceramic capacitor

improves the immunity of the device against output short

circuit and hot plug/unplug of load. Alower ESR capacitor

results in lower voltage drop against a step load change. A

large electrolytic capacitor from VOUT to GND is also

recommended. This capacitor reduces power supply

transient that may cause ringing on the input.

GND

VIN

VOUT

OC#

USB supports dynamic attachment (hot plug-in) of

peripherals. A current surge is caused by the input

capacitance of downstream device. Ferrite beads are

recommended in series with all power and ground connector

pins. Ferrite beads reduce EMI and limit the inrush current

during hot-attachment by filtering high-frequency signals.

The DC resistance of the ferrite bead should be specially

taken care to reduce the voltage drop.

V_IN

VIN

EN/EN#

V_OUT

Voltage Drop and Power Dissipation

Temperature effect should be well considered when dealing

with voltage drop and power dissipation. The maximum

R_DS(ON)of the power switch is 75mΩ under 25^OC junction

temperature. If the device is expected to operate at 125^OC

junction temperature, the R_DS(ON)will become

75mΩ ×

[

(

125°C − 25°C

)

×0.35%/°C = 101.25mΩ

]

where 0.35%/^OC is the approximated temperature coefficient

of the R_DS(ON).

If the maximum load current is expected to be 1.2A, the

maximum voltage will become

1.2A ×101.25mΩ = 121.5mV

This in turn will cause power dissipation as

1.2A ×121.5mV = 145.8mW

The temperature raise is calculated as

145.8mΩ ×160°C/ W = 24°C

uP7558-DS-C3001, May 2018

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Conceptual

uP7558

Package Information

SOT23-5LPackage

2.80 - 3.00

0.95 BSC

0.30 - 0.50

0.00 - 0.15

1.90 BSC

Note

1.Package Outline UnitDescription:

BSC: Basic. Represents theoretical exact dimension or dimension target

MIN: Minimum dimension specified.

MAX: Maximum dimension specified.

REF: Reference. Represents dimension for reference use only. This value is not a device specification.

TYP. Typical. Provided as a general value. This value is not a device specification.

2.Dimensions in Millimeters.

3.Drawing not to scale.

4.These dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15mm.

uP7558-DS-C3001, May 2018

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Conceptual

uP7558

Package Information

TSOT23 - 5L Package

2.80 - 3.02

0.95 BSC

0.30 - 0.51

1.10 MAX

0.00 - 0.10

1.90 BSC

Note

1.Package Outline UnitDescription:

BSC: Basic. Represents theoretical exact dimension or dimension target

MIN: Minimum dimension specified.

MAX: Maximum dimension specified.

REF: Reference. Represents dimension for reference use only. This value is not a device specification.

TYP. Typical. Provided as a general value. This value is not a device specification.

2.Dimensions in Millimeters.

3.Drawing not to scale.

4.These dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15mm.

uP7558-DS-C3001, May 2018

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Conceptual

uP7558

Package Information

TSOT23 - 5L (Flip-Chip) Package

2.80 - 3.02

0.95 BSC

0.30 - 0.51

1.10 MAX

0.00 - 0.10

1.90 BSC

Note

1.Package Outline UnitDescription:

BSC: Basic. Represents theoretical exact dimension or dimension target

MIN: Minimum dimension specified.

MAX: Maximum dimension specified.

REF: Reference. Represents dimension for reference use only. This value is not a device specification.

TYP. Typical. Provided as a general value. This value is not a device specification.

2.Dimensions in Millimeters.

3.Drawing not to scale.

4.These dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15mm.

uP7558-DS-C3001, May 2018

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Conceptual

uP7558

Package Information

MSOP - 8L Package

2.90 - 3.10

0.65 BSC

0.22-0.38

1.10 MAX

0.00 - 0.15

Note

1.Package Outline UnitDescription:

BSC: Basic. Represents theoretical exact dimension or dimension target

MIN: Minimum dimension specified.

MAX: Maximum dimension specified.

REF: Reference. Represents dimension for reference use only. This value is not a device specification.

TYP. Typical. Provided as a general value. This value is not a device specification.

2.Dimensions in Millimeters.

3.Drawing not to scale.

4.These dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15mm.

uP7558-DS-C3001, May 2018

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Conceptual

uP7558

Important Notice

uPI and its subsidiaries reserve the right to make corrections, modifications, enhancements, improvements, and other

changes to its products and services at any time and to discontinue any product or service without notice. Customers

should obtain the latest relevant information before placing orders and should verify that such information is current and

complete.

uPI products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment.

However, no responsibility is assumed by uPI or its subsidiaries for its use or application of any product or circuit; nor

for any infringements of patents or other rights of third parties which may result from its use or application, including but

not limited to any consequential or incidental damages. No uPI components are designed, intended or authorized for

use in military, aerospace, automotive applications nor in systems for surgical implantation or life-sustaining. No license

is granted by implication or otherwise under any patent or patent rights of uPI or its subsidiaries.

uPI Semiconductor Corp.

Sales Branch Office

uPI Semiconductor Corp.

Headquarter

12F-5, No. 408, Ruiguang Rd. NeihuDistrict,

Taipei Taiwan, R.O.C.

TEL : 886.2.8751.2062 FAX : 886.2.8751.5064

9F.,No.5, Taiyuan 1st St. Zhubei City,

Hsinchu Taiwan, R.O.C.

TEL : 886.3.560.1666 FAX : 886.3.560.1888

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uP7558PMD5 [UPI]

相关型号：

uP7558PMT5

uP7558PRA8

uP7558QMA5

uP7558QMD5

uP7558QMT5

uP7558QRA8

uP7558RMA5

uP7558SMA5

UP7706

UP7706ADC8

UP7706U8

UP7718