BCM6123XD1E2663YZZ [VICOR]
Isolated Fixed Ratio DC-DC Converter;
| 型号： | BCM6123XD1E2663YZZ |
| 厂家： | 
VICOR CORPORATION |
| 描述： | Isolated Fixed Ratio DC-DC Converter |
| 文件： | 总28页 (文件大小：851K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
BCM® Bus Converter
BCM6123xD1E2663yzz
S
®
C
NRTL US
Isolated Fixed Ratio DC-DC Converter
Features & Benefits
Product Ratings
• Up to 62.5A continuous secondary current
• Up to 2352W/in3 power density
• 97.4% peak efficiency
VPRI = 384V (260 – 410V)
ISEC = up to 62.5A
K = 1/16
VSEC = 24V (16.3 – 25.6V)
(no load)
• 4242VDC isolation
Product Description
• Parallel operation for multi-kW arrays
• OV, OC, UV, short circuit and thermal protection
• 6123 through-hole ChiP package
The BCM6123xD1E2663yzz is a high efficiency Bus Converter
operating from a 260 to 410VDC primary bus to deliver an isolated,
ratiometric secondary voltage from 16.3 to 25.6VDC
.
■■2.402” x 0.990” x 0.284”
The BCM6123xD1E2663yzz offers low noise, fast transient
response, and industry leading efficiency and power density. In
addition, it provides an AC impedance beyond the bandwidth of
most downstream regulators, allowing input capacitance normally
located at the input of a POL regulator to be located at the primary
side of the BCM. With a primary to secondary K factor of 1/16, that
capacitance value can be reduced by a factor of 256x, resulting in
savings of board area, material and total system cost.
(61.00mm x 25.14mm x 7.21mm)
• PMBusTM management interface *
Typical Applications
• 380VDC Power Distribution
• High End Computing Systems
• Automated Test Equipment
• Industrial Systems
Leveraging the thermal and density benefits of Vicor’s ChiP
packaging technology, the BCM offers flexible thermal
management options with very low top and bottom side thermal
impedances. Thermally-adept ChiP-based power components
enable customers to achieve low cost power system solutions
with previously unattainable system size, weight and efficiency
attributes quickly and predictably.
• High Density Power Supplies
• Communications Systems
• Transportation
*When used with D44TL1A0 and I13TL1A0 chipset
BCM® Bus Converter
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BCM6123xD1E2663yzz
Typical Applications
BCM
TM
EN
enable/disable
switch
VAUX
F1
+VPRI
–VPRI
+VSEC
VPRI
CPRI
POL
–VSEC
GND
PRIMARY
SECONDARY
ISOLATION BOUNDARY
BCM6123xD1E2663y00 at point of load
BCM
SER-OUT
SER-OUT
EN
SER-IN
enable/disable
switch
SER-IN
FUSE
+VPRI
–VPRI
+VSEC
VPRI
C
POL
I_BCM_ELEC
–VSEC
PRIMARY
SECONDARY
SOURCE_RTN
Digital
Supervisor
D44TL1A0
ISOLATION BOUNDARY
Digital Isolator
Host µC
I13TL1A0
NC
PRI_OUT_A
SEC_IN_A
SEC_IN_B
SEC_OUT_C
SEC_COM
VDDB
t
SER-IN
+
–
V
EXT
VDD
TXD
PRI_OUT_B
PRI_IN_C
SER-OUT
SGND
RXD
PRI_COM
SGND
PMBus
PMBus
SGND
SGND
SGND
BCM6123xD1E2663y01 at point of load
BCM® Bus Converter
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Typical Applications (Cont.)
3 phase AIM
BCM ChiP
+
-
+VPRI
+VSEC
TM/SER-OUT
EN
VAUX/SER-IN
L
O
A
D
L1
L2
L3
-VPRI
-VSEC
ISOLATION BOUNDARY
3 phase AC to point of load (3 phase AIM + BCM6123xD1E2663yzz)
BCM® Bus Converter
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BCM6123xD1E2663yzz
Pin Configuration
TOP VIEW
2
1
A’ +VSEC
A
B
C
D
E
+VSEC
-VSEC
2
B’
C’
-VSEC1
-VSEC
2
-VSEC
1
+VSEC
+VSEC
D’ +VSEC
E’ +VSEC
-VSEC
2
2
F’
-VSEC
1
1
F
G
H
G’
-VSEC
-VSEC
+VSEC
H’ +VSEC
+VPRI
+VPRI
+VPRI
I’
J’
K’
I
J
TM/SER-OUT
EN
VAUX/SER-IN
K
-VPRI
+VPRI
L’
L
6123 ChiP Package
Pin Descriptions
Power Pins
Pin Number
Signal Name
Type
Function
I1, J1, K1, L1
+VPRI
PRIMARY POWER
Positive primary transformer power terminal
Negative primary transformer power terminal
PRIMARY POWER
RETURN
L’2
-VPRI
A1, D1, E1, H1, A’2,
D’2, E’2, H’2
SECONDARY
POWER
+VSEC
Positive secondary transformer power terminal
Negative secondary transformer power terminal
B1, C1, F1, G1
B’2, C’2, F’2, G’2
SECONDARY
POWER RETURN
-VSEC
*
Analog Control Signal Pins
Pin Number
Signal Name
Type
Function
I’2
J’2
TM
EN
OUTPUT
INPUT
Temperature Monitor; primary side referenced signals
Enables and disables power supply; primary side referenced signals
Auxiliary Voltage Source; primary side referenced signals
K’2
VAUX
OUTPUT
PMBus Control Signal Pins
Pin Number
Signal Name
Type
Function
I’2
J’2
SER-OUT
EN
OUTPUT
INPUT
UART transmit pin; Primary side referenced signals
Enables and disables power supply; Primary side referenced signals
UART receive pin; Primary side referenced signals
K’2
SER-IN
INPUT
*For proper operation an external low impedance connection must be made between listed -VSEC1 and -VSEC2 terminals.
BCM® Bus Converter
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Part Ordering Information
Max
Secondary
Voltage
Secondary
Output
Current
Product
Function
Package Package
Max Primary
Range
Identifier
Temperature
Option
Size
Mounting Input Voltage
Grade
BCM
6123
x
D1
E
26
63
y
zz
00 = Analog Ctrl
01 = PMBus Ctrl
T = -40°C – 125°C
Bus Converter
Module
61 = L
23 = W
25.6V
No Load
T = TH
410V
260 – 410V
62.5A
M = -55°C – 125°C 0R = Reversible Analog Ctrl
0P = Reversible PMBus Ctrl
All products shipped in JEDEC standard high profile (0.400” thick) trays (JEDEC Publication 95, Design Guide 4.10).
Standard Models
Max
Secondary
Voltage
Secondary
Output
Current
Product
Function
Package
Size
Package
Mounting
Max Primary
Input Voltage
Range
Identifier
Temperature
Grade
Option
BCM
BCM
BCM
BCM
6123
6123
6123
6123
T
T
T
T
D1
D1
D1
D1
E
E
E
E
26
26
26
26
63
63
63
63
M
T
00
00
01
01
M
T
Absolute Maximum Ratings
The absolute maximum ratings below are stress ratings only. Operation at or beyond these maximum ratings can cause permanent damage to the device.
Parameter
Comments
Min
Max
Unit
+VPRI_DC to –VPRI_DC
-1
480
V
VPRI_DC or VSEC_DC Slew Rate
(Operational)
1
V/µs
+VSEC_DC to –VSEC_DC
TM / SER-OUT to –VPRI_DC
EN to –VPRI_DC
-1
30
4.6
5.5
4.6
V
V
V
V
-0.3
VAUX / SER-IN to –VPRI_DC
BCM® Bus Converter
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Electrical Specifications
Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of
-55°C ≤ TINTERNAL ≤ 125°C (M-Grade); all other specifications are at TINTERNAL = 25ºC unless otherwise noted.
Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
General Powertrain PRIMARY to SECONDARY Specification (Forward Direction)
Primary Input Voltage Range
(Continuous)
VPRI_DC
260
410
V
V
VPRI_DC voltage where µC is initialized,
(ie VAUX = Low, powertrain inactive)
VPRI µController
VµC_ACTIVE
130
Disabled, EN Low, VPRI_DC = 384V
TINTERNAL ≤ 100ºC
2
PRI to SEC Input Quiescent Current
IPRI_Q
mA
4
VPRI_DC = 384V, TINTERNAL = 25ºC
VPRI_DC = 384V
13
20
27
21
29
6
PRI to SEC No Load Power
Dissipation
PPRI_NL
W
VPRI_DC = 260V to 410V, TINTERNAL = 25ºC
VPRI_DC = 260V to 410V
VPRI_DC = 410V, CSEC_EXT = 1000µF, RLOAD_SEC = 20% of
full load current
4
PRI to SEC Inrush Current Peak
IPRI_INR_PK
A
TINTERNAL ≤ 100ºC
10
DC Primary Input Current
Transformation Ratio
IPRI_IN_DC
K
At ISEC_OUT_DC = 62.5A, TINTERNAL ≤ 100ºC
Primary to secondary, K = VSEC_DC / VPRI_DC, at no load
4.0
A
1/16
V/V
Secondary Output Current
(Continuous)
ISEC_OUT_DC
62.5
75
A
A
2ms pulse, 25% duty cycle, ISEC_OUT_AVG ≤ 50% rated
ISEC_OUT_DC
Secondary Output Current (Pulsed)
ISEC_OUT_PULSE
VPRI_DC = 384V, ISEC_OUT_DC = 62.5A
VPRI_DC = 260V to 410V, ISEC_OUT_DC = 62.5A
VPRI_DC = 384V, ISEC_OUT_DC = 31.25A
VPRI_DC = 384V, ISEC_OUT_DC = 62.5A
96.4
95.5
96.5
96.3
97.2
PRI to SEC Efficiency (Ambient)
PRI to SEC Efficiency (Hot)
ηAMB
%
97.3
96.7
ηHOT
η20%
%
%
PRI to SEC Efficiency
(Over Load Range)
12.5A < ISEC_OUT_DC < 62.5A
90
RSEC_COLD
RSEC_AMB
RSEC_HOT
FSW
VPRI_DC = 384V, ISEC_OUT_DC = 62.5A, TINTERNAL = -55°C
VPRI_DC = 384V, ISEC_OUT_DC = 62.5A
3
5
7
7
PRI to SEC Output Resistance
5
9
mΩ
VPRI_DC = 384V, ISEC_OUT_DC = 62.5A, TINTERNAL = 100°C
Frequency of the output voltage ripple = 2x FSW
6.5
1.00
8.5
1.05
10.5
1.10
Switching Frequency
MHz
mV
CSEC_EXT = 0µF, ISEC_OUT_DC = 62.5A, VPRI_DC = 384V,
20MHz BW
150
Secondary Output Voltage Ripple
VSEC_OUT_PP
TINTERNAL ≤ 100ºC
250
Primary Input Leads Inductance
(Parasitic)
Frequency 2.5MHz (double switching frequency),
simulated lead model
LPRI_IN_LEADS
LSEC_OUT_LEADS
LIN_INT
7
nH
nH
µH
Secondary Output Leads Inductance
(Parasitic)
Frequency 2.5MHz (double switching frequency),
simulated lead model
0.64
0.56
Primary Input Series Inductance
(Internal)
Reduces the need for input decoupling inductance
in BCM arrays
BCM® Bus Converter
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Rev 1.1
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BCM6123xD1E2663yzz
Electrical Specifications (Cont.)
Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of
-55°C ≤ TINTERNAL ≤ 125°C (M-Grade); all other specifications are at TINTERNAL = 25ºC unless otherwise noted.
Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
General Powertrain PRIMARY to SECONDARY Specification (Forward Direction) Cont.
Effective Primary Capacitance
(Internal)
CPRI_INT
CSEC_INT
Effective value at 384VPRI_DC
Effective value at 24VSEC_DC
0.37
70
µF
µF
µF
Effective Secondary Capacitance
(Internal)
Rated Secondary Output
Capacitance (External)
Excessive capacitance may drive module into
short circuit protection
CSEC_OUT_EXT
1000
Rated Secondary Output
Capacitance (External),
Parallel Array Operation
CSEC_OUT_AEXT Max = N * 0.5 * CSEC_OUT_EXT MAX, where
N = the number of units in parallel
CSEC_OUT_AEXT
Powertrain Protection PRIMARY to SECONDARY (Forward Direction)
Startup into a persistent fault condition. Non-latching
fault detection given VPRI_DC > VPRI_UVLO+
Auto Restart Time
tAUTO_RESTART
VPRI_OVLO+
VPRI_OVLO-
490
560
450
440
ms
V
Primary Overvoltage
Lockout Threshold
420
410
435
425
10
100
1
Primary Overvoltage
Recovery Threshold
V
Primary Overvoltage
Lockout Hysteresis
VPRI_OVLO_HYST
tPRI_OVLO
V
Primary Overvoltage
Lockout Response Time
µs
ms
A
From powertrain active. Fast current limit protection
disabled during soft-start
Primary Soft-Start Time
tPRI_SOFT-START
ISEC_OUT_OCP
tSEC_OUT_OCP
ISEC_OUT_SCP
tSEC_OUT_SCP
tOTP+
Secondary Output Overcurrent
Trip Threshold
75
94
84
3
110
Secondary Output Overcurrent
Response Time Constant
Effective internal RC filter
ms
A
Secondary Output Short Circuit
Protection Trip Threshold
Secondary Output Short Circuit
Protection Response Time
1
µs
°C
Overtemperature
Shutdown Threshold
Temperature sensor located inside controller IC
125
BCM® Bus Converter
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Rev 1.1
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BCM6123xD1E2663yzz
Electrical Specifications (Cont.)
Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of
-55°C ≤ TINTERNAL ≤ 125°C (M-Grade); all other specifications are at TINTERNAL = 25ºC unless otherwise noted.
Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
Powertrain Supervisory Limits PRIMARY to SECONDARY (Forward Direction)
Primary Overvoltage
Lockout Threshold
VPRI_OVLO+
VPRI_OVLO-
VPRI_OVLO_HYST
tPRI_OVLO
420
410
435
425
10
450
440
V
V
Primary Overvoltage
Recovery Threshold
Primary Overvoltage
Lockout Hysteresis
V
Primary Overvoltage
Lockout Response Time
100
225
240
15
µs
V
Primary Undervoltage
Lockout Threshold
VPRI_UVLO-
200
220
250
259
Primary Undervoltage
Recovery Threshold
VPRI_UVLO+
VPRI_UVLO_HYST
tPRI_UVLO
V
Primary Undervoltage
Lockout Hysteresis
V
Primary Undervoltage
Lockout Response Time
100
µs
From VPRI_DC = VPRI_UVLO+ to powertrain active, EN
Primary Undervoltage Startup Delay tPRI_UVLO+_DELAY floating (i.e., one time startup delay from application
of VPRI_DC to VSEC_DC
20
ms
)
Secondary Output Overcurrent
Trip Threshold
ISEC_OUT_OCP
tSEC_OUT_OCP
tOTP+
83
88
3
93
A
ms
°C
°C
°C
s
Secondary Output Overcurrent
Response Time Constant
Effective internal RC filter
Overtemperature
Shutdown Threshold
Temperature sensor located inside controller IC
125
Overtemperature
Recovery Threshold
tOTP–
105
110
3
115
-45
Undertemperature
Shutdown Threshold
Temperature sensor located inside controller IC;
Protection not available for M-Grade units.
tUTP
Startup into a persistent fault condition. Non-latching
fault detection given VPRI_DC > VPRI_UVLO+
Undertemperature Restart Time
tUTP_RESTART
BCM® Bus Converter
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80
60
40
20
0
20
40
60
80
100
120
140
Case Temperature (°C)
Top only at temperature
Top and leads at
temperature
Top, leads, & belly at
temperature
Figure 1 — Specified thermal operating area
2500
2250
2000
1750
1500
1250
1000
750
100
90
80
70
60
50
40
30
20
10
0
500
250
0
260 275 290 305 320 335 350 365 380 395 410
260 275 290 305 320 335 350 365 380 395 410
Primary Input Voltage (V)
Primary Input Voltage (V)
PSEC_OUT_DC
PSEC_OUT_PULSE
ISEC_OUT_DC
ISEC_OUT_PULSE
Figure 2 — Specified electrical operating area using rated RSEC_HOT
110
100
90
80
70
60
50
40
30
20
10
0
0
20
40
60
80
100
Secondary Output Current (% ISEC_OUT_DC
)
Figure 3 — Specified primary startup into load current and external capacitance
BCM® Bus Converter
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Analog Control Signal Characteristics
Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of
-55°C ≤ TINTERNAL ≤ 125°C (M-Grade); all other specifications are at TINTERNAL = 25ºC unless otherwise noted.
Temperature Monitor
• The TM pin is a standard analog I/O configured as an output from an internal µC.
• The TM pin monitors the internal temperature of the controller IC within an accuracy of 5°C.
• µC 250kHz PWM output internally pulled high to 3.3V.
SIGNAL TYPE
STATE
ATTRIBUTE
SYMBOL
CONDITIONS / NOTES
MIN
TYP MAX UNIT
Powertrain Active
to TM Time
Startup
tTM
100
µs
TM Duty Cycle
TM Current
TMPWM
ITM
18.18
68.18
4
%
mA
Recommended External filtering
TM Capacitance (External)
TM Resistance (External)
CTM_EXT
RTM_EXT
Recommended external filtering
Recommended external filtering
0.01
1
µF
DIGITAL
OUTPUT
kΩ
Regular
Operation
Specifications using recommended filter
TM Gain
ATM
10
mV / °C
V
TM Voltage Reference
VTM_AMB
1.27
RTM_EXT = 1kΩ, CTM_EXT = 0.01µF,
VPRI_DC = 384V, ISEC_DC = 62.5A
28
TM Voltage Ripple
VTM_PP
mV
TINTERNAL ≤ 100ºC
40
Enable / Disable Control
• The EN pin is a standard analog I/O configured as an input to an internal µC.
• It is internally pulled high to 3.3V.
• When held low, the BCM internal bias will be disabled and the powertrain will be inactive.
• In an array of BCMs, EN pins should be interconnected to synchronize startup.
SIGNAL TYPE
STATE
ATTRIBUTE
SYMBOL
CONDITIONS / NOTES
MIN
2.3
TYP MAX UNIT
VPRI_DC > VPRI_UVLO+, EN held low both
conditions satisfied for T > tPRI_UVLO+_DELAY
EN to Powertrain
Active Time
Startup
tEN_START
250
µs
ANALOG
INPUT
EN Voltage Threshold
EN Resistance (Internal)
EN Disable Threshold
VEN_TH
REN_INT
V
kΩ
V
Regular
Operation
Internal pull up resistor
1.5
VEN_DISABLE_TH
1
BCM® Bus Converter
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Rev 1.1
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Analog Control Signal Characteristics (Cont.)
Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of
-55°C ≤ TINTERNAL ≤ 125°C (M-Grade); all other specifications are at TINTERNAL = 25ºC unless otherwise noted.
Auxiliary Voltage Source
• The VAUX pin is a standard analog I/O configured as an output from an internal µC.
• VAUX is internally connected to µC output and internally pulled high to a 3.3V regulator with 2% tolerance, a 1% resistor of 1.5kΩ.
• VAUX can be used as a “Ready to process full power” flag. This pin transitions VAUX voltage after a 2ms delay from the start of powertrain activating,
signaling the end of softstart.
• VAUX can be used as “Fault flag”. This pin is pulled low internally when a fault protection is detected.
SIGNAL TYPE
STATE
ATTRIBUTE
SYMBOL
CONDITIONS / NOTES
MIN
2.8
TYP MAX UNIT
Powertrain Active
to VAUX Time
Startup
tVAUX
Powertrain active to VAUX High
2
ms
VAUX Voltage
VVAUX
IVAUX
3.3
4
V
VAUX Available Current
mA
50
ANALOG
OUTPUT
Regular
Operation
VAUX Voltage Ripple
VVAUX_PP
mV
µF
TINTERNAL ≤ 100ºC
100
VAUX Capacitance
(External)
CVAUX_EXT
0.01
VAUX Resistance (External)
VAUX Fault Response Time
RVAUX_EXT
tVAUX_FR
VPRI_DC < VµC_ACTIVE
1.5
kΩ
Fault
From fault to VVAUX = 2.8V, CVAUX = 0pF
10
µs
BCM® Bus Converter
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PMBus™ Control Signal Characteristics
Specifications apply over all line, load conditions, unless otherwise noted; boldface specifications apply over the temperature range of
-55°C ≤ TINTERNAL ≤ 125°C (M-Grade); all other specifications are at TINTERNAL = 25ºC unless otherwise noted.
UART SER-IN / SER-OUT Pins
• Universal Asynchronous Receiver/Transmitter (UART) pins.
• The BCM communication version is not intended to be used without a Digital Supervisor.
• Isolated I2C communication and telemetry is available when using Vicor Digital Isolator and Vicor Digital Supervisor.
Please see specific product data sheet for more details.
• UART SER-IN pin is internally pulled high using a 1.5kΩ to 3.3V.
SIGNAL TYPE
GENERAL I/O
STATE
ATTRIBUTE
Baud Rate
SYMBOL
CONDITIONS / NOTES
MIN
TYP
750
MAX UNIT
BRUART
Rate
Kbit/s
SER-IN Pin
VSER-IN_IH
VSER-IN_IL
2.3
V
SER-IN Input Voltage Range
1
V
ns
ns
kΩ
pF
DIGITAL
INPUT
SER-IN Rise Time
SER-IN Fall Time
SER-IN RPULLUP
tSER-IN_RISE 10% to 90%
tSER-IN_FALL 10% to 90%
RSER-IN_PLP Pull up to 3.3V
CSER-IN_EXT
400
25
1.5
SER-IN External Capacitance
400
Regular
Operation
SER-OUT Pin
VSER-OUT_OH 0mA ≥ IOH ≥ -4mA
VSER-OUT_OL 0mA ≤ IOL ≤ 4mA
2.8
V
V
SER-OUT
Output Voltage Range
0.5
DIGITAL
OUTPUT
SER-OUT Rise Time
tSER-OUT_RISE 10% to 90%
tSER-OUT_FALL 10% to 90%
55
45
ns
ns
SER-OUT Fall Time
SER-OUT Source Current
SER-OUT Output Impedance
ISER-OUT
ZSER-OUT
VSER-OUT = 2.8V
6
mA
Ω
120
Enable / Disable Control
• The EN pin is a standard analog I/O configured as an input to an internal µC.
• It is internally pulled high to 3.3V.
• When held low, the BCM internal bias will be disabled and the powertrain will be inactive.
• In an array of BCMs, EN pins should be interconnected to synchronize startup.
• Enable / disable command will have no effect if the EN pin is disabled.
SIGNAL TYPE
STATE
ATTRIBUTE
SYMBOL
CONDITIONS / NOTES
MIN
2.3
TYP
250
MAX UNIT
VPRI_DC > VPRI_UVLO+
,
Startup
EN to Powertrain Active Time
tEN_START
EN held low both conditions satisfied
for t > tPRI_UVLO+_DELAY
µs
ANALOG
INPUT
EN Voltage Threshold
EN Resistance (Internal)
EN Disable Threshold
VENABLE
REN_INT
V
Regular
Operation
Internal pull up resistor
1.5
kΩ
VEN_DISABLE_TH
1
V
BCM® Bus Converter
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PMBus™ Reported Characteristics
Specifications apply over all line, load conditions, unless otherwise noted; boldface specifications apply over the temperature range of
-55°C ≤ TINTERNAL ≤ 125°C (M-Grade); all other specifications are at TINTERNAL = 25ºC unless otherwise noted.
Monitored Telemetry
• The BCM communication version is not intended to be used without a Digital Supervisor.
DIGITAL SUPERVISOR
ACCURACY
(RATED RANGE)
FUNCTIONAL
REPORTING RANGE
UPDATE
RATE
ATTRIBUTE
REPORTED UNITS
PMBusTM READ COMMAND
Input Voltage
(88h) READ_VIN
(89h) READ_IIN
5% (LL - HL)
5% (10 - 133% of FL)
5% (LL - HL)
130V to 450V
-5.9A to 5.9A
100µs
100µs
100µs
100µs
100ms
100ms
VACTUAL = VREPORTED x 10-1
IACTUAL = IREPORTED x 10-3
VACTUAL = VREPORTED x 10-1
IACTUAL = IREPORTED x 10-2
RACTUAL = RREPORTED x 10-5
TACTUAL = TREPORTED
Input Current
Output Voltage [1]
Output Current
Output Resistance
Temperature [2]
(8Bh) READ_VOUT
8.0V to 28.0V
-87.5A to 87.5A
0.5mΩ to 15mΩ
-55ºC to 130ºC
(8Ch) READ_IOUT
5% (10 - 133% of FL)
5% (50 - 100% of FL)
7°C (Full Range)
(D4h) READ_ROUT
(8Dh) READ_TEMPERATURE_1
[1] Default READ Output Voltage returned when unit is disabled = -300V.
[2] Default READ Temperature returned when unit is disabled = -273°C.
Variable Parameter
• Factory setting of all below Thresholds and Warning limits are 100% of listed protection values.
• Variables can be written only when module is disabled either EN pulled low or VIN < VIN_UVLO-
.
• Module must remain in a disabled mode for 3ms after any changes to the below variables allowing ample time to commit changes to EEPROM.
FUNCTIONAL
REPORTING
RANGE
DIGITAL SUPERVISOR
ACCURACY
(RATED RANGE)
DEFAULT
VALUE
ATTRIBUTE
CONDITIONS / NOTES
PMBusTM COMMAND [3]
Input / Output Overvoltage
Protection Limit
VIN_OVLO- is automatically 3%
lower than this set point
(55h) VIN_OV_FAULT_LIMIT
(57h) VIN_OV_WARN_LIMIT
(D7h) DISABLE_FAULTS
(5Bh) IIN_OC_FAULT_LIMIT
(5Dh) IIN_OC_WARN_LIMIT
(4Fh) OT_FAULT_LIMIT
5% (LL - HL)
5% (LL - HL)
130V to 435V
130V to 435V
130V or 260V
0 to 5.5A
100%
100%
100%
100%
100%
100%
100%
0ms
Input / Output Overvoltage
Warning Limit
Input / Output Undervoltage
Protection Limit
Can only be disabled to a preset
default value
5% (LL - HL)
Input Overcurrent
Protection Limit
5% (10 - 133% of FL)
5% (10 - 133% of FL)
7°C (Full Range)
7°C (Full Range)
50µs
Input Overcurrent
Warning Limit
0 to 5.5A
Overtemperature
Protection Limit
0 to 125°C
0 to 125°C
0 to 100ms
Overtemperature
Warning Limit
(51h) OT_WARN_LIMIT
(60h) TON_DELAY
Additional time delay to the
undervoltage startup delay
Turn On Delay
[3] Refer to Digital Supervisor datasheet for complete list of supported commands.
BCM® Bus Converter
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BCM Timing Diagram
BCM® Bus Converter
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High Level Functional State Diagram
Conditions that cause state transitions are shown along arrows. Sub-sequence activities listed inside the state bubbles.
VµC_ACTIVE < VPRI_DC < VPRI_UVLO+
STARTUP SEQUENCE
VPRI_DC > VPRI_UVLO+
STANDBY SEQUENCE
TM Low
TM Low
EN High
EN High
VAUX Low
VAUX Low
Powertrain Stopped
Powertrain Stopped
ENABLE falling edge,
or OTP detected
tPRI_UVLO+_DELAY
expired
Input OVLO or UVLO,
Output OCP,
ONE TIME DELAY
Fault
Auto-
recovery
INITIAL STARTUP
or UTP detected
ENABLE falling edge,
or OTP detected
FAULT
SEQUENCE
TM Low
SUSTAINED
OPERATION
TM PWM
Input OVLO or UVLO,
Output OCP,
EN High
EN High
or UTP detected
VAUX Low
VAUX High
Powertrain Stopped
Powertrain Active
Short Circuit detected
BCM® Bus Converter
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Application Characteristics
Temperature controlled via top side cold plate, unless otherwise noted. All data presented in this section are collected from units processing power in the
forward direction (primary side to secondary side). See associated figures for general trend data.
30
27
24
21
18
15
12
9
98.0
97.5
97.0
96.5
96.0
95.5
95.0
94.5
94.0
6
3
0
260 275 290 305 320 335 350 365 380 395 410
-60
-40
-20
0
20
40
60
80
100
Primary Input Voltage (V)
Case Temperature (ºC)
TCASE
:
-55°C
25°C
80°C
VPRI_DC
:
260V
384V
410V
Figure 4 — No load power dissipation vs. VPRI_DC
Figure 5 — Full load efficiency vs. temperature; VPRI_DC
99
97
95
93
91
89
87
85
83
81
79
80
72
64
56
48
40
32
24
16
8
0
0
7
14
21
28
35
42
49
56
63
0
7
14
21
28
35
42
49
56
63
Secondary Output Current (A)
Secondary Output Current (A)
VPRI_DC
:
VPRI_DC:
260V
384V
410V
260V
384V
410V
Figure 6 — Efficiency at TCASE = -55°C
Figure 7 — Power dissipation at TCASE = -55°C
99
97
95
93
91
89
87
85
83
81
79
80
72
64
56
48
40
32
24
16
8
0
0
7
14
21
28
35
42
49
56
63
0
7
14
21
28
35
42
49
56
63
Secondary Output Current (A)
Secondary Output Current (A)
260V
384V
410V
260V
384V
410V
VPRI_DC
:
VPRI_DC :
Figure 8 — Efficiency at TCASE = 25°C
Figure 9 — Power dissipation at TCASE = 25°C
BCM® Bus Converter
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99
97
95
93
91
89
87
85
83
81
79
80
72
64
56
48
40
32
24
16
8
0
0
7
14
21
28
35
42
49
56
63
0
7
14
21
28
35
42
49
56
63
Secondary Output Current (A)
Secondary Output Current (A)
VPRI_DC:
260V
384V
410V
VPRI_DC:
260V
384V
410V
Figure 10 — Efficiency at TCASE = 80°C
Figure 11 — Power dissipation at TCASE = 80°C
10
9
8
7
6
5
4
3
2
1
0
300
270
240
210
180
150
120
90
60
30
0
-55
-35
-15
5
25
45
65
85
105
0
7
14
21
28
35
42
49
56
63
Case Temperature (°C)
Secondary Output Current (A)
VPRI_DC
:
384V
ISEC_DC
:
62.5A
Figure 12 — RSEC vs. temperature; Nominal VPRI_DC
Figure 13 — VSEC_OUT_PP vs. ISEC_DC ; No external CSEC_OUT_EXT
.
ISEC_DC = 62.5A at TCASE = 80°C
Board mounted module, scope setting:
20MHz analog BW
BCM® Bus Converter
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Figure 14 — Full load secondary voltage ripple, 10µF CPRI_IN_EXT
;
Figure 15 — 0A– 62.5A transient response: CPRI_IN_EXT = 10µF,
No external CSEC_OUT_EXT Board mounted module,
no external CSEC_OUT_EXT
.
scope setting: 20MHz analog BW
Figure 16 — 62.5A – 0A transient response: CPRI_IN_EXT = 10µF,
Figure 17 — Startup from application of VPRI_DC = 384V,
no external CSEC_OUT_EXT
20% ISEC_OUT_DC, 100% CSEC_OUT_EXT
Figure 18 — Startup from application of EN with pre-applied
VPRI_DC = 384V, 20% ISEC_OUT_DC, 100% CSEC_OUT_EXT
BCM® Bus Converter
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General Characteristics
Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of
-55°C ≤ TINTERNAL ≤ 125°C (M-Grade); all other specifications are at TINTERNAL = 25ºC unless otherwise noted.
Attribute
Symbol
Conditions / Notes
Mechanical
Min
Typ
Max
Unit
Length
Width
L
W
H
60.87 / [2.396] 61.00 / [2.402] 61.13 / [2.407] mm/[in]
24.76 / [0.975] 25.14 / [0.990] 25.52 / [1.005] mm/[in]
Height
Volume
Weight
7.11 / [0.280] 7.21 / [0.284] 7.31 / [0.288]
mm/[in]
cm3/[in3]
g/[oz]
Vol
W
Without heatsink
11.06 / [0.675]
41 / [1.45]
Nickel
0.51
0.02
2.03
0.15
Lead Finish
Palladium
Gold
µm
0.003
0.051
Thermal
T-Grade
-40
-55
125
125
°C
°C
Operating Temperature
TINTERNAL
M-Grade
Estimated thermal resistance to maximum
temperature internal component from
isothermal top
Thermal Resistance Top Side
θINT-TOP
1.45
1.77
°C/W
°C/W
Estimated thermal resistance to
θINT-LEADS maximum temperature internal
Thermal Resistance Leads
component from isothermal leads
Estimated thermal resistance to
θINT-BOTTOM maximum temperature internal
component from isothermal bottom
Thermal Resistance Bottom Side
Thermal Capacity
1.67
34
°C/W
Ws/°C
Assembly
T-Grade
-55
-65
125
125
°C
°C
Storage Temperature
ESD Withstand
M-Grade
ESDHBM
ESDCDM
Human Body Model, “ESDA / JEDEC JDS-001-2012” Class I-C (1kV to < 2kV)
Charge Device Model, “JESD 22-C101-E” Class II (200V to < 500V)
BCM® Bus Converter
Page 19 of 28
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General Characteristics (Cont.)
Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of
-55°C ≤ TINTERNAL ≤ 125°C (M-Grade); all other specifications are at TINTERNAL = 25ºC unless otherwise noted.
Attribute
Symbol
Conditions / Notes
Soldering [1]
Min
Typ
Max
Unit
Peak Temperature Top Case
135
°C
Safety
PRIMARY to SECONDARY
4242
2121
2121
620
Isolation Voltage / Dielectric Test
VHIPOT
PRIMARY to CASE
SECONDARY to CASE
Unpowered Unit
At 500VDC
VDC
Isolation Capacitance
Insulation Resistance
CPRI_SEC
RPRI_SEC
780
940
pF
10
MΩ
MIL-HDBK-217Plus Parts Count - 25°C
Ground Benign, Stationary, Indoors /
Computer
2.31
3.41
MHrs
MHrs
MTBF
Telcordia Issue 2 - Method I Case III; 25°C
Ground Benign, Controlled
cTUVus EN 60950-1
UL 60950-1
Agency Approvals / Standards
CE Marked for Low Voltage Directive and RoHS Recast Directive, as applicable
[1] Product is not intended for reflow solder attach.
BCM® Bus Converter
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PMBus™ System Diagram
-OUT
BCM
EN Control
3.3V, at least 20mA
SCL
Digital Isolator
when using 4xDISO
Ref to Digital Isolator
datasheet for more details
I13TL1A0
3 kΩ
VDD
3 kΩ
BCM EN
5V EXT
VDDB
VDD
NC
SEC-IN-A
SEC-IN-B
PRI-OUT-A
PRI-OUT-B
PRI-IN-C
SER-IN
SER-OUT
-IN BCM
TXD1’
RXD1
RXD4
RXD3
RXD2
RXD1
TXD4
TXD3
SEC-OUT-C
CP
D
Q
VCC
Digital
Supervisor
D44TL1A0
PRI-COM
SEC-COM
SD
RD
Q
D
NC
NC
SSTOP
Flip-flop
VDD
Host
µc
PMBus
SGND
SDA
SCL
74LVC1G74DC
10 kΩ
FDG6318P
R1
R2
10 kΩ
SGND
The PMBus communication enabled bus converter provides accurate telemetry monitoring and reporting, threshold and warning
limits adjustment, in addition to corresponding status flags.
The BCM internal µC is referenced to primary ground. The Digital Isolator allows UART communication interface with the host Digital
Supervisor at typical speed of 750kHz across the isolation barrier. One of the advantages of the Digital Isolator is its low power
consumption. Each transmission channel is able to draw its internal bias circuitry directly from the input signal being transmitted to
the output with minimal to no signal distortion.
The Digital Supervisor provides the host system µC with access to an array of up to 4 BCMs. This array is constantly polled for status
by the Digital Supervisor. Direct communication to individual BCM is enabled by a page command. For example, the page (0x00)
prior to a telemetry inquiry points to the Digital Supervisor data and pages (0x01 – 0x04) prior to a telemetry inquiry points to the
array of BCMs connected data. The Digital Supervisor constantly polls the BCM data through the UART interface.
The Digital Supervisor enables the PMBus compatible host interface with an operating bus speed of up to 400kHz. The Digital
Supervisor follows the PMBus command structure and specification.
Please refer to the Digital Supervisor data sheet for more details.
BCM® Bus Converter
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BCM in a ChiP
R
SEC
0.124nH
7mΩ
= 0.64nH
ISEC
lSEC_OUT_LEADS
= 7nH
lPRI_IN_LEADS
+
+
CPRI_INT_ESR
21.5mΩ
CSEC_INT_ESR
130µΩ
122mΩ
V•I
K
1/16 • ISEC
1/16 • VPRI
CPRI_INT
IN
+
–
+
–
CSEC_INT
70µF
C
VSEC
0.37µF
V
I
PRI
PRI_Q
34mA
LPRI_INT = 0.56µH
–
–
Figure 19 — BCM AC model
The BCM uses a high frequency resonant tank to move energy
from primary to secondary and vice versa. The resonant LC tank,
The effective DC voltage transformer action provides additional
interesting attributes. Assuming that RSEC = 0Ω and IPRI_Q = 0A,
Eq. (3) now becomes Eq. (1) and is essentially load independent,
operated at high frequency, is amplitude modulated as a function
of the primary voltage and the secondary current. A small amount
of capacitance embedded in the primary and secondary stages of
the module is sufficient for full functionality and is key to achieving
high power density.
resistor R is now placed in series with VPRI
.
R
The BCM6123xD1E2663yzz can be simplified into the model
shown in Figure 19.
BCM
V
SEC
+
–
K = 1/16
VPRI
At no load:
(1)
VSEC = VPRI • K
K represents the “turns ratio” of the BCM.
Rearranging Eq (1):
Figure 20 — K = 1/16 BCM with series primary resistor
The relationship between VPRI and VSEC becomes:
VSEC = VPRI – IPRI • R • K
VSEC
(2)
(3)
(4)
K =
VPRI
(5)
(
)
In the presence of a load, VSEC is represented by:
Substituting the simplified version of Eq. (4)
(IPRI_Q is assumed = 0A) into Eq. (5) yields:
VSEC = VPRI • K – ISEC • RSEC
and ISEC is represented by:
IPRI – IPRI_Q
2
(6)
VSEC = VPRI • K – ISEC • R • K
This is similar in form to Eq. (3), where RSEC is used to represent the
characteristic impedance of the BCM. However, in this case a real
resistor, R, on the primary side of the BCM is effectively scaled by
K2 with respect to the secondary.
ISEC
=
K
RSEC represents the impedance of the BCM, and is a function of the
RDS_ON of the primary and secondary MOSFETs and the winding
resistance of the power transformer. IPRI_Q represents the quiescent
current of the BCM controller, gate drive circuitry, and core losses.
Assuming that R = 1Ω, the effective R as seen from the secondary
side is 3.91mΩ, with K = 1/16.
BCM® Bus Converter
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A similar exercise can be performed with the additon of a capacitor
or shunt impedance at the primary of the BCM. A switch in series
with VPRI is added to the circuit. This is depicted in Figure 21.
Low impedance is a key requirement for powering a high-
current, low-voltage load efficiently. A switching regulation stage
should have minimal impedance while simultaneously providing
appropriate filtering for any switched current. The use of a BCM
between the regulation stage and the point of load provides a
dual benefit of scaling down series impedance leading back to
the source and scaling up shunt capacitance or energy storage
as a function of its K factor squared. However, these benefits are
not achieved if the series impedance of the BCM is too high. The
impedance of the BCM must be low, i.e., well beyond the crossover
frequency of the system.
S
BCM
V
+
–
K = 1/16
SEC
C
V
PRI
A solution for keeping the impedance of the BCM low involves
switching at a high frequency. This enables the use of small
magnetic components because magnetizing currents remain low.
Small magnetics mean small path lengths for turns. Use of low loss
core material at high frequencies also reduces core losses.
Figure 21 — BCM with primary capacitor
A change in VPRI with the switch closed would result in a change in
capacitor current according to the following equation:
The two main terms of power loss in the BCM are:
n■No load power dissipation (PPRI_NL): defined as the power used to
power up the module with an enabled powertrainat no load.
dVPRI
dt
(7)
IC (t) = C
n■Resistive loss (PRSEC): refers to the power loss across the BCM
modeled as pure resistive impedance.
Assume that with the capacitor charged to VPRI, the switch is
opened and the capacitor is discharged through the idealized
BCM. In this case,
(10)
PDISSIPATED = PPRI_NL + PR
SEC
(8)
IC = ISEC • K
Therefore,
(11)
PSEC_OUT = PPRI_IN – PDISSIPATED = PPRI_IN – PPRI_NL – PR
substituting Eq. (1) and (8) into Eq. (7) reveals:
SEC
C
dVSEC
dt
The above relations can be combined to calculate the overall
module efficiency:
ISEC(t) =
(9)
•
K2
The equation in terms of the secondary has yielded a K2 scaling
factor for C, specified in the denominator of the equation.
PSEC_OUT
PPRI_IN
PPRI_IN – PPRI_NL – PR
PPRI_IN
SEC
(12)
η =
=
A K factor less than unity results in an effectively larger capacitance
on the secondary when expressed in terms of the primary. With a
K= 1/16 as shown in Figure 21, C = 1µF would appear as
2
C = 256µF when viewed from the secondary.
VPRI • IPRI – PPRI_NL – I
• RSEC
(
)
SEC
=
=
VPRI • IPRI
2
PPRI_NL + I
• RSEC
(
)
SEC
1 –
( )
VPRI • IPRI
BCM® Bus Converter
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Input and Output Filter Design
Thermal Considerations
The ChiP module provides a high degree of flexibility in that it
presents three pathways to remove heat from the internal power
dissipating components. Heat may be removed from the top
surface, the bottom surface and the leads. The extent to which
these three surfaces are cooled is a key component in determining
the maximum current that is available from a ChiP, as can be
seen from Figure 1.
A major advantage of BCM systems versus conventional PWM
converters is that the transformer based BCM does not require
external filtering to function properly. The resonant LC tank,
operated at extreme high frequency, is amplitude modulated as a
function of primary voltage and secondary current and efficiently
transfers charge through the isolation transformer. A small amount
of capacitance embedded in the primary and secondary stages
of the module is sufficient for full functionality and is key to
achieving power density.
Since the ChiP has a maximum internal temperature rating, it
is necessary to estimate this internal temperature based on a
system-level thermal solution. Given that there are three pathways
to remove heat from the ChiP, it is helpful to simplify the thermal
solution into a roughly equivalent circuit where power dissipation
is modeled as a current source, isothermal surface temperatures
are represented as voltage sources and the thermal resistances are
represented as resistors. Figure 22 shows the “thermal circuit” for a
6123 ChiP BCM in an application where the top, bottom, and leads
are cooled. In this case, the BCM power dissipation is PDTOTAL and
the three surface temperatures are represented as TCASE_TOP, TCASE_
BOTTOM, and TLEADS. This thermal system can now be very easily
analyzed using a SPICE simulator with simple resistors, voltage
sources, and a current source. The results of the simulation provide
an estimate of heat flow through the various dissipation pathways
as well as internal temperature.
This paradigm shift requires system design to carefully evaluate
external filters in order to:
n■Guarantee low source impedance:
To take full advantage of the BCM’s dynamic response, the
impedance presented to its primary terminals must be low from
DC to approximately 5MHz. The connection of the bus converter
module to its power source should be implemented with
minimal distribution inductance. If the interconnect inductance
exceeds 100nH, the primary should be bypassed with a RC
damper to retain low source impedance and stable operation.
With an interconnect inductance of 200nH, the RC damper may
be as high as 1µF in series with 0.3Ω. A single electrolytic or
equivalent low-Q capacitor may be used in place of the
series RC bypass.
n■Further reduce primary and/or secondary voltage ripple
Thermal Resistance Top
MAX INTERNAL TEMP
θINT-TOP
without sacrificing dynamic response:
Given the wide bandwidth of the module, the source response
is generally the limiting factor in the overall system response.
Anomalies in the response of the primary source will appear at
the secondary of the module multiplied by its K factor.
Thermal Resistance Bottom
Thermal Resistance Leads
θINT-BOTTOM
θINT-LEADS
+
–
+
–
+
–
T
CASE_BOTTOM(°C)
TLEADS(°C)
TCASE_TOP(°C)
Power Dissipation (W)
n■Protect the module from overvoltage transients imposed
by the system that would exceed maximum ratings and
induce stresses:
Figure 22 — Top case, Bottom case and leads thermal model
The module primary/secondary voltage ranges shall not be
exceeded. An internal overvoltage lockout function prevents
operation outside of the normal operating primary range. Even
when disabled, the powertrain is exposed to the applied voltage
and the power MOSFETs must withstand it.
Alternatively, equations can be written around this circuit and
analyzed algebraically:
TINT – PD1 • θINT-TOP = TCASE_TOP
TINT – PD2 • θINT-BOTTOM = TCASE_BOTTOM
TINT – PD3 • θINT-LEADS = TLEADS
PD= PD+ PD+ PD
Total load capacitance at the secondary of the BCM shall not
exceed the specified maximum. Owing to the wide bandwidth and
low secondary impedance of the module, low-frequency bypass
capacitance and significant energy storage may be more densely
and efficiently provided by adding capacitance at the primary of
the module. At frequencies <500kHz the module appears as an
impedance of RSEC between the source and load.
Where TINT represents the internal temperature and PD1, PD2, and
PD3 represent the heat flow through the top side, bottom side, and
leads, respectively.
Within this frequency range, capacitance at the primary appears
as effective capacitance on the secondary per the relationship
defined in Eq. (13).
Thermal Resistance Top
MAX INTERNAL TEMP
CPRI_EXT
θINT-TOP
(13)
CSEC_EXT
=
K2
Thermal Resistance Bottom
Thermal Resistance Leads
θINT-BOTTOM
θINT-LEADS
This enables a reduction in the size and number of capacitors used
in a typical system.
+
+
–
TCASE_BOTTOM(°C)
TLEADS(°C)
TCASE_TOP(°C)
Power Dissipation (W)
–
Figure 23 — Top case and leads thermal model
BCM® Bus Converter
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Figure 23 shows a scenario where there is no bottom side cooling.
In this case, the heat flow path to the bottom is left open and the
equations now simplify to:
ZPRI_EQ1
ZSEC_EQ1
BCM®1
R0_1
VPRI
VSEC
TINT – PD1 • θINT-TOP = TCASE_TOP
TINT – PD3 • θINT-LEADS = TLEADS
PDTOTAL = PD1+ PD3
ZSEC_EQ2
ZPRI_EQ2
BCM®2
R0_2
+
Load
DC
Thermal Resistance Top
MAX INTERNAL TEMP
θINT-TOP
Thermal Resistance Bottom
Thermal Resistance Leads
θINT-BOTTOM
θINT-LEADS
ZSEC_EQn
BCM®n
R0_n
ZPRI_EQn
+
–
T
CASE_BOTTOM(°C)
TLEADS(°C)
TCASE_TOP(°C)
Power Dissipation (W)
Figure 25 — BCM array
Figure 24 — Top case thermal model
Figure 24 shows a scenario where there is no bottom side and
leads cooling. In this case, the heat flow paths to the bottom and
leads are left open and the equations now simplify to:
Fuse Selection
In order to provide flexibility in configuring power systems, ChiP
modules are not internally fused. Input line fusing of ChiP products
is recommended at the system level to provide thermal protection
in case of catastrophic failure.
TINT – PD1 • θINT-TOP = TCASE_TOP
PDTOTAL = PD1
Please note that Vicor has a suite of online tools, including a
simulator and thermal estimator that greatly simplify the task of
determining whether or not a BCM thermal configuration is valid
for a given condition. These tools can be found at:
The fuse shall be selected by closely matching system requirements
with the following characteristics:
n■Current rating
(usually greater than maximum current of BCM)
http://www.vicorpower.com/powerbench.
n■Maximum voltage rating
(usually greater than the maximum possible input voltage)
Current Sharing
n■Ambient temperature
n■Nominal melting I2t
The performance of the BCM topology is based on efficient
transfer of energy through a transformer without the need of
closed loop control. For this reason, the transfer characteristic
can be approximated by an ideal transformer with a positive
temperature coefficient series resistance.
n■Recommend fuse: ≤ 5A Bussmann PC-Tron (primary side)
This type of characteristic is close to the impedance characteristic
of a DC power distribution system both in dynamic (AC) behavior
and for steady state (DC) operation.
When multiple BCMs of a given part number are connected in an
array, they will inherently share the load current according to the
equivalent impedance divider that the system implements from the
power source to the point of load. Ensuring equal current sharing
among modules requires that BCM array impedances be matched.
Some general recommendations to achieve matched array
impedances include:
n■Dedicate common copper planes within the PCB to deliver and
return the current to the modules.
n■Provide as symmetric a PCB layout as possible among modules
n■A dedicated input filter for each BCM in an array is required to
prevent circulating currents.
For further details see:
AN:016 Using BCM Bus Converters in High Power Arrays.
BCM® Bus Converter
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BCM6123xD1E2663yzz
BCM Through Hole Package Mechanical Drawing and Recommended Land Pattern
25.14 .ꢀ3
.990 .015
12.57
.495
11.4ꢀ
.450
2.0ꢀ
.030
(9) PL.
2.0ꢀ
.030
(9) PL.
27.21
1.071
(2) PL.
21.94
.364
17.09
.67ꢀ
(2) PL.
(2) PL.
ꢀ0.50
1.201
12.52
.49ꢀ
7.94
.ꢀ12
(2) PL.
(2) PL.
ꢀ.ꢀ7
.1ꢀ2
1.49
.053
(2) PL.
0
0
0
0
(2) PL.
6.76
.266
61.00 .1ꢀ
2.402 .005
(2) PL.
1.02
.040
1.02
.040
(ꢀ) PL.
(ꢀ) PL.
13.05
.710
20.34
.320
(2) PL.
(2) PL.
2ꢀ.64
.9ꢀ1
(2) PL.
27.55
1.035
(2) PL.
TOP VIEW (COMPONENT SIDE)
BOTTOM VIEW
.05 [.002]
NOTES:
1- RoHS COMPLIANT PER CST-0001 LATEST REVISION.
7.21 .10
.284 .004
SEATING
PLANE
2- UNLESS OTHERWISE SPECIFIED DIMENSIONS ARE : MM / [INCH]
4.17
.164
.41
.016
(24) PL.
(24) PL.
27.21 .08
1.071 .00ꢀ
(2) PL.
+VSEC
-VSEC1
+VSEC
21.94 .08
.864 .00ꢀ
(2) PL.
-VSEC2
17.09 .08
.67ꢀ .00ꢀ
(2) PL.
-VSEC1
+VSEC
+VSEC
-VSEC1
-VSEC2
+VSEC
+VSEC
-VSEC2
12.52 .08
.49ꢀ .00ꢀ
(2) PL.
7.94 .08
.ꢀ12 .00ꢀ
(2) PL.
ꢀ.ꢀ7 .08
.1ꢀ2 .00ꢀ
(2) PL.
1.49 .08
.058 .00ꢀ
(2) PL.
0
0
-VSEC1
+VSEC
-VSEC2
+VSEC
6.76 .08
.266 .00ꢀ
(2) PL.
1.52 .08
.060 .00ꢀ
PLATED THRU
.25 [.010]
ANNULAR RING
(6) PL.
2.54 .08
.100 .00ꢀ
PLATED THRU
.ꢀ8 [.015]
ANNULAR RING
(18) PL.
+VPRI TM/SER-OUT
+VPRI EN
+VPRI VAUX/SER-IN
+VPRI -VPRI
18.05 .08
.710 .00ꢀ
(2) PL.
20.84 .08
.820 .00ꢀ
(2) PL.
2ꢀ.64 .08
.9ꢀ1 .00ꢀ
(2) PL.
27.55 .08
1.085 .00ꢀ
(2) PL.
RECOMMENDED HOLE PATTERN
(COMPONENT SIDE)
BCM® Bus Converter
Page 26 of 28
Rev 1.1
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BCM6123xD1E2663yzz
Revision History
Revision
1.0
Date
Description
Page Number(s)
n/a
02/01/17
07/28/17
Initial Release
1.1
Updated height specification
1, 19, 26
BCM® Bus Converter
Page 27 of 28
Rev 1.1
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BCM6123xD1E2663yzz
Vicor’s comprehensive line of power solutions includes high density AC-DC and DC-DC modules and
accessory components, fully configurable AC-DC and DC-DC power supplies, and complete custom
power systems.
Information furnished by Vicor is believed to be accurate and reliable. However, no responsibility is assumed by Vicor for its use. Vicor
makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication. Vicor reserves
the right to make changes to any products, specifications, and product descriptions at any time without notice. Information published by
Vicor has been checked and is believed to be accurate at the time it was printed; however, Vicor assumes no responsibility for inaccuracies.
Testing and other quality controls are used to the extent Vicor deems necessary to support Vicor’s product warranty. Except where
mandated by government requirements, testing of all parameters of each product is not necessarily performed.
Specifications are subject to change without notice.
Visit http://www.vicorpower.com/dc-dc/isolated-fixed-ratio/hv-bus-converter-module for the latest product information.
Vicor’s Standard Terms and Conditions and Product Warranty
All sales are subject to Vicor’s Standard Terms and Conditions of Sale, and Product Warranty which are available on Vicor’s webpage
(http://www.vicorpower.com/termsconditionswarranty) or upon request.
Life Support Policy
VICOR’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE
EXPRESS PRIOR WRITTEN APPROVAL OF THE CHIEF EXECUTIVE OFFICER AND GENERAL COUNSEL OF VICOR CORPORATION. As used
herein, life support devices or systems are devices which (a) are intended for surgical implant into the body, or (b) support or sustain life and
whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to
result in a significant injury to the user. A critical component is any component in a life support device or system whose failure to perform
can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness. Per Vicor Terms
and Conditions of Sale, the user of Vicor products and components in life support applications assumes all risks of such use and indemnifies
Vicor against all liability and damages.
Intellectual Property Notice
Vicor and its subsidiaries own Intellectual Property (including issued U.S. and Foreign Patents and pending patent applications) relating to the
products described in this data sheet. No license, whether express, implied, or arising by estoppel or otherwise, to any intellectual property
rights is granted by this document. Interested parties should contact Vicor’s Intellectual Property Department.
The products described on this data sheet are protected by the following U.S. Patents Numbers:
6,911,848; 6,930,893; 6,934,166; 7,145,786; 7,782,639; 8,427,269 and for use under 6,975,098 and 6,984,965.
Contact Us: http://www.vicorpower.com/contact-us
Vicor Corporation
25 Frontage Road
Andover, MA, USA 01810
Tel: 800-735-6200
Fax: 978-475-6715
www.vicorpower.com
email
Customer Service: custserv@vicorpower.com
Technical Support: apps@vicorpower.com
©2017 Vicor Corporation. All rights reserved. The Vicor name is a registered trademark of Vicor Corporation.
All other trademarks, product names, logos and brands are property of their respective owners.
BCM® Bus Converter
Page 28 of 28
Rev 1.1
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