5962-9073102M2A [VISHAY]
Precision Monolithic Quad SPST CMOS Analog Switches; 精密单片四路SPST CMOS模拟开关
| 型号： | 5962-9073102M2A |
| 厂家： | 
VISHAY |
| 描述： | Precision Monolithic Quad SPST CMOS Analog Switches |
| 文件： | 总9页 (文件大小：132K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DG411/412/413
Vishay Siliconix
Precision Monolithic Quad SPST CMOS Analog Switches
FEATURES
BENEFITS
APPLICATIONS
D 44-V Supply Max Rating
D Widest Dynamic Range
D Precision Automatic Test Equipment
D Precision Data Acquisition
D "15-V Analog Signal Range
D On-Resistance—rDS(on): 25 W
D Fast Switching—tON: 110 ns
D Ultra Low Power—PD: 0.35 mW
D TTL, CMOS Compatible
D Low Signal Errors and Distortion
D Break-Before-Make Switching Action D Communication Systems
D Simple Interfacing
D Battery Powered Systems
D Computer Peripherals
D Single Supply Capability
DESCRIPTION
The DG411 series of monolithic quad analog switches was
designed to provide high speed, low error switching of
precision analog signals. Combining low power (0.35 mW) with
high speed (tON: 110 ns), the DG411 family is ideally suited for
portable and battery powered industrial and military
applications.
Each switch conducts equally well in both directions when on,
and blocks input voltages up to the supply levels when off.
The DG411 and DG412 respond to opposite control logic as
shown in the Truth Table. The DG413 has two normally open
and two normally closed switches.
To achieve high-voltage ratings and superior switching
performance, the DG411 series was built on Vishay Siliconix’s
high voltage silicon gate process. An epitaxial layer prevents
latchup.
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
DG411
DG411
Dual-In-Line and SOIC
LCC
D
IN NC IN
D
2
1
1
2
IN
D
IN
D
1
2
3
4
5
6
7
8
16
2
1
1
1
Key
1
3
2
1
20 19
15
14
13
12
11
10
9
2
TRUTH TABLE
4
5
6
7
8
18
17
16
S
S
2
S
S
2
Logic
DG411
DG412
V–
NC
V+
V+
V–
0
1
ON
OFF
ON
NC
V
L
OFF
GND
15
14
Logic “0” v 0.8 V
Logic “1” w 2.4 V
S
3
S
4
GND
V
L
D
4
D
3
S
4
S
3
IN
4
IN
3
9
10 11 12 13
D
4
IN NC IN
4
D
3
Top View
3
Top View
Document Number: 70050
S-52433—Rev. D, 06-Sep-99
www.vishay.com S FaxBack 408-970-5600
4-1
DG411/412/413
Vishay Siliconix
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
DG413
DG413
Dual-In-Line and SOIC
LCC
D
IN NC IN
D
2
1
1
2
Key
IN
D
1
2
3
4
5
6
7
8
16 IN
2
1
1
1
3
2
1
20 19
TRUTH TABLE
D
2
15
14
13
12
11
10
9
4
5
6
7
8
18
17
16
S
S
2
1
Logic SW1, SW4
SW2, SW3
S
S
2
V–
NC
V+
0
1
OFF
ON
ON
V–
V+
OFF
NC
GND
V
L
S
3
Logic “0” v 0.8 V
Logic “1” w 2.4 V
15
14
GND
V
L
S
3
S
4
S
4
D
D
3
4
4
9
10 11 12 13
IN
IN
3
D
4
IN NC IN
4
D
3
3
Top View
Top View
ORDERING INFORMATION
Temp Range
Package
Part Number
DG411/412
–40 to 85_C
DG411DJ
DG412DJ
DG411DY
DG412DY
16-Pin Plastic DIP
16-Pin Narrow SOIC
16-Pin CerDIP
LCC-20
–40 to 85_C
DG411AK, DG411AK/883, 5962-9073101MEA
DG412AK, DG412AK/883, 5962-9073102MEA
DG411AZ/883, 5962-9073101M2A
5962-9073102M2A
–55 to 125_C
DG413
16-Pin Plastic DIP
16-Pin Narrow SOIC
16-Pin CerDIP
LCC-20
DG413DJ
–40 to 85_C
DG413DY
DG413AK, DG413AK/883, 5962-9073103MEA
5962-9073103M2A
–55 to 125_C
ABSOLUTE MAXIMUM RATINGS
b
V+ to V– . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 V
GND to V– . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 V
Power Dissipation (Package)
c
16-Pin Plastic DIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 470 mW
d
16-Pin Narrow SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 600 mW
V
L
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (GND –0.3 V) to (V+) +0.3 V
a
e
16-Pin CerDIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 900 mW
e
LCC-20 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 900 mW
Digital Inputs , V , V . . . . . . . . . . . . . . . . . . . . . . . . . . (V–) –2 V to (V+) +2 V
S
D
or 30 mA, whichever occurs first
Notes:
a. Signals on S , D , or IN exceeding V+ or V– will be clamped by internal
X
X
X
Continuous Current (Any Terminal) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 mA
Peak Current, S or D (Pulsed 1 ms, 10% Duty Cycle) . . . . . . . . . . . . 100 mA
diodes. Limit forward diode current to maximum current ratings.
b. All leads welded or soldered to PC Board.
c. Derate 6 mW/_C above 25_C
Storage Temperature
(AK, AZ Suffix) . . . . . . . . . . . . . . –65 to 150_C
(DJ, DY Suffix) . . . . . . . . . . . . . . –65 to 125_C
d. Derate 7.6 mW/_C above 75_C
e. Derate 12 mW/_C above 75_C
Document Number: 70050
S-52433—Rev. D, 06-Sep-99
www.vishay.com S FaxBack 408-970-5600
4-2
DG411/412/413
Vishay Siliconix
a
SPECIFICATIONS
Test Conditions
Unless Specified
A Suffix
–55 to 125_C
D Suffix
–40 to 85_C
V+ = 15 V, V– = –15 V
Tempb
Typc
Mind Maxd Mind Maxd Unit
f
Parameter
Symbol
V
L
= 5 V, V = 2.4 V, 0.8 V
IN
Analog Switch
e
Analog Signal Range
V
Full
–15
15
–15
15
V
ANALOG
Drain-Source
On-Resistance
V+ = 13.5 V, V– = –13.5 V
Room
Full
25
35
45
35
45
r
W
DS(on)
I = –10 mA, V = "8.5 V
S D
Room
Full
"0.1
"0.1
"0.1
–0.25
–20
0.25
20
–0.25
–5
0.25
5
I
S(off)
D(off)
D(on)
Switch Off
Leakage Current
V+ = 16.5, V– = –16.5 V
V
= "15.5 V, V = #15.5 V
D
S
Room
Full
–0.25
–20
0.25
20
–0.25
–5
0.25
5
I
I
nA
mA
ns
Channel On
Leakage Current
V+ = 16.5 V, V– = –16.5 V
Room
Full
–0.4
–40
0.4
40
–0.4
–10
0.4
10
V = V = "15.5 V
S D
Digital Control
Input Current, V Low
I
V
V
Under Test = 0.8 V
Under Test = 2.4 V
Full
Full
0.005
0.005
–0.5
–0.5
0.5
0.5
–0.5
–0.5
0.5
0.5
IN
IL
IN
Input Current, V High
I
IH
IN
IN
Dynamic Characteristics
Turn-On Time
Room
Full
110
100
175
240
175
220
t
ON
R
L
= 300 W, C = 35 pF
L
= "10 V See Figure 2
V
S
Room
Full
145
160
145
160
Turn-Off Time
t
OFF
Break-Before-Make
Time Delay
DG413 Only, V = 10 V
S
t
D
Room
25
R
L
= 300 W, C = 35 pF
L
Charge Injection
Q
V
g
= 0 V, R = 0 W, C = 10 nF
Room
Room
5
pC
dB
g
L
e
Off Isolation
OIRR
68
R
L
= 50 W, C = 5 pF,
L
Channel-to-Channel Cross-
f = 1 MHz
X
Room
85
TALK
e
talk
e
Source Off Capacitance
C
S(off)
C
D(off)
C
D(on)
Room
Room
Room
9
9
e
Drain Off Capacitance
f = 1 MHz
pF
e
Channel On Capacitance
35
Power Supplies
Positive Supply Current
Negative Supply Current
Logic Supply Current
Ground Current
Room
Full
0.0001
–0.0001
0.0001
1
5
1
5
I+
I–
Room
Full
–1
–5
–1
–5
V+ = 16.5, V– = –16.5 V
= 0 or 5 V
mA
V
IN
Room
Full
1
5
1
5
I
L
Room
Full
–0.0001
–1
–5
–1
–5
I
GND
Document Number: 70050
S-52433—Rev. D, 06-Sep-99
www.vishay.com S FaxBack 408-970-5600
4-3
DG411/412/413
Vishay Siliconix
a
SPECIFICATIONS
FOR UNIPOLAR SUPPLIES
Test Conditions
Unless Specified
A Suffix
–55 to 125_C
D Suffix
–40 to 85_C
V+ = 12 V, V– = 0 V
f
Parameter
Symbol
Tempb
Typc
Mind Maxd Mind Maxd Unit
V
L
= 5 V, V = 2.4 V, 0.8 V
IN
Analog Switch
e
Analog Signal Range
V
Full
12
12
V
ANALOG
Drain-Source
On-Resistance
V+ = 10.8 V, I = –10 mA
Room
Full
40
80
100
80
100
S
r
W
DS(on)
V
D
= 3 V, 8 V
Dynamic Characteristics
Turn-On Time
Room
Hot
175
95
250
400
250
315
t
ON
R
V
= 300 W, C = 35 pF
L
L
= 8 V, See Figure 2
S
Room
Hot
125
140
125
140
Turn-Off Time
t
ns
OFF
Break-Before-Make
Time Delay
DG413 Only, V = 8 V,
S
t
Room
Room
25
25
D
R
L
= 300 W, C = 35 pF
L
Charge Injection
Q
V
g
= 6 V, R = 0 W, C = 10 nF
pC
g
L
Power Supplies
Room
Hot
0.0001
–0.0001
0.0001
1
5
1
5
Positive Supply Current
Negative Supply Current
Logic Supply Current
I+
I–
Room
Hot
–1
–5
–1
–5
V+ = 13.5, V = 0 or 5 V
mA
IN
Room
Hot
1
5
1
5
I
L
Room
Hot
–0.0001
–1
–5
–1
–5
Ground Current
Notes:
I
GND
a. Refer to PROCESS OPTION FLOWCHART.
b. Room = 25_C, Full = as determined by the operating temperature suffix.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
e. Guaranteed by design, not subject to production test.
f.
V
IN
= input voltage to perform proper function.
TYPICAL CHARACTERISTICS (_2C5 UNLESS NOTED)
On-Resistance vs. V and Power Supply Voltage
On-Resistance vs. V and Unipolar Supply Voltage
D
D
300
250
200
150
100
50
50
45
T
= 25_C
"5 V
A
V
= 5 V
L
40
35
30
V+ = 3 V
V = 3 V
L
"8 V
"10 V
"12 V
25
"15 V
V+ = 5 V
20
15
10
"20 V
8 V
12 V
15 V
20 V
5
0
0
–20 –15 –10
–5
0
5
10
15
20
0
2
4
6
8
10 12 14 16 18 20
V – Drain Voltage (V)
D
V
D
– Drain Voltage (V)
Document Number: 70050
S-52433—Rev. D, 06-Sep-99
www.vishay.com S FaxBack 408-970-5600
4-4
DG411/412/413
Vishay Siliconix
TYPICAL CHARACTERISTICS (_2C5 UNLESS NOTED)
Leakage Current vs. Analog Voltage
I
I Leakages vs. Temperature
D, S
40
30
20
35
30
25
20
15
10
5
V+ = 15 V
V– = –15 V
V+ = 15 V
V– = –15 V
V
L
= 5 V
V
T
= 5 V
= 25_C
L
A
I
D(off)
125_C
10
0
85_C
I
S(off)
–10
–20
25_C
I
D(on)
–30
–40
–50
–60
–55_C
–15
–10
–5
0
5
10
15
–15
–10
–5
0
5
10
15
V
D
or V — Drain or Source Voltage (V)
V – Drain Voltage (V)
D
S
Charge Injection vs. Analog Voltage
Charge Injection vs. Analog Voltage
100
80
140
120
V+ = 15 V
V– = –15 V
V+ = 15 V
V– = –15 V
V = 5 V
L
C
L
= 10 nF
V
L
= 5 V
100
60
80
60
40
40
C
L
= 10 nF
C = 1 nF
L
20
20
0
0
C
L
= 1 nF
–20
–40
–60
–20
–40
–60
–15
–10
–5
0
5
10
15
–15
–10
–5
V – Drain Voltage (V)
D
0
5
10
15
V
– Source Voltage (V)
S
Input Switching Threshold vs. Supply Voltage
Switching Time vs. Temperature
3.5
240
210
V+ = 15 V
V– = –15 V
= 5 V
= 10 V
3.0
2.5
2.0
1.5
1.0
0.5
V
V
L
S
180
150
V
L
= 7.5 V
t
ON
6.5 V
120
t
OFF
90
60
5.5 V
4.5 V
30
0
0
–55 –35 –15
5
25
45
65
85 105 125
(V+)
5
10
15
20
25
30
35
40
Temperature (_C)
Document Number: 70050
S-52433—Rev. D, 06-Sep-99
www.vishay.com S FaxBack 408-970-5600
4-5
DG411/412/413
Vishay Siliconix
TYPICAL CHARACTERISTICS (_2C5 UNLESS NOTED)
Supply Current vs. Input Switching Frequency
100 mA
V+ = 15 V
V– = –15 V
10 mA
V
L
= 5 V
= 1 SW
= 4 SW
1 mA
I+, I–
100 mA
10 mA
I
L
1 mA
100 nA
10 nA
10
100
1 k
10 k
100 k
1 M
10 M
f – Frequency (Hz)
SCHEMATIC DIAGRAM (TYPICAL CHANNEL)
V+
S
V
L
V–
V+
Level
Shift/
Drive
V
IN
GND
V–
D
FIGURE 1.
TEST CIRCUITS
+5 V
+15 V
t <20 ns
r
t <20 ns
f
3 V
Logic
Input
50%
0 V
V
L
V+
D
t
ON
S
Switch
Input*
V
O
"10 V
V
S
V
O
90%
IN
R
L
C
L
300 W
35 pF
0 V
V–
GND
Switch
Output
t
ON
90%
V
O
Switch
Input*
–15 V
–V
S
*V = 10 V for t , V = –10 V for t
OFF
C
L
(includes fixture and stray capacitance)
S
ON
S
R
L
Note: Logic input waveform is inverted for switches that
have the opposite logic sense control
V
O
= V
S
R
L
+ r
DS(on)
FIGURE 2. Switching Time
Document Number: 70050
S-52433—Rev. D, 06-Sep-99
www.vishay.com S FaxBack 408-970-5600
4-6
DG411/412/413
Vishay Siliconix
TEST CIRCUITS
+5 V
+15 V
3 V
0 V
Logic
Input
50%
V
V+
D
L
S
1
1
V
V
S1
V
V
O1
S1
O1
IN
S
V
1
90%
V
O2
D
2
2
S2
Switch
Output
0 V
V
S2
O2
IN
2
R
300 W
L1
C
L1
35 pF
V
90%
V–
GND
R
300 W
L2
C
L2
35 pF
0 V
Switch
Output
t
D
t
D
–15 V
C
L
(includes fixture and stray capacitance)
FIGURE 3. Break-Before-Make (DG413)
DV
O
+5 V
+15 V
V
O
IN
X
V
L
V+
D
R
OFF
ON
OFF
OFF
g
S
V
O
IN
GND
C
10 nF
V
g
L
3 V
OFF
ON
Q = DV x C
V–
IN
X
O
L
IN dependent on switch configuration Input polarity determined
X
by sense of switch.
–15 V
FIGURE 4. Charge Injection
+5 V
+15 V
V+
C
C
V
L
S
1
D
1
V
S
R
g
= 50 W
50 W
IN
1
0V, 2.4 V
NC
S
2
D
2
V
O
R
L
IN
2
0V, 2.4 V
GND
V–
C
V
V
S
X
TALK
Isolation = 20 log
–15 V
O
C = RF bypass
FIGURE 5. Crosstalk
Document Number: 70050
S-52433—Rev. D, 06-Sep-99
www.vishay.com S FaxBack 408-970-5600
4-7
DG411/412/413
Vishay Siliconix
TEST CIRCUITS
+5 V
+15 V
V+
C
C
+5 V
+15 V
V+
V
L
C
C
V
O
S
D
V
S
V
L
R
g
= 50 W
S
D
R
50 W
L
IN
0V, 2.4 V
Meter
IN
HP4192A
Impedance
Analyzer
GND
V–
C
0 V, 2.4 V
or Equivalent
–15 V
GND
V–
C
V
V
S
Off Isolation = 20 log
C = RF Bypass
O
–15 V
FIGURE 6. Off Isolation
FIGURE 7. Source/Drain Capacitances
APPLICATIONS
Single Supply Operation:
Summing Amplifier
The DG411/412/413 can be operated with unipolar supplies
from 5 V to 44 V. These devices are characterized and tested
for unipolar supply operation at 12 V to facilitate the majority of
applications. In single supply operation, V+ is tied to VL and V–
is tied to 0 V. See Input Switching Threshold vs. Supply
Voltage curve for VL versus input threshold requirments.
When driving a high impedance, high capacitance load such
as shown in Figure 8, where the inputs to the summing
amplifier have some noise filtering, it is necessary to have
shunt switches for rapid discharge of the filter capacitor, thus
preventing offsets from occurring at the output.
R
1
R
2
V
IN 1
C
1
R
5
R
3
R
4
V
IN 2
–
+
V
OUT
C
2
R
6
DG413
FIGURE 8. Summing Amplifier
Document Number: 70050
S-52433—Rev. D, 06-Sep-99
www.vishay.com S FaxBack 408-970-5600
4-8
Legal Disclaimer Notice
Vishay
Notice
Specifications of the products displayed herein are subject to change without notice. Vishay Intertechnology, Inc.,
or anyone on its behalf, assumes no responsibility or liability for any errors or inaccuracies.
Information contained herein is intended to provide a product description only. No license, express or implied, by
estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Vishay's
terms and conditions of sale for such products, Vishay assumes no liability whatsoever, and disclaims any express
or implied warranty, relating to sale and/or use of Vishay products including liability or warranties relating to fitness
for a particular purpose, merchantability, or infringement of any patent, copyright, or other intellectual property right.
The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications.
Customers using or selling these products for use in such applications do so at their own risk and agree to fully
indemnify Vishay for any damages resulting from such improper use or sale.
Document Number: 91000
Revision: 08-Apr-05
www.vishay.com
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