SI8407DB-T2 [VISHAY]
P-Channel 20-V (D-S) MOSFET; P通道20 -V （D -S ）的MOSFET
| 型号： | SI8407DB-T2 |
| 厂家： | 
VISHAY |
| 描述： | P-Channel 20-V (D-S) MOSFET |
| 文件： | 总6页 (文件大小：70K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Si8407DB
Vishay Siliconix
P-Channel 20-V (D-S) MOSFET
FEATURES
PRODUCT SUMMARY
D TrenchFETr Power MOSFET
VDS (V)
rDS(on) (W)
ID (A)
D New MICRO FOOTr Chipscale Packaging
Provides Ultra-Low Footprint Area Profile
(0.62 mm) and On-Resistance
0.027 @ V = −4.5 V
−8.2
−7.5
−6.6
GS
−20
0.032 @ V = −2.5
V
V
GS
APPLICATIONS
D Portable Devices
− PA Switch
0.045 @ V = −1.8
GS
− Battery Switch
− Load Switch
MICRO FOOT
S
Bump Side View
Backside View
5
6
1
S
S
S
D
4
3
2
G
Device Marking: 8407
xxx = Date/Lot Traceability Code
G
Ordering Information: Si8407DB-T2
Si8407DB-T2—E1 (Lead (Pb)-Free)
D
D
P-Channel MOSFET
ABSOLUTE MAXIMUM RATINGS (T = 25_C UNLESS OTHERWISE NOTED)
A
Parameter
Symbol
5 secs
Steady State
Unit
Drain-Source Voltage
Gate-Source Voltage
V
−20
"8
DS
V
V
GS
T
= 25_C
= 70_C
−5.8
−4.6
−8.2
−6.5
A
a
Continuous Drain Current (T = 150_C)
I
D
J
T
A
A
Pulsed Drain Current
I
−15
DM
a
continuous Source Current (Diode Conduction)
I
−2.6
2.9
−1.34
1.47
S
T
= 25_C
= 70_C
A
a
Maximum Power Dissipation
P
W
D
T
A
1.86
0.94
Operating Junction and Storage Temperature Range
T , T
−55 to 150
215
_C
J
stg
VPR
b
Package Reflow Conditions
_C
IR/Convection
220
THERMAL RESISTANCE RATINGS
Parameter
Symbol
Typical
Maximum
Unit
t v 5 sec
Steady State
Steady State
33
72
15
43
85
19
a
Maximum Junction-to-Ambient
R
R
thJA
_C/W
Maximum Junction-to-Foot (drain)
thJF
Notes
a. Surface Mounted on 1” x 1” FR4 Board.
b. Refer to IPC/JEDEC (J-STD-020A), no manual or hand soldering.
Document Number: 72254
S-50066—Rev. B, 17-Jan-05
www.vishay.com
1
Si8407DB
Vishay Siliconix
SPECIFICATIONS (T = 25_C UNLESS OTHERWISE NOTED)
J
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
Static
Gate Threshold Voltage
Gate-Body Leakage
V
V
= V , I = −350 mA
−0.4
−0.9
V
GS(th)
DS
GS
D
I
V
= 0 V, V = "8 V
"100
nA
GSS
DS
GS
V
= −20 V, V = 0 V
−1
−5
DS
GS
Zero Gate Voltage Drain Current
I
mA
DSS
V
DS
= −20 V, V = 0 V, T = 70_C
GS
J
a
On-State Drain Current
I
V
DS
v −5 V, V = −4.5 V
−5
A
D(on)
GS
V
= −4.5 V, I = −1 A
0.022
0.026
0.033
0.027
0.032
0.045
GS
D
a
V
= −2.5 V, I = −1 A
Drain-Source On-State Resistance
r
W
GS
GS
D
DS(on)
V
= −1.8 V, I = −1 A
D
a
Forward Transconductance
g
10
S
V
V
= −10 V, I = −1 A
fs
DS
D
a
Diode Forward Voltage
V
SD
I
= −1 A, V = 0 V
−0.6
−1.1
S
GS
Dynamicb
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Turn-On Delay Time
Rise Time
Q
32
3.6
8.5
30
50
g
Q
Q
V
= −10 V, V = −4.5 V, I = −1 A
nC
ns
gs
gd
DS
GS
D
t
45
70
d(on)
t
r
45
V
= −10 V, R = 10 W
L
GEN g
DD
I
D
^ −1 A, V
= −4.5 V, R = 6 W
Turn-Off Delay Time
Fall Time
t
550
220
265
825
330
500
d(off)
t
f
Source-Drain Reverse Recovery Time
Notes
t
rr
I = −1 A, di/dt = 100 A/ms
F
a. Pulse test; pulse width v 300 ms, duty cycle v 2%.
b. Guaranteed by design, not subject to production testing.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)
Output Characteristics
Transfer Characteristics
15
12
9
15
12
9
V
= 4.5 thru 2 V
GS
1.5 V
6
6
T
= 125_C
C
3
3
25_C
1 V
−55_C
0
0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
0.0
0.5
1.0
1.5
2.0
V
DS
− Drain-to-Source Voltage (V)
V
GS
− Gate-to-Source Voltage (V)
Document Number: 72254
S-50066—Rev. B, 17-Jan-05
www.vishay.com
2
Si8407DB
Vishay Siliconix
TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)
On-Resistance vs. Drain Current
Capacitance
0.06
2500
2000
1500
1000
500
C
iss
0.05
0.04
V
GS
= 1.8 V
V
V
= 2.5 V
= 4.5 V
GS
0.03
0.02
0.01
0.00
C
oss
GS
C
rss
0
0
4
8
12
16
20
0
4
8
12
16
20
I
D
− Drain Current (A)
V
DS
− Drain-to-Source Voltage (V)
Gate Charge
On-Resistance vs. Junction Temperature
5
4
3
2
1
0
1.6
1.4
1.2
1.0
0.8
0.6
V
D
= 10 V
V
GS
= 4.5 V
DS
I
= 1
A
I = 1 A
D
0
5
10
15
20
25
30
35
−50 −25
0
25
50
75
100 125 150
Q
− Total Gate Charge (nC)
T
− Junction Temperature (_C)
g
J
Source-Drain Diode Forward Voltage
On-Resistance vs. Gate-to-Source Voltage
0.10
0.08
0.06
0.04
0.02
0.00
20
10
I
D
= 1 A
T
= 150_C
J
T
= 25_C
J
1
0.0
0
1
2
3
4
5
0.3
0.6
0.9
1.2
1.5
V
SD
− Source-to-Drain Voltage (V)
V
GS
− Gate-to-Source Voltage (V)
Document Number: 72254
S-50066—Rev. B, 17-Jan-05
www.vishay.com
3
Si8407DB
Vishay Siliconix
TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)
Threshold Voltage
Single Pulse Power, Juncion-To-Ambient
0.6
60
50
I
D
= 350 mA
0.4
0.2
40
30
0.0
20
10
0
−0.2
−0.4
−50 −25
0
25
50
75
100 125 150
0.001
0.01
0.1
1
10
T
− Temperature (_C)
Time (sec)
J
Safe Operating Area
100
* r
DS(on)
Limited
10 ms, 100 ms
10
1
1 ms
10 ms
100 ms
1 s
10 s
T
= 25_C
A
0.1
Single Pulse
100 s, dc
0.01
0.1
1
10
100
V
− Drain-to-Source Voltage (V)
DS
*V u minimum V at which r is specified
DS(on)
GS
GS
Normalized Thermal Transient Impedance, Junction-to-Ambient
2
1
Duty Cycle = 0.5
0.2
0.1
Notes:
P
DM
0.1
0.05
0.02
t
1
t
2
t
t
1
2
1. Duty Cycle, D =
2. Per Unit Base = R
= 72_C/W
thJA
(t)
3. T − T = P Z
DM thJA
JM
A
Single Pulse
4. Surface Mounted
0.01
−4
−3
−2
−1
10
10
10
10
1
10
100
600
Square Wave Pulse Duration (sec)
Document Number: 72254
S-50066—Rev. B, 17-Jan-05
www.vishay.com
4
Si8407DB
Vishay Siliconix
TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)
Normalized Thermal Transient Impedance, Junction-to-Foot
2
1
Duty Cycle = 0.5
0.2
0.1
0.1
0.05
0.02
Single Pulse
0.01
−4
−3
−2
−1
10
10
10
10
1
10
Square Wave Pulse Duration (sec)
Document Number: 72254
S-50066—Rev. B, 17-Jan-05
www.vishay.com
5
Si8407DB
Vishay Siliconix
PACKAGE OUTLINE
MICRO FOOT: 6-BUMP (2.4 X 2.0, 8-mm PITCH)
e
e
e
Recommended Land
Backside Labels
D
S1
e
s
R
Q
e
e
E
6 Bumps (Note 2)
Bump Diameter:
f0.38 − 0.40 mm
Note 3
P
A2
A1
1
2
NOTES (Unless Otherwise Specified):
1. All dimensions are in millimeters.
A
PAD DISTRIBUTION TABLE
2. Six (6) solder bumps are Eutectic solder 63/37Pb with diameter f0.38 − 0.40 mm.
3. Backside surface is coated with a Ti/Nl/Ag layer.
4. Non-solder mask defined copper landing pad.
5. The flat side of wafers is oriented at the bottom.
6. D is location of Pin 1P.
P
Q
R
1
2
Drain
Drain
Gate
Source
Source
Source
MILLIMETERS*
INCHES
Min Max
Dim
Min
0.600
0.260
0.340
0.370
1.920
2.320
0.750
0.370
0.580
Max
0.650
0.290
0.360
0.410
2.000
2.400
0.850
0.400
0.600
0.0236
0.0102
0.0134
0.0146
0.0756
0.0913
0.0295
0.0150
0.0228
0.0256
0.0114
0.0142
0.0161
0.0787
0.0945
0.0335
0.0157
0.0236
A
A1
A2
b
D
E
e
S
S1
* Use millimeters as the primary measurement.
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and
Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see
http://www.vishay.com/ppg?72254.
Document Number: 72254
S-50066—Rev. B, 17-Jan-05
www.vishay.com
6
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