SI9112DY-E3 [VISHAY]
Current Mode PWM Controller 14-Pin SOIC N;
| 型号： | SI9112DY-E3 |
| 厂家： | 
VISHAY |
| 描述： | Current Mode PWM Controller 14-Pin SOIC N CD 开关 光电二极管 |
| 文件： | 总10页 (文件大小：166K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Si9112
Vishay Siliconix
High-Voltage Switchmode Controller
FEATURES
D 9- to 80-V Input Range
D High Efficiency Operation (> 80%)
D Internal Start-Up Circuit
D SHUTDOWN and RESET
D Current-Mode Control
D High-Speed, Source-Sink Output Drive
D Internal Oscillator (1 MHz)
DESCRIPTION
The Si9112 is a BiC/DMOS integrated circuit designed for use
in high-efficiency switchmode power converters.
high-voltage DMOS input allows this controller to work over a
wide range of input voltages (9- to 80-VDC). Current-mode
PWM control circuitry is implemented in CMOS to reduce
internal power consumption to less than 10 mW.
power. When combined with an output MOSFET and
transformer, the Si9112 can be used to implement
single-ended power converter topologies (i.e., flyback,
forward, and cuk).
A
The Si9112 is available in both standard and lead (Pb)-free
14-pin plastic DIP and SOIC packages which are specified to
operate over the industrial temperature range of −40_C to
85_C.
A CMOS output driver provides high-speed switching of
MOSPOWER devices large enough to supply 50 W of output
FUNCTIONAL BLOCK DIAGRAM
OSC OSC
IN OUT
FB
14
COMP DISCHARGE
13
9
8
7
Error
Amplifier
OSC
Clock ( /
To
CC
−
V
10
1
f
)
2
OSC
V
REF
+
4 V (2%)
Current-Mode
Comparator
2 V
4
5
Ref
Gen
OUTPUT
−V
−
R
+
Q
IN
S
+
C/L
−
Comparator
1
Current
Sources
To
Internal
Circuits
1.2 V
BIAS
3
SENSE
V
CC
6
2
V
CC
11
12
SHUTDOWN
RESET
Undervoltage Comparator
S
R
+V
IN
−
Q
+
8.1 V
−
+
8.7 V
Pre-Regulator/Start-Up
Applications information, see AN703.
sDocument Number: 70005
S-42036—Rev. H, 15-Nov-04
www.vishay.com
1
Si9112
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS
Voltages Referenced to −V (V < +V + 0.3 V)
Junction Temperature (T ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150_C
IN
CC
IN
J
Power Dissipation (Package)a
V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 V
b
14-Pin Plastic DIP (J Suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 750 mW
+V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 V
IN
c
14-Pin SOIC (Y Suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 900 mW
Logic Inputs
Thermal Impedance (ꢀ
)
JA
(RESET, SHUTDOWN, OSC IN) . . . . . . . . . . . . . . . . . −0.3 V to V + 0.3 V
CC
14-Pin Plastic DIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 167_C/W
Linear Inputs (FEEDBACK, SENSE) . . . . . . . . . . . . . . −0.3 V to V + 0.3 V
CC
14-Pin SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140_C/W
HV Pre-Regulator Input Current (continuous) . . . . . . . . . . . . . . . . . . . . 25 mA
(Power Dissipation Limited)
Notes
a. Device mounted with all leads soldered or welded to PC board.
b. Derate 6 mW/_C above 25_C.
c. Derate 7.2 mW/_C above 25_C.
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65 to 150_C
Operating Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40 to 85_C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING RANGE
Voltages Referenced to −V
IN
V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 V to 13.5 V
R
OSC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 kꢁ to 1 Mꢁ
+V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 V to 80 V
IN
Linear Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to V − 3 V
CC
f
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 kHz to 1 MHz
Digital Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to V
CC
OSC
a
SPECIFICATIONS
Test Conditions
Unless Otherwise Specified
Limits
D Suffix −40 to 85_C
DISCHARGE = −V = 0 V
IN
V
= 9 V, +V = 12 V
CC
IN
Parameter
Reference
Symbol
Tempb Mind
Typc
Maxe
Unit
R
= 270 kꢁ , R
= 330 kꢁ
BIAS
OSC
OSC IN = − V (OSC Disabled)
Room
3.88
3.82
4.0
4.12
4.14
IN
Output Voltage
V
R
V
e
R
= 10 Mꢁ
Full
L
e
Output Impedance
Z
Room
Room
Full
15
70
30
100
0.5
45
130
1.0
kꢁ
ꢂ A
OUT
Short Circuit Current
I
V = −V
REF IN
SREF
e
Temperature Stability
T
mV/_C
REF
Oscillator
e
Maximum Frequency
f
R
= 0
Room
Room
Room
Room
Full
1
3
MHz
kHz
MAX
OSC
R
R
= 330 k, See Note f
= 150 k, See Note f
80
100
200
9
120
240
15
OSC
Initial Accuracy
Voltage Stability
f
OSC
160
OSC
ꢃf/f
ꢃ
f
/
f
=
f
(
1
3
.
5
V
)
−
f
(
9
.
5
V
)
/
f
(
9
.
5
V
)
%
e
Temperature Coefficient
T
200
500
ppm/_C
OSC
Error Amplifier
FB Tied to COMP
Feedback Input Voltage
V
FB
Room
3.92
4.00
4.08
V
OSC IN = − V (OSC Disabled)
IN
Input Offset Voltage
Input BIAS Current
V
OSC IN = − V (OSC Disabled)
Room
Room
Room
Room
Room
Room
Room
Room
"15
25
"40
mV
nA
OS
IN
I
FB
OSC IN = − V , V = 4 V
500
IN FB
e
Open Loop Voltage Gain
A
VOL
OSC IN = − V
60
1
80
dB
IN
e
Unity Gain Bandwidth
BW
OSC IN = − V (OSC Disabled)
1.5
MHz
ꢁ
IN
e
Dynamic Output Impedance
Z
Error Amp Configured for 60 dB gain
1000
−2.0
0.15
70
2000
OUT
Source V = 3.4 V
−1.4
FB
Output Current
I
mA
dB
OUT
Sink V = 4.5 V
0.12
50
FB
e
Power Supply Rejection
PSRR
9 V v V v 13.5 V
CC
sDocument Number: 70005
S-42036—Rev. H, 15-Nov-04
www.vishay.com
2
Si9112
Vishay Siliconix
a
SPECIFICATIONS
Test Conditions
Unless Otherwise Specified
Limits
D Suffix −40 to 85_C
DISCHARGE = −V = 0 V
IN
V
= 9 V, +V = 12 V
CC
IN
R
= 270 kꢁ , R
= 330 kꢁ
Parameter
Current Limit
Symbol
Tempb Mind
Typc
Maxe
Unit
BIAS
OSC
Threshold Voltage
V
V
= 0 V
Room
Room
1.1
80
1.3
1.5
V
SOURCE
FB
e
Delay to Output
t
d
V
= 1.5 V, See Figure 1
100
150
ns
SENSE
Pre-Regulator/Start-Up
Input Voltage
+V
IN
I
IN
= 10 ꢂ A
w 9.4 V
Room
Room
Room
V
Input Leakage Current
Pre-Regulator Start-Up Current
+I
IN
V
10
ꢂ A
mA
CC
I
+V = 48 V
12
20
START
IN
V
UVLO
Pre-Regulator Dropout Voltage
V
+V = 10 V, R
= 4 k at Pin 6
Room
Room
CC
IN
LOAD
+0.1
V
CC
Pre-Regulator Turn-Off
V
REG
I
= 10 ꢂ A
8.0
8.7
9.4
8.9
PRE-REGULATOR
Threshold Voltage
V
Undervoltage Lockout
V
See Detailed Description
Room
Room
7.2
0.3
8.1
0.6
UVLO
V
REG
−V
UVLO
V
DELTA
Supply
Supply Current
Bias Current
I
C
L
v 75 pF (Pin 4)
Room
Room
0.6
15
1.0
mA
CC
I
ꢂ
A
BIAS
Logic
C
= 500 pF
IN
L
e
SHUTDOWN Delay
t
Room
50
100
SD
V
= −V , See Figure 2
SENSE
e
SHUTDOWN Pulse Width
t
Room
Room
50
50
SW
ns
e
RESET Pulse Width
t
RW
See Figure 3
Latching Pulse Width
SHUTDOWN and RESET Low
t
Room
25
LW
e
Input Low Voltage
V
Room
Room
Room
Room
2.0
5
V
IL
IH
IH
Input High Voltage
V
7.0
Input Current Input Voltage High
Input Current Input Voltage Low
I
V
= V
1
ꢂ
A
LOGIC
CC
I
IL
V
IN
= 0 V
−35
25
Output
Room
Full
8.7
8.5
Output High Voltage
V
I
= −10 mA
OH
OUT
V
Room
Full
0.3
0.5
Output Low Voltage
V
I
= 10 mA
OL
OUT
Room
Full
20
25
30
50
e
Output Resistance
R
OUT
I
= 10 mA, Source or Sink
ꢁ
OUT
e
Rise Time
t
Room
Room
40
40
75
75
r
C
L
= 500 pF
ns
e
Fall Time
t
f
Notes
a. Refer to PROCESS OPTION FLOWCHART for additional information.
b. Room = 25_C, Full = as determined by the operating temperature suffix.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum.
e. Guaranteed by design, not subject to production test.
f.
C
STRAY
Pin 8 = v 5 pF.
sDocument Number: 70005
S-42036—Rev. H, 15-Nov-04
www.vishay.com
3
Si9112
Vishay Siliconix
TIMING WAVEFORMS
V
CC
1.5 V
50%
−
SENSE
SHUTDOWN
0
50%
t v 10 ns
f
t v 10 ns
r
−
−
0
t
SD
t
d
V
V
CC
CC
90%
90%
OUTPUT
0 −
OUTPUT
0
FIGURE 1.
FIGURE 2.
t
SW
V
CC
t , t v 10 ns
f
f
50%
50%
SHUTDOWN
0
−
−
t
LW
V
CC
50%
50%
50%
RESET
0
t
RW
FIGURE 3.
TYPICAL CHARACTERISTICS
Output Switching Frequency
vs. Oscillator Resistance
+V vs. +I at Start-Up
IN
IN
140
1 M
V
CC
= −V
IN
120
100
80
60
40
20
0
100 k
10 k
10
15
20
10 k
100 k
1 M
+I (mA)
IN
r
− Oscillator Resistance (ꢁ)
OSC
FIGURE 4.
FIGURE 5.
sDocument Number: 70005
S-42036—Rev. H, 15-Nov-04
www.vishay.com
4
Si9112
Vishay Siliconix
PIN CONFIGURATIONS AND ORDERING INFORMATION
Dual-In-Line and SOIC
ORDERING INFORMATION
BIAS
FB
1
2
3
4
5
6
7
14
13
12
11
10
9
Part Number
Temperature Range
Package
+V
IN
COMP
Si9112DY
SENSE
RESET
Si9112DY-T1
Si9112DY-T1—E3
Si9112DJ
SOIC-14
OUTPUT
SHUTDOWN
−40 to 85_C
−V
IN
V
REF
PDIP-14
Si9112DJ—E3
V
CC
DISCHARGE
OSC IN
OSC OUT
8
Top View
DETAILED DESCRIPTION
Pre-Regulator/Start-UpSection
determines the magnitude of bias current in all of the analog
sections and the pull-up current for the SHUTDOWN and
RESET pins. The current flowing in the bias resistor is
nominally 15 ꢂA.
Due to the low quiescent current requirement of the Si9112
control circuitry, bias power can be supplied from the
unregulated input power source, from an external regulated
low-voltage supply, or from an auxiliary “bootstrap” winding on
the output inductor or transformer.
Reference Section
The reference section of the Si9112 consists of a temperature
compensated buried zener and trimmable divider network.
The output of the reference section is connected internally to
the non-inverting input of the error amplifier. Nominal reference
output voltage is 4 V. The trimming procedure that is used on
the Si9112 brings the output of the error amplifier (which is
configured for unity gain during trimming) to within "2% of 4 V.
This automatically compensates for input offset voltage in the
error amplifier.
When power is first applied during start-up, +VIN (pin 2) will
draw a constant current. The magnitude of this current is
determined by a high-voltage depletion MOSFET device
which is connected between +VIN and VCC (pin 6). This
start-up circuitry provides initial power to the IC by charging an
external bypass capacitance connected to the VCC pin. The
charging current is disabled when VCC exceeds 8.7 V. If VCC is
not forced to exceed the 8.7-V threshold, then VCC will be
regulated to a nominal value of 8.7 V by the pre-regulator
circuit.
The output impedance of the reference section has been
purposely made high so that a low impedance external voltage
source can be used to override the internal voltage source, if
desired, without otherwise altering the performance of the
device.
As the supply voltage rises toward the normal operating
conditions, an internal undervoltage (UV) lockout circuit keeps
the output driver disabled until VCC exceeds the UV lockout
threshold (typically 8.1 V). This guarantees that the control
logic will be functioning properly and that sufficient gate drive
voltage is available before the MOSFET turns on. The design
of the IC is such that the undervoltage lockout threshold will be
at least 300 mV less than the pre-regulator turn-off voltage.
Power dissipation can be minimized by providing an external
power source to VCC such that the pre-regulator circuit is
disabled.
Error Amplifier
Closed-loop regulation is provided by the error amplifier. The
emitter follower output has a typical dynamic output
impedance of 1000 ꢁ , and is intended for use with
“around-the-amplifier” compensation. A MOS differential input
stage provides low input leakage current. The noninverting
input to the error amplifier (VREF) is internally connected to the
output of the reference supply and should be bypassed with a
small capacitor to ground.
BIAS
ꢁ
To properly set the bias for the Si9112, a 270-k resistor
should be tied from BIAS (pin 1) to −VIN (pin 5). This
sDocument Number: 70005
S-42036—Rev. H, 15-Nov-04
www.vishay.com
5
Si9112
Vishay Siliconix
DETAILED DESCRIPTION (CONT’D)
Oscillator Section
Table 1: Truth Table for the SHUTDOWN and RESET Pins
SHUTDOWN
RESET
Output
The oscillator consists of a ring of CMOS inverters, capacitors,
and a capacitor discharge switch. Frequency is set by an
external resistor between the OSC IN and OSC OUT pins.
(See Typical Characteristics for details of resistor value vs.
frequency.) The DISCHARGE pin should be tied to −VIN for
normal internal oscillator operation. A frequency divider in the
logic section limits switch duty cycle to v50% by locking the
switching frequency to one half of the oscillator frequency.
H
H
L
H
Normal Operation
Normal Operation (No Change)
Off (Not Latched)
H
L
L
L
Off (Latched)
Off (Latched, No Change)
Remote synchronization can be accomplished by capacitive
coupling of a SYNC pulse into the OSC IN (pin 8) terminal. For
a 5-V pulse amplitude and 0.5-ꢂs pulse width, typical values
Both pins have internal current source pull-ups and should be
left disconnected when not in use. An added feature of the
current sources is the ability to connect a capacitor and an
open-collector driver to the SHUTDOWN or RESET pins to
provide variable shutdown time.
ꢁ
would be 100 pF in series with 3 k to pin 8.
SHUTDOWN and RESET
Output Driver
SHUTDOWN (pin 11) and RESET (pin 12) are intended for
overriding the output MOSFET switch via external control
logic. The two inputs are fed through a latch preceding the
output switch. Depending on the logic state of RESET,
SHUTDOWN can be either a latched or unlatched input. The
output is off whenever SHUTDOWN is low. By simultaneously
having SHUTDOWN and RESET low, the latch is set and
SHUTDOWN has no effect until RESET goes high. The truth
table for these inputs is given in Table 1.
The push-pull driver output has a typical on-resistance of 20 ꢁ.
Maximum switching times are specified at 75 ns for a 500 pF
load. This is sufficient to directly drive 60-V, 25-A MOSFETs.
Larger devices can be driven, but switching times will be
longer, resulting in higher switching losses.
For applications information refer to AN703.
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and
Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see
http://www.vishay.com/ppg?70005.
sDocument Number: 70005
S-42036—Rev. H, 15-Nov-04
www.vishay.com
6
Legal Disclaimer Notice
Vishay
Notice
Specifications of the products displayed herein are subject to change without notice. Vishay Intertechnology, Inc.,
or anyone on its behalf, assumes no responsibility or liability for any errors or inaccuracies.
Information contained herein is intended to provide a product description only. No license, express or implied, by
estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Vishay's
terms and conditions of sale for such products, Vishay assumes no liability whatsoever, and disclaims any express
or implied warranty, relating to sale and/or use of Vishay products including liability or warranties relating to fitness
for a particular purpose, merchantability, or infringement of any patent, copyright, or other intellectual property right.
The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications.
Customers using or selling these products for use in such applications do so at their own risk and agree to fully
indemnify Vishay for any damages resulting from such improper use or sale.
Document Number: 91000
Revision: 08-Apr-05
www.vishay.com
1
Package Information
Vishay Siliconix
SOIC (NARROW): 14-LEAD (POWER IC ONLY)
MILLIMETERS
INCHES
Min
1.35
0.10
0.38
0.18
8.55
3.8
Max
1.75
0.20
0.51
0.23
8.75
4.00
Min
Max
0.069
0.008
0.020
0.009
0.344
0.157
Dim
A
A1
B
C
D
0.053
0.004
0.015
0.007
0.336
0.149
14
1
13
2
12
3
11
4
10
5
9
6
8
7
E
E
1.27 BSC
0.050 BSC
e
5.80
0.50
0_
6.20
0.93
8_
0.228
0.020
0_
0.244
0.037
8_
H
L
Ø
ECN: S-40080—Rev. A, 02-Feb-04
DWG: 5914
D
H
C
A
ALL LEADS
0.101 mm
Ø
A
1
e
B
L
0.004″
Document Number: 72809
28-Jan-04
www.vishay.com
1
Package Information
Vishay Siliconix
PDIP: 14-LEAD (POWER IC ONLY)
14
1
13
2
12
3
11
4
10
5
9
6
8
7
E
E
1
D
S
1
Q
A
A
1
L
15°
MAX
C
e
1
B
B
1
e
A
MILLIMETERS
INCHES
Min
Dim
A
A1
B
B1
C
D
Min
3.81
0.38
0.38
0.89
0.20
17.27
7.62
5.59
2.29
7.37
2.79
1.27
1.02
Max
5.08
1.27
0.51
1.65
0.30
19.30
8.26
7.11
2.79
7.87
3.81
2.03
2.03
Max
0.200
0.050
0.020
0.065
0.012
0.760
0.325
0.280
0.110
0.310
0.150
0.080
0.080
0.150
0.015
0.015
0.035
0.008
0.680
0.300
0.220
0.090
0.290
0.110
0.050
0.040
E
E1
e1
eA
L
Q1
S
ECN: S-40081—Rev. A, 02-Feb-04
DWG: 5919
Document Number: 72814
28-Jan-04
www.vishay.com
1
Legal Disclaimer Notice
www.vishay.com
Vishay
Disclaimer
ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE
RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.
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“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other
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product with the properties described in the product specification is suitable for use in a particular application. Parameters
provided in datasheets and/or specifications may vary in different applications and performance may vary over time. All
operating parameters, including typical parameters, must be validated for each customer application by the customer’s
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including but not limited to the warranty expressed therein.
Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining
applications or for any other application in which the failure of the Vishay product could result in personal injury or death.
Customers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk. Please
contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by
any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners.
Material Category Policy
Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as RoHS-Compliant fulfill the
definitions and restrictions defined under Directive 2011/65/EU of The European Parliament and of the Council
of June 8, 2011 on the restriction of the use of certain hazardous substances in electrical and electronic equipment
(EEE) - recast, unless otherwise specified as non-compliant.
Please note that some Vishay documentation may still make reference to RoHS Directive 2002/95/EC. We confirm that
all the products identified as being compliant to Directive 2002/95/EC conform to Directive 2011/65/EU.
Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as Halogen-Free follow Halogen-Free
requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference
to the IEC 61249-2-21 definition. We confirm that all the products identified as being compliant to IEC 61249-2-21
conform to JEDEC JS709A standards.
Revision: 02-Oct-12
Document Number: 91000
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