SIHB24N65EF-GE3 [VISHAY]
Power Field-Effect Transistor, 24A I(D), 650V, 0.156ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-263AB, TO-263, D2PAK-3/2;
| 型号： | SIHB24N65EF-GE3 |
| 厂家： | 
VISHAY |
| 描述： | Power Field-Effect Transistor, 24A I(D), 650V, 0.156ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-263AB, TO-263, D2PAK-3/2 开关 脉冲 晶体管 |
| 文件： | 总7页 (文件大小：162K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SiHB24N65EF
Vishay Siliconix
www.vishay.com
E Series Power MOSFET with Fast Body Diode
FEATURES
• Fast body diode MOSFET using E series
technology
• Reduced trr, Qrr, and IRRM
• Low figure-of-merit (FOM) Ron x Qg
• Low input capacitance (Ciss
• Low switching losses due to reduced Qrr
• Ultra low gate charge (Qg)
PRODUCT SUMMARY
VDS (V) at TJ max.
DS(on) max. at 25 °C ()
Qg max. (nC)
700
R
VGS = 10 V
0.156
122
17
)
Q
gs (nC)
gd (nC)
Q
36
Configuration
Single
• Avalanche energy rated (UIS)
• Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
D
APPLICATIONS
D2PAK (TO-263)
• Telecommunications
- Server and telecom power supplies
• Lighting
G
- High-intensity discharge (HID)
- Fluorescent ballast lighting
• Consumer and computing
- ATX power supplies
• Industrial
S
D
G
N-Channel MOSFET
S
- Welding
- Battery chargers
• Renewable energy
- Solar (PV inverters)
• Switch mode power supplies (SMPS)
• Applications using the following topologies
- LCC
- Phase shifted bridge (ZVS)
- 3-level inverter
- AC/DC bridge
ORDERING INFORMATION
Package
D2PAK (TO-263)
SiHB24N65EF-GE3
Lead (Pb)-free and Halogen-free
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
LIMIT
UNIT
Drain-Source Voltage
Gate-Source Voltage
VDS
650
V
VGS
30
T
C = 25 °C
24
Continuous Drain Current (TJ = 150 °C)
VGS at 10 V
ID
TC = 100 °C
15
A
Pulsed Drain Current a
IDM
65
Linear Derating Factor
Single Pulse Avalanche Energy b
2
691
W/°C
mJ
W
EAS
PD
Maximum Power Dissipation
250
Operating Junction and Storage Temperature Range
Drain-Source Voltage Slope
Reverse Diode dV/dt d
TJ, Tstg
-55 to +150
70
°C
TJ = 125 °C
for 10 s
dV/dt
V/ns
°C
50
Soldering Recommendations (Peak Temperature) c
300
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature
b. VDD = 50 V, starting TJ = 25 °C, L = 28.2 mH, Rg = 25 , IAS = 7 A
c. 1.6 mm from case
d. ISD ID, dI/dt = 900 A/μs, starting TJ = 25 °C
S17-0293-Rev. B, 27-Feb-17
Document Number: 91609
1
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SiHB24N65EF
Vishay Siliconix
www.vishay.com
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
TYP.
MAX.
UNIT
Maximum Junction-to-Ambient
RthJA
RthJC
-
-
62
°C/W
Maximum Junction-to-Case (Drain)
0.5
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX. UNIT
Static
Drain-Source Breakdown Voltage
VDS
VGS = 0 V, ID = 250 μA
Reference to 25 °C, ID = 1 mA
VDS = VGS, ID = 250 μA
650
-
-
V
V/°C
V
VDS/TJ
VGS(th)
-
2
-
-
-
-
-
-
0.68
-
VDS Temperature Coefficient
Gate-Source Threshold Voltage (N)
-
4
VGS
VGS
=
=
20 V
30 V
-
-
100
1
nA
μA
Gate-Source Leakage
IGSS
IDSS
VDS = 520 V, VGS = 0 V
VDS = 520 V, VGS = 0 V, TJ = 125 °C
VGS = 10 V ID = 12 A
-
1
Zero Gate Voltage Drain Current
μA
-
500
Drain-Source On-State Resistance
Forward Transconductance
Dynamic
RDS(on)
gfs
0.13
7.2
0.156
-
VDS = 30 V, ID = 12 A
S
Input Capacitance
Ciss
Coss
Crss
-
-
-
2774
128
4
-
-
-
VGS = 0 V,
Output Capacitance
V
DS = 100 V,
f = 1 MHz
Reverse Transfer Capacitance
pF
nC
Effective Output Capacitance, Energy
Related a
Co(er)
Co(tr)
-
-
96
-
-
VDS = 0 V to 520 V, VGS = 0 V
Effective Output Capacitance, Time
Related b
333
Total Gate Charge
Qg
Qgs
Qgd
td(on)
tr
-
-
81
17
36
24
34
80
46
0.5
122
-
Gate-Source Charge
Gate-Drain Charge
Turn-On Delay Time
Rise Time
V
GS = 10 V
ID = 12 A, VDS = 520 V
-
-
-
48
68
120
92
1.0
-
VDD = 520 V, ID = 12 A,
GS = 10 V, Rg = 9.1
ns
V
Turn-Off Delay Time
Fall Time
td(off)
tf
-
-
Gate Input Resistance
Drain-Source Body Diode Characteristics
Rg
f = 1 MHz, open drain
0.2
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
Continuous Source-Drain Diode Current
Pulsed Diode Forward Current
IS
-
-
-
-
24
65
A
G
ISM
S
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
VSD
trr
TJ = 25 °C, IS = 12 A, VGS = 0 V
-
-
-
-
0.9
288
2.1
12
1.2
V
ns
μC
A
-
-
-
TJ = 25 °C, IF = IS = 12 A,
dI/dt = 100 A/μs, VR = 400 V
Qrr
IRRM
Notes
a. Coss(er) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 % to 80 % VDSS
b. Coss(tr) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 % to 80 % VDSS
S17-0293-Rev. B, 27-Feb-17
Document Number: 91609
2
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SiHB24N65EF
Vishay Siliconix
www.vishay.com
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
80
3
2.5
2
TOP 15 V
TJ = 25 °C
14 V
ID = 12 A
13 V
12 V
11 V
60
40
10 V
9 V
8 V
7 V
1.5
1
VGS = 10 V
20
0
0.5
6 V
5 V
0
0
5
10
15
20
25
30
- 60 - 40 - 20
0
20 40 60 80 100 120 140 160
TJ, Junction Temperature (°C)
VDS, Drain-to-Source Voltage (V)
Fig. 1 - Typical Output Characteristics
Fig. 4 - Normalized On-Resistance vs. Temperature
40
30
20
10
0
10 000
TOP 15 V
TJ = 150 °C
Ciss
14 V
13 V
12 V
11 V
10 V
9 V
ġ
VGS = 0 V, f = 1 MHz
Ciss = Cgs + Cgd, Cds Shorted
Crss = Cgd
1000
100
10
7 V
Coss = Cds + Cgd
Coss
8 V
ġ
ġ
6 V
5 V
Crss
ġ
1
0
5
10
15
20
25
30
0
100
200
300
400
500
600
VDS, Drain-to-Source Voltage (V)
VDS, Drain-to-Source Voltage (V)
Fig. 2 - Typical Output Characteristics
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
80
60
40
16
5000
14
12
10
Coss
Eoss
8
6
TJ = 150 °C
500
50
20
0
4
2
0
TJ = 25 °C
VDS = 28.8 V
0
5
10
15
20
25
0
100
200
300
VDS
400
500
600
VGS, Gate-to-Source Voltage (V)
Fig. 3 - Typical Transfer Characteristics
S17-0293-Rev. B, 27-Feb-17
Fig. 6 - Coss and Eoss vs. VDS
Document Number: 91609
3
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SiHB24N65EF
Vishay Siliconix
www.vishay.com
24
20
16
12
8
25
20
15
10
5
VDS = 520 V
VDS = 325 V
VDS = 130 V
4
0
0
0
30
60
90
120
150
25
50
75
100
125
150
Qg, Total Gate Charge (nC)
TJ, Case Temperature (°C)
Fig. 10 - Maximum Drain Current vs. Case Temperature
Fig. 7 - Typical Gate Charge vs. Gate-to-Source Voltage
850
I
= 10 mA
D
100
825
800
775
750
TJ = 150 °C
TJ = 25 °C
10
ġ
725
700
675
650
1
VGS = 0 V
- 60 - 40 - 20
0
20 40 60 80 100 120 140 160
0.1
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
TJ, Junction Temperature (°C)
VSD, Source-Drain Voltage (V)
Fig. 8 - Typical Source-Drain Diode Forward Voltage
Fig. 11 - Temperature vs. Drain-to-Source Voltage
IDM = Limited
100
10
100 μs
Limited by RDS(on)
*
1
1 ms
Operation in this Area
Limited by RDS(on)
10 ms
0.1
T
T
= 25 °C
= 150 °C
C
J
Single Pulse
BVDSS Limited
0.01
1
10
100
1000
VDS, Drain-to-Source Voltage (V)
* VGS > minimum VGS at which RDS(on) is specified
Fig. 9 - Maximum Safe Operating Area
S17-0293-Rev. B, 27-Feb-17
Document Number: 91609
4
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SiHB24N65EF
Vishay Siliconix
www.vishay.com
1
Duty Cycle = 0.5
0.2
0.1
0.1
0.05
0.02
Single Pulse
0.01
0.0001
0.001
0.01
0.1
1
Pulse Time (s)
Fig. 12 - Normalized Thermal Transient Impedance, Junction-to-Case
RD
VDS
VDS
tp
VGS
VDD
D.U.T.
RG
+
V
-
DD
VDS
10 V
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
IAS
Fig. 13 - Switching Time Test Circuit
Fig. 16 - Unclamped Inductive Waveforms
VDS
QG
10 V
90 %
QGS
QGD
10 %
VGS
VG
td(on) tr
td(off) tf
Charge
Fig. 17 - Basic Gate Charge Waveform
Fig. 14 - Switching Time Waveforms
Current regulator
Same type as D.U.T.
L
VDS
Vary tp to obtain
required IAS
50 kΩ
12 V
0.2 µF
D.U.T
IAS
0.3 µF
RG
+
-
VDD
+
-
VDS
D.U.T.
10 V
VGS
0.01 Ω
tp
3 mA
Fig. 15 - Unclamped Inductive Test Circuit
IG
ID
Current sampling resistors
Fig. 18 - Gate Charge Test Circuit
Document Number: 91609
S17-0293-Rev. B, 27-Feb-17
5
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SiHB24N65EF
Vishay Siliconix
www.vishay.com
Peak Diode Recovery dV/dt Test Circuit
+
Circuit layout considerations
• Low stray inductance
• Ground plane
D.U.T.
• Low leakage inductance
current transformer
-
+
-
-
+
Rg
• dV/dt controlled by Rg
• Driver same type as D.U.T.
• ISD controlled by duty factor “D”
• D.U.T. - device under test
+
-
VDD
Driver gate drive
P.W.
P.W.
D =
Period
Period
V
GS = 10 Va
D.U.T. lSD waveform
D.U.T. VDS waveform
Reverse
recovery
current
Body diode forward
current
dI/dt
Diode recovery
dV/dt
VDD
Re-applied
voltage
Body diode forward drop
Inductor current
ISD
Ripple ≤ 5 %
Note
a. VGS = 5 V for logic level devices
Fig. 19 - For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91609.
S17-0293-Rev. B, 27-Feb-17
Document Number: 91609
6
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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Disclaimer
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Revision: 13-Jun-16
Document Number: 91000
1
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