SIP21110 [VISHAY]
250-mA Adjustable, Low Dropout Regulator;
| 型号： | SIP21110 |
| 厂家： | 
VISHAY |
| 描述： | 250-mA Adjustable, Low Dropout Regulator |
| 文件： | 总12页 (文件大小：452K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SiP21110
Vishay Siliconix
250-mA Adjustable, Low Dropout Regulator
DESCRIPTION
FEATURES
•
•
•
•
•
•
•
TSOT23-5L (3.05 mm x 2.85 mm x 1.0 mm)
1.0 % output voltage accuracy at 25 °C
Low dropout voltage: 225 mV at 250 mA
35 µA (typical) ground current in 1 mA load
1 µA maximum shutdown current at 85 °C
Output auto discharge in shutdown mode
The SiP21110 BiCMOS 250 mA LDO voltage regulators are
the perfect choice for low battery operated low powered
applications. An ultra low ground current and low dropout
voltage of 225 mV at 250 mA load helps to extend battery life
for portable electronics.
RoHS
COMPLIANT
The SiP21110 output is adjusted with an external resistor
network.
Built-in short circuit (500 mA typical) and thermal
protection (160 °C typical)
The regulator allows stable operation with very small ceramic
output capacitors, reducing board space and component
cost. It is designed to maintain regulation while delivering
330 mA typical peak current upon turn-on. During start-up,
an active pull-down circuit improves the output transient
response and regulation. In shutdown mode, the output
automatically discharges to ground through a 100 Ω NMOS.
•
- 40 °C to + 125 °C junction temperature range for
operation
Uses low ESR ceramic capacitors
Compliant to RoHS Directive 2002/95/EC
•
•
APPLICATIONS
•
•
•
•
•
•
Cellular phones, wireless handsets
PDAs
MP3 players
Digital cameras
Pagers
The SiP21110 are available in TSOT23-5L packages for
operation over the industrial operation range (- 40 °C to
+ 85 °C).
Wireless modem
• Noise-sensitive electronic systems
TYPICAL APPLICATION CIRCUIT
1
2
3
5
VIN
VOUT
VIN
VOUT
CIN = 1 µF
COUT =1µF
GND
EN
SiP21110
EN
4
Adj
TSOT23-5L Package
Document Number: 69921
S09-1046-Rev. C, 08-Jun-09
www.vishay.com
1
SiP21110
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS
Parameter
Limit
- 0.3 to 6.5
- 0.3 to 6.5
Short Circuit Protected
- 0.3 to VIN + 0.3
305
Unit
Input Voltage, VIN to GND
V
V
EN (See Detailed Description)
Output Current (IOUT
Output Voltage (VOUT
)
V
)
Package Power Dissipation (PD)a
mW
°C/W
b
Package Thermal Resistance (θJA
)
180
Maximum Junction Temperature, TJ(max)
Storage Temperature, TSTG
125
- 65 to 150
260
°C
c
Lead Temperature, TL
Notes:
a. Derate 5.5 mW/°C above TA = 70 °C.
b. Device mounted with all leads soldered or welded to multilayer 1S2P PC board.
c. Soldering for 5 s.
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating/conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING RANGE
Parameter
Limit
2.2 to 6
- 40 to 85
Unit
V
Input Voltage, VIN
Operating Ambient Temperature TA
°C
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Document Number: 69921
S09-1046-Rev. C, 08-Jun-09
SiP21110
Vishay Siliconix
SPECIFICATIONS
Test Conditions Unless Specified
IN = VOUT(nom) + 1 V = VEN
V
VOUT = 2.8 V, CIN = 1 µF, COUT = 1 µF
- 40 °C < TA < 85 °C for Full Temp.
Parameter
Symbol
Temp.a Min.b Typ.c Max.b Unit
Input Voltage Range
VIN
Full
2.2
6
1.212
1.23
5
Room 1.188
1.2
Feedback Voltage
VAdj
VOUTR
VOUT
V
Full
Full
1.170
1.3
Output Voltage Rangef
Output Voltage Accuracy
Room
Full
- 1
1
VOUT = 2.8 V, IL = 1 mA
%
- 2.5
2.5
0.2
Line Regulation
Load Regulation
LNR
LDR
VIN range 3.8 V to 6 V, IL = 1 mA
VIN 3.8 V, IL step 1 mA to 250 mA
Room
Room
Room
Full
0.025
0.001
225
%/V
%/mA
180
300
390
75
85
75
85
1
Dropout Voltaged
VDO
IL = 250 mA
mV
Room
Full
35
39
VIN 3.8 V, IL = 1 mA
Ground Currente
IGND
Room
Full
µA
V
IN 3.8 V, IL = 250 mA
Shutdown Current
Output Current Limit
EN Input Current
IVINLKG
IO-Limit
IEN
Full
0.035
500
VO = 0 V
Room
Full
275
1.2
800
1
mA
µA
EN = VIN = 6 V
0.004
VENH
VENL
minimum VEN output on
Full
EN Pin Input Voltage
V
maximum VEN output off
VOUT = 2 V
Full
Room
Full
0.4
Auto Discharge Resistance
Thermal Shutdown Junction Temperature
Thermal Hysteresis
RDIS
TJSD
100
160
20
Ω
minimum VEN output on
maximum VEN output off
°C
THYST
Full
BW = 10 Hz to 100 kHz,
1 mA < IOUT < 250 mA
Output Noise Voltage (RMS)
eN
Room
350
µV
f = 1 kHz, IOUT = 10 mA
f = 10 kHz, IOUT = 10 mA
f = 100 kHz, IOUT = 10 mA
EN to VOUT delay; IOUT = 1 mA
72
53
38
70
Ripple Rejection
PSRR
ton
dB
µs
Output Voltage Turn-On Time
Notes:
Room
a. Room = 25 °C, Full = - 40 °C to 85 °C. Derate 5.5 mW/°C for SiP21110 above TA = 70 °C.
b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. Dropout voltage is defined as the input-to-output differential voltage at which the output voltage drops 2 % below its nominal value with
constant load. For outputs = 2.2 V, dropout voltage is not applicable due to 2.2 V minimum input voltage requirement.
e. Ground current is specified for normal operation as well as “drop-out” operation.
f. The LDO output range is confined to 2.5 V minimum and 5.0 V maximum as a result of min VIN is 2.2 V. For linear regulator outputs where the
output voltages is less than 2.5 V the dropout voltage does not apply.
Document Number: 69921
S09-1046-Rev. C, 08-Jun-09
www.vishay.com
3
SiP21110
Vishay Siliconix
TIMING WAVEFORMS
V
V
IN
V
EN
t
r
1 µs
0 V
t
ON
NOM
0.95 V
NOM
V
OUT
Figure 1.
PIN CONFIGURATION
V
1
V
IN
V
V
5
5
1
2
IN
OUT
OUT
2
3
GND
EN
GND
EN
4
4
3
Adj
Adj
TOP VIEW
BOTTOM VIEW
TSOT23-5L Package
Figure 2.
PIN DESCRIPTION
Pin Number
Name
Function
By applying less than 0.4 V to this pin, the device will be turned off. Connect this pin to VIN if unused.
Do not leave floating.
EN
3
2
1
5
4
GND
VIN
Ground pin. For better thermal capability, directly connected to large ground plane.
Input supply pin. Bypass this pin with a 1 µF ceramic or tantalum capacitor to ground.
VOUT
Adj
Output voltage. Connect COUT between this pin and ground.
Adjust input pin. Connect feedback resistors to program the output voltage for trim value of 1.2 V.
ORDERING INFORMATION
Part Number
Marking
Temperature Range
Package
SiP21110DT-T1-E3
AC
- 40 °C to 85 °C
TSOT23-5L
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Document Number: 69921
S09-1046-Rev. C, 08-Jun-09
SiP21110
Vishay Siliconix
TYPICAL CHARACTERISTICS
2.84
1.210
1.205
2.83
2.82
ILOAD = 1 mA
2.81
2.80
1.200
1.195
2.79
2.78
2.77
2.76
ILOAD = 250 mA
1.190
VIN = 3.8 V
75 100
1.185
- 50
- 25
0
25
50
125
- 50
- 25
0
25
Temperature (°C)
VADJ vs. Temperature
50
75
100
125
Temperature (°C)
VOUT vs. ILOAD vs. Temperature
300
250
200
150
100
50
300
250
200
150
100
50
TA = 85 °C
IOUT
= 250 mA
TA = 25 °C
IOUT
= 150 mA
TA = - 40 °C
IOUT
= 50 mA
0
0
2
3
4
5
0
50
100
150
200
250
VIN (V)
ILOAD (mA)
VDO vs. ILOAD
VDO vs. VIN
300
250
200
150
100
50
3.00
2.50
2.00
1.50
1.00
0.50
0.00
ILOAD = 250 mA
IOUT = 0 mA
ILOAD = 150 mA
IOUT = 250 mA
ILOAD = 50 mA
V
OUT = 2.8 V
0
- 40
- 15
10
35
60
85
0.00
1.00
2.00
3.00
4.00 5.00
6.00
Temperature (°C)
VIN (V)
VDO vs. Temperature
VOUT vs. VIN
Document Number: 69921
S09-1046-Rev. C, 08-Jun-09
www.vishay.com
5
SiP21110
Vishay Siliconix
TYPICAL CHARACTERISTICS
40
50
45
40
35
30
25
VIN = 6 V
39
ILOAD = 250 mA
38
37
36
35
34
33
VIN = 3.8 V
ILOAD = 1 mA
V
OUT = 2.8 V
V
OUT = 2.8 V
- 40
- 15
10
35 60
85
0
50
100
150
200
250
Temperature (°C)
ILOAD (mA)
IGND vs. ILOAD
IGND vs. Temperature
50
40
30
20
10
0
2.800
2.799
2.798
2.797
2.796
2.795
2.794
2.793
2.792
2.791
IOUT = 250 mA
IOUT = 1 mA
V
OUT = 2.8 V
0.0
1.0
2.0
3.0
4.0 5.0
6.0
0
50
100
IOUT (mA)
Load Regulation
150
200
250
VIN (V)
IGND vs. VIN
2.800
2.799
2.798
2.797
2.796
2.795
3.8
4.35
4.9
VIN (V)
5.45
6
Line Regulation
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Document Number: 69921
S09-1046-Rev. C, 08-Jun-09
SiP21110
Vishay Siliconix
TYPICAL OPERATING WAVEFORMS
V
(50 mV/div)
OUT
V
(100 mV/div)
OUT
I
(100 mA/div)
I
(100 mA/div)
OUT
OUT
100 µs/div
100 µs/div
V
OUT = 1.2 V, VIN = 2.2 V, IOUT = 10 mA to 150 mA
Load Transient Response
V
OUT = 3.3 V, VIN = 4.3 V, IOUT = 10 mA to 250 mA
Load Transient Response
V
(50 mV/div)
OUT
V
(100 mV/div)
OUT
I
(100 mA/div)
OUT
I
(100 mA/div)
OUT
100 µs/div
100 µs/div
V
OUT = 1.2 V, VIN = 2.2 V, IOUT = 10 mA to 250 mA
Load Transient Response
V
OUT = 1.2 V, VIN = 2.2 V, IOUT = 50 mA to 250 mA
Load Transient Response
V
(50 mV/div)
OUT
V
(50 mV/div)
OUT
I
(100 mA/div)
I
(100 mA/div)
OUT
OUT
100 µs/div
100 µs/div
V
OUT = 3.3 V, VIN = 4.3 V, IOUT = 10 mA to 150 mA
Load Transient Response
V
OUT = 4.5 V, VIN = 5.5 V, IOUT = 10 mA to 150 mA
Load Transient Response
Document Number: 69921
S09-1046-Rev. C, 08-Jun-09
www.vishay.com
7
SiP21110
Vishay Siliconix
TYPICAL OPERATING WAVEFORMS
V
(50 mV/div)
V
(50 mV/div)
OUT
OUT
I
(100 mA/div)
I
(100 mA/div)
OUT
OUT
100 µs/div
100 µs/div
V
OUT = 4.5 V, VIN = 5.5 V, IOUT = 150 mA to 250 mA
Load Transient Response
V
OUT = 3.3 V, VIN = 4.3 V, IOUT = 150 mA to 250 mA
Load Transient Response
V
(100 mV/div)
OUT
I
(100 mA/div)
OUT
100 µs/div
V
OUT = 4.5 V, VIN = 5.5 V, IOUT = 10 mA to 250 mA
Load Transient Response
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Document Number: 69921
S09-1046-Rev. C, 08-Jun-09
SiP21110
Vishay Siliconix
TYPICAL OPERATING WAVEFORMS
V
(1 V/div)
IN
V
(500 mV/div)
(10 mV/div)
IN
V
(10 mV/div)
V
OUT
OUT
100 µs/div
500 µs/div
V
OUT = 1.2 V, IOUT = 250 mA, VIN = 2.2 V to 2.7 V
Line Transient Response
V
OUT = 4.5 V, IOUT = 250 mA, VIN = 5.5 V to 6 V
Line Transient Response
V
(1 V/div)
IN
V
(1 V/div)
IN
V
(10 mV/div)
OUT
V
(10 mV/div)
OUT
500 µs/div
500 µs/div
V
OUT = 1.2 V, IOUT = 250 mA, VIN = 2.2 V to 3.2 V
Line Transient Response
VOUT = 3.3 V, IOUT = 250 mA, VIN = 4.3 V to 4.8 V
Line Transient Response
V
(1 V/div)
IN
V
(10 mV/div)
OUT
500 µs/div
V
OUT = 3.3 V, IOUT = 250 mA, VIN = 4.3 V to 5.3 V
Line Transient Response
Document Number: 69921
S09-1046-Rev. C, 08-Jun-09
www.vishay.com
9
SiP21110
Vishay Siliconix
FUNCTIONAL BLOCK DIAGRAM
VIN
EN
Enable
Error-Amp
Bandgap
Reference
Adj
VOUT
Current Limit and
Thermal
GND
Figure 3.
DETAILED DESCRIPTION
As shown in the block diagram, the circuit consists of a
bandgap reference, error amplifier, P-channel pass
transistor and an internal feedback resistor voltage divider,
which is used to monitor and control the output voltage.
A constant 1.2 V bandgap reference voltage is applied to the
non-inverting input of the error amplifier. The error amplifier
compares this reference with the feedback voltage on its
inverting input and amplifies the difference. If the feedback
voltage is lower than the reference voltage, the pass-
transistor gate is pulled low. This increases the PMOS's gate
to source voltage and allows more current to pass through
the transistor to the output which increases the output
voltage. Conversely, if the feedback voltage is higher than
the reference voltage, the pass transistor gate is pulled high,
decreasing the gate-to-source voltage, thereby allowing less
current to pass to the output and causing it to drop.
Shutdown and Auto-Dischage/No-Discharge
Bringing the EN voltage low will place the part in shutdown
mode where the device output enters a high-impedance
state and the quiescent current is reduced to below 1 µA,
reducing the drain on the battery in standby mode and
increasing standby time. Connect EN pin to input for normal
operation. The output has an internal pull down to discharge
the output to ground when the EN pin is low. The internal pull
down is a 100 Ω typical resistor, which can discharge a 1 µF
in less than 1 ms. Refer to Typical Operating Waveforms for
turn-off waveforms.
Output Voltage Selection
V
IN
1.2 V
+
Reference
Error-Amp
Internal P-Channel Pass Transistor
V
OUT
-
A 0.9 Ω (typical) P-channel MOSFET is used as the pass
transistor for SiP21110. The MOSFET transistor offers many
advantages over the more, formerly, common PNP pass
transistor designs, which ultimately result in longer battery
lifetime. The main disadvantage of PNP pass transistors is
that they require a certain base current to stay on, which
significantly increases under heavy load conditions. In
addition, during dropout, when the pass transistor saturates,
the PNP regulators waste considerable current. In contrast,
P-channel MOSFETS require virtually zero-base drive and
do not suffer from the stated problems. These savings in
base drive current translate to lower quiescent current which
is typical around 35 µA as shown in the Typical
Characteristics.
R
R
1
2
Figure 4.
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Document Number: 69921
S09-1046-Rev. C, 08-Jun-09
SiP21110
Vishay Siliconix
The SiP21110 has a user-adjustable output that can be set
through the resistor feedback network consisting of R1 and
R2. R2 range of 100K to 400K is recommended to be
consistent with ground current specification. R1 can then be
determined by the following equation:
such as the Z5U and Y5V exhibit large capacitance and ESR
variation over temperature. If such capacitors are used, a 2.2
µF or larger value may be needed to ensure stability over the
industrial temperature range. If using higher quality ceramic
capacitors, such as those with X7R and Y7R dielectrics, a
1 µF capacitor will be sufficient at all operating temperatures.
VOUT
(
)
- 1
R1 = R2
x
V
ref
Operating Region and Power Dissipation
Where Vref is typically 1.2 V. Use 1 % or better resistors for
better output voltage accuracy (see Figure 4).
An important consideration when designing power supplies
is the maximum allowable power dissipation of a part. The
maximum power dissipation in any application is dependant
on the maximum junction temperature, TJ(max) = 125 °C, the
ambient temperature, TA, and the junction-to-ambient ther-
mal resistance for the package, which is the summation of
Current Limit
The SiP21110 includes a current limit block which monitors
the current passing through the pass transistor through a
current mirror and controls the gate voltage of the MOSFET,
limiting the output current to 330 mA (typical). This current
limit feature allows for the output to be shorted to ground for
an indefinite amount of time without damaging the device.
θJ-C, the thermal resistance of the package, and θC-A, the
thermal resistance through the PC board and copper traces.
Power dissipation may be expressed as:
T
- T
A
(max)
J
Thermal-Overload Protection
P
=
(max)
θ J-C + θ C-A
The thermal overload protection limits the total power
dissipation and protects the device from being damaged.
When the junction temperature exceeds TJ = 150 °C, the
device turns the P-Channel pass transistor off allowing the
device to cool down. Once the temperature drops by about
20 °C, the thermal sensor turns the pass transistor on again
and resumes normal operation. Consequently, a continuous
thermal overload condition will result in a pulsed output. It is
generally recommended to not exceed the junction
temperature rating of 125 °C for continuous operation.
The GND pin of the SiP21110 acts as both the electrical
connection to GND as well as a path for channeling away
heat. Connect this pin to a GND plane to maximize heat
dissipation. Once maximum power dissipation is calculated
using the equation above, the maximum allowable output
current for any input/output potential can be calculated as
P(max)
IOUT(max)
=
V - VOUT
IN
APPLICATION INFORMATION
PCB Layout
Input/Output Capacitor Selection and Regulator Stability
It is recommended that a low ESR 1 µF capacitor be used on
the SiP21110 input. A larger input capacitance with lower
ESR would improve noise rejection and line-transient
response. A larger input bypass capacitor may be required in
applications involving long inductive traces between the
source and LDO. The circuit is stable with only a small output
capacitor equal to 6 nF/mA (≈ 1 µF at 150 mA) of load. Since
the bandwidth of the error amplifier is around 1 MHz to 3 MHz
and the dominant pole is at the output node, the capacitor
should be capacitive in this range, i.e., for 150 mA load
current, an ESR < 0.4 Ω is necessary. Parasitic inductance
of about 10 nH can be tolerated. Applying a larger output
capacitor would increase power supply rejection and
improve load-transient response. Some ceramic dielectrics
The component placement around the LDO should be done
carefully to achieve good dynamic line and load response.
The input and noise capacitor should be kept close to the
LDO. The rise in junction temperature depends on how
efficiently the heat is carried away from junction-to-ambient.
The junction-to-lead thermal impedance is a characteristic of
the package and is fixed. The thermal impedance between
lead-to-ambient can be reduced by increasing the copper
area on PCB. Increase the input, output and ground trace
area to reduce the junction-to-ambient thermal impedance.
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?69921.
Document Number: 69921
S09-1046-Rev. C, 08-Jun-09
www.vishay.com
11
Legal Disclaimer Notice
Vishay
Disclaimer
All product specifications and data are subject to change without notice.
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf
(collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein
or in any other disclosure relating to any product.
Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any
information provided herein to the maximum extent permitted by law. The product specifications do not expand or
otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed
therein, which apply to these products.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this
document or by any conduct of Vishay.
The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless
otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such
applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting
from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding
products designed for such applications.
Product names and markings noted herein may be trademarks of their respective owners.
Document Number: 91000
Revision: 18-Jul-08
www.vishay.com
1
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