SUD50N03-12P-E3 [VISHAY]
Power Field-Effect Transistor, 30V, 0.012ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-252AA, DPAK-3/2;型号: | SUD50N03-12P-E3 |
厂家: | VISHAY |
描述: | Power Field-Effect Transistor, 30V, 0.012ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-252AA, DPAK-3/2 脉冲 晶体管 |
文件: | 总7页 (文件大小:157K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
SUD50N03-12P
Vishay Siliconix
N-Channel 30 V (D-S) MOSFET
FEATURES
•
TrenchFET® Power MOSFET
PRODUCT SUMMARY
I
D (A)a
17.5
VDS (V)
RDS(on) ()
•
100 % R and UIS Tested
g
0.0120 at VGS = 10 V
0.0175 at VGS = 4.5 V
• Compliant to RoHS Directive 2002/95/EC
30
14.5
TO-252
D
G
Drain Connected to Tab
G
D
S
Top View
S
Ordering Information: SUD50N03-12P-E3 (Lead (PB) free)
N-Channel MOSFET
ABSOLUTE MAXIMUM RATINGS (T = 25 °C, unless otherwise noted)
A
Parameter
Symbol
Limit
30
Unit
VDS
Drain-Source Voltage
Gate-Source Voltage
V
VGS
20
TA = 25 °C
17.5
12.4
40
Continuous Drain Currenta
ID
TA = 100 °C
IDM
IS
Pulsed Drain Current
A
Continuous Source Current (Diode Conduction)a
Avalanche Current
5
IAS
EAS
30
L = 0.1 mH
Single Pulse Avalanche Energy
45
mJ
W
TC = 25 °C
TA = 25 °C
46.8
PD
Maximum Power Dissipation
6.5a
TJ, Tstg
Operating Junction and Storage Temperature Range
- 55 to 175
°C
THERMAL RESISTANCE RATINGS
Parameter
Symbol
Typical
Maximum
Unit
t 10 s
18
40
23
50
Maximum Junction-to-Ambienta
RthJA
Steady State
°C/W
RthJC
Maximum Junction-to-Case
2.6
3.2
Note:
a. Surface mounted on FR4 board, t 10 s.
Document Number: 72267
S12-0335-Rev. C, 13-Feb-12
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1
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SUD50N03-12P
Vishay Siliconix
SPECIFICATIONS (T = 25 °C, unless otherwise noted)
J
Parameter
Symbol
Test Conditions
Min .
Typ.a
Max.
Unit
Static
Drain-Source Breakdown Voltage
Gate Threshold Voltage
Gate-Body Leakage
VDS
VGS(th)
IGSS
VGS = 0 V, ID = 250 µA
VDS = VGS, ID = 250 µA
30
1
V
nA
µA
A
3
VDS = 0 V, VGS
=
20 V
100
1
VDS = 24 V, VGS = 0 V
VDS = 24 V, VGS = 0 V, TJ = 125 °C
VDS =5 V, VGS = 10 V
IDSS
Zero Gate Voltage Drain Current
On-State Drain Currentb
50
ID(on)
40
15
VGS = 10 V, ID = 20 A
0.0100
0.0138
0.0120
0.0170
0.0175
Drain-Source On-State Resistanceb
RDS(on)
gfs
VGS = 10 V, ID = 20 A, TJ = 125 °C
VGS = 4.5 V, ID = 15 A
Forward Transconductanceb
Dynamica
VDS = 15 V, ID = 20 A
S
Input Capacitance
Ciss
Coss
Crss
Qg
1600
285
140
28
6
VGS = 0 V, VDS = 25 V, f = 1 MHz
Output Capacitance
pF
Reverse Transfer Capacitance
Total Gate Chargec
Gate-Source Chargec
Gate-Drain Chargec
Gate Resistance
Turn-On Delay Timec
Rise Timec
42
VDS = 15 V, VGS = 10 V, ID = 50 A
f = 1 MHz
Qgs
Qgd
Rg
nC
5
0.3
1.5
9
3.0
15
25
30
20
td(on)
tr
td(off)
tf
VDD = 15 V, RL = 0.3
ID 50 A, VGEN = 10 V, RG = 2.5
15
20
12
ns
Turn-Off Delay Timec
Fall Timec
Source-Drain Diode Ratings and Characteristics (TC = 25 °C)
Pulsed Current
Diode Forward Voltageb
Source-Drain Reverse Recovery Time
ISM
VSD
trr
100
1.5
70
A
V
IF = 40 A, VGS = 0 V
1.2
25
IF = 50 A, dI/dt = 100 A/µs
ns
Notes:
a. Guaranteed by design, not subject to production testing.
b. Pulse test; pulse width 300 µs, duty cycle 2 %.
c. Independent of operating temperature.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
TYPICAL CHARACTERISTICS (25 °C unless noted)
80
80
60
V
GS
= 10 thru 5 V
60
40
20
0
40
20
0
4 V
T
= 125 °C
C
25 °C
3 V
- 55 °C
0
1
2
3
4
5
0
1
2
3
4
5
6
V
DS
- Drain-to-Source Voltage (V)
V
GS
- Gate-to-Source Voltage (V)
Output Characteristics
Transfer Characteristics
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Document Number: 72267
S12-0335-Rev. C, 13-Feb-12
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SUD50N03-12P
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C unless noted)
80
0.05
0.04
0.03
0.02
0.01
0.00
T
= - 55 °C
C
60
40
20
0
25 °C
125 °C
V
GS
= 4.5 V
V
GS
= 10 V
0
10
20
30
40
50
0
20
40
- Drain Current (A)
60
80
I
D
I
D
- Drain Current (A)
Transconductance
On-Resistance vs. Drain Current
2500
2000
1500
1000
500
10
8
V
D
= 15 V
DS
= 50 A
I
C
iss
6
4
2
C
oss
C
rss
0
0
0
5
10
15
20
25
30
0
6
12
18
24
30
V
DS
- Drain-to-Source Voltage (V)
Q
- Total Gate Charge (nC)
g
Capacitance
Gate Charge
1.8
1.6
1.4
1.2
1.0
0.8
0.6
100
10
1
V
D
= 10 V
GS
= 15 A
I
T = 150 °C
J
T = 25 °C
J
- 50 - 25
0
25
50
75 100 125 150 175
0
0.3
0.6
0.9
1.2
1.5
T
- Junction Temperature (°C)
V
SD
- Source-to-Drain Voltage (V)
J
On-Resistance vs. Junction Temperature
Source-Drain Diode Forward Voltage
Document Number: 72267
S12-0335-Rev. C, 13-Feb-12
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3
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SUD50N03-12P
Vishay Siliconix
THERMAL RATINGS
1000
20
Limited
by R
16
12
8
*
100
10
DS(on)
10, 100 µs
1 ms
10 ms
100 ms
1 s
1
10 s
T
= 25 °C
A
0.1
4
Single Pulse
DC, 100 s
0
0.01
0
25
50
75
100
125
150
175
0.1
1
10
100
VDS - Drain-to-Source Voltage (V)
T
- Ambient Temperature (°C)
A
* VGS > minimum VGS at which RDS(on) is specified
Maximum Drain Current vs. Ambient Temperature
Safe Operating Area
2
1
Duty Cycle = 0.5
0.2
0.1
0.1
0.02
0.05
Single Pulse
0.01
-4
-3
-2
-1
10
10
10
10
Square Wave Pulse Duration (sec)
Normalized Thermal Transient Impedance, Junction-to-Ambient
1
10
100
1000
2
1
Duty Cycle = 0.5
0.2
0.1
0.1
0.02
0.05
Single Pulse
0.01
-4
-3
-2
-1
10
10
10
10
Square Wave Pulse Duration (sec)
Normalized Thermal Transient Impedance, Junction-to-Case
1
10
100
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?72267.
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Document Number: 72267
S12-0335-Rev. C, 13-Feb-12
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Package Information
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Vishay Siliconix
TO-252AA Case Outline
E
A
MILLIMETERS
INCHES
MAX.
C2
b3
DIM.
A
MIN.
MAX.
2.38
0.127
0.88
1.14
5.46
0.61
0.89
6.22
-
MIN.
0.086
-
2.18
-
0.094
0.005
0.035
0.045
0.215
0.024
0.035
0.245
-
A1
b
0.64
0.76
4.95
0.46
0.46
5.97
4.10
6.35
4.32
9.40
0.025
0.030
0.195
0.018
0.018
0.235
0.161
0.250
0.170
0.370
b2
b3
C
C2
D
D1
E
6.73
-
0.265
-
E1
H
b
C
b2
e
10.41
0.410
A1
e1
e
2.28 BSC
4.56 BSC
1.40
0.090 BSC
0.180 BSC
e1
L
1.78
1.27
1.02
1.52
0.055
0.070
0.050
0.040
0.060
L3
L4
L5
0.89
-
0.035
-
1.01
0.040
ECN: T13-0359-Rev. O, 03-Jun-13
DWG: 5347
E1
Notes
•
•
Dimension L3 is for reference only.
Xi’an, Mingxin, and GEM SH actual photo.
Revision: 03-Jun-13
Document Number: 71197
1
For technical questions, contact: pmostechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Application Note 826
Vishay Siliconix
RECOMMENDED MINIMUM PADS FOR DPAK (TO-252)
0.224
(5.690)
0.180
0.055
(1.397)
(4.572)
Recommended Minimum Pads
Dimensions in Inches/(mm)
Return to Index
Document Number: 72594
Revision: 21-Jan-08
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Revision: 02-Oct-12
Document Number: 91000
1
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