TFDU7100 [VISHAY]
Infrared Transceiver Module (FIR, 4 Mbit/s) for IrDA combined with Remote Control Receiver (36 kHz to 38 kHz Carrier); 红外收发器模块（ FIR ， 4兆位/秒）的红外线结合遥控接收器（ 36 kHz至38 kHz的载波）
| 型号： | TFDU7100 |
| 厂家： | 
VISHAY |
| 描述： | Infrared Transceiver Module (FIR, 4 Mbit/s) for IrDA combined with Remote Control Receiver (36 kHz to 38 kHz Carrier) |
| 文件： | 总14页 (文件大小：181K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TFDU7100
Vishay Semiconductors
®
Infrared Transceiver Module (FIR, 4 Mbit/s) for IrDA combined
with Remote Control Receiver (36 kHz to 38 kHz Carrier)
Description
The TFDU7100 IrDA compliant transceiver is a multi-
media module that supports IrDA data transfer up to
4 Mbit/s (FIR) and bidirectional Remote Control oper-
ating over a range of more than 18 m. Integrated
within the transceiver are two PIN photodiodes, an
infrared emitter (IRED) and two low-power control IC.
It is ideal for applications requiring both Remote Con-
trol and IrDA communication.
19584
Features
• Compliant to the latest IrDA physical
layer specification (9.6 kbit/s to 4 Mbit/s)
• EMI Immunity > 300 V /m in GSM Bands verified
rms
(according IEC61000-4-3)
• Lead (Pb)-free device
• TV Remote Control receiver with 18 m
receive range
• Remote Control carrier frequency 36 kHz
to 38 kHz
e3
• Qualified for lead (Pb)-free and Sn/Pb processing
(MSL4)
• Qualified for lead (Pb)-free and lead (Pb)-bearing
soldering processes
• Operates from 2.7 V to 5.5 V within specification
over full temperature range from - 25 °C to + 85 °C
• Surface Mount Package, low profile
(L 9.9 mm x 4.1 mm x 4 mm)
• Compliant with IrDA Background Light Specifica-
tion
• Device in accordance with RoHS 2002/95/EC and
WEEE 2002/96/EC
• Split power supply, transmitter and receiver can be
operated from two power supplies with relaxed
requirements saving costs, US - Patent - No.
6,157,476
Applications
• Remote control and IrDA communication in
Multimedia
• Notebook computers, Desktop PC’s, Internet TV
Boxes, Video Conferencing Systems
• Digital Still and Video Cameras
• Printers, fax machines, Photocopiers, Screen Pro-
jectors
Parts Table
Part
Description
Oriented in carrier tape for side view surface mounting
Oriented in carrier tape for top view surface mounting
Qty/Reel
1000 pcs
1000 pcs
TFDU7100-TR3
TFDU7100-TT3
Document Number 84773
Rev. 1.1, 27-Sep-06
www.vishay.com
1
TFDU7100
Vishay Semiconductors
Functional Block Diagram
Open Collector
Output
Envelope
Generator
Amplifier
Amplifier
RC-RXD
Push-Pull
Driver
VCC2
Comparator
RXD
SD
Logic
&
Control
Controlled Driver
TXD
VCC1
GND
19597
Figure 1. Functional Block Diagram
Pin Description
Pin Number
Function
Description
I/O
Active
1
VCC2
IRED anode to be externally connected to VCC2. An external resistor is only
IRED Anode
necessary for controlling the IRED current when a current reduction below
300 mA is intended.
This pin is allowed to be supplied from an uncontrolled power supply
separated from the controlled VCC1 - supply
2
3
IRED Cathode
TXD
IRED Cathode, internally connected to the driver transistor
This Schmitt-Trigger input is used to transmit serial data when SD is low. An
on-chip protection circuit disables the IRED driver if the TXD pin is asserted
for longer than 80 μs.
I
HIGH
LOW
4
RXD
Received Data Output, push-pull CMOS driver output capable of driving
standard CMOS or TTL loads. During transmission the RXD output is active
(echo-on). No external pull-up or pull-down resistor is required. Floating with
a weak pull-up of 500 kΩ (typ.) in shutdown mode.
O
5
6
7
SD
Shutdown for IRDA channel only
Supply Voltage
I
HIGH
LOW
VCC1
RC-RXD
Open Collector Output. This output is active during transmission (echo-on).
O
External pull-up resistor to be added (e.g. 10 kΩ).
8
GND
Ground
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2
Document Number 84773
Rev. 1.1, 27-Sep-06
TFDU7100
Vishay Semiconductors
Absolute Maximum Ratings
Reference point Pin: GND unless otherwise noted.
Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
Parameter
Test Conditions
Symbol
VCC1
Min
Typ.
Max
Unit
V
Supply voltage range,
transceiver
- 0.3 V < VCC2 < 6 V
- 0.5
+ 6.0
Supply voltage range,
transmitter
- 0.5 V < VCC1 < 6 V
- 0.5 V < VCC1 < 6.0 V
VCC2
- 0.5
+ 6.0
V
VRXD
Vin
VCC1 + 0.5
Voltage at RXD
- 0.5
- 0.5
V
V
V
in > VCC1 is allowed
Voltage at all inputs and outputs
Input currents
+ 6.0
10
For all Pins, Except IRED Anode
Pin
mA
Output sinking current
Power dissipation
25
mA
mW
°C
PD
TJ
see derating curve
250
125
+ 85
Junction temperature
Ambient temperature range
(operating)
Tamb
- 30
- 40
°C
Tstg
Storage temperature range
Soldering temperature
+ 100
260
°C
°C
See recommended solder
profile (see figure 5)
IIRED (DC)
IIRED (RP)
Average output current, pin 1
125
700
mA
mA
Repetitive pulse output current, < 0.3 µs, ton < 25 %
pin 1 to pin 2
Virtual source size
Method: (1 - 1/e) encircled
d
2.5
2.8
mm
energy
*)
Maximum Intensity for Class 1
IEC60825-1 or
Ie
(500)**)
EN60825-1,
mW/sr
edition Jan. 2001, operating
below the absolute maximum
ratings
*) Due to the internal limitation measures the device is a "class1" device under all conditions.
**) IrDA specifies the max. intensity with 500 mW/sr.
Definitions:
In the Vishay transceiver data sheets the following nomenclature is used for defining the IrDA operating modes:
SIR: 2.4 kbit/s to 115.2 kbit/s, equivalent to the basic serial infrared standard with the physical layer version IrPhy 1.0
MIR: 576 kbit/s to 1152 kbit/s
FIR: 4 Mbit/s
VFIR: 16 Mbit/s
MIR and FIR were implemented with IrPhy 1.1, followed by IrPhy 1.2, adding the SIR Low Power Standard. IrPhy 1.3 extended the Low Power
Option to MIR and FIR and VFIR was added with IrPhy 1.4. A new version of the standard in any case obsoletes the former version. With
introducing the updated versions the old versions are obsolete. Therefore the only valid IrDA standard is the actual version IrPhy 1.4
(in Oct. 2002).
Document Number 84773
Rev. 1.1, 27-Sep-06
www.vishay.com
3
TFDU7100
Vishay Semiconductors
Electrical Characteristics
Transceiver
Tested at Tamb = 25 °C, VCC1 = VCC2 = 2.7 V to 5.5 V unless otherwise noted.
Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
Parameter
Supply voltage
Test Conditions
Symbol
VCC1
Min
2.7
Typ.
Max
5.5
Unit
V
SD = Low, Ee = 1 klx**), VCC1
ICC1
ICC
Dynamic supply current
5
mA
mA
Average dynamic supply
current, transmitting
IIRED = 300 mA, 25 % Duty
Cycle
6.5
Shutdown supply current*)
Operating temperature range
Output voltage low, RXD
SD = High, T = 25 °C, Ee = 0 klx
ISD
TA
2
mA
°C
V
- 30
+ 85
Cload = 15 pF
VOL
- 0.5
0.15 x
VCC1
Output voltage high, RXD
IOH = - 500 µA
VOH
0.8 x VCC1
0.9 x VCC1
VCC1 + 0.5
V
V
IOH = - 250 µA, Cload = 15 pF
RXD to VCC1 impedance
RRXD
VIL
400
500
600
0.5
kΩ
Input voltage low
(TXD, SD)
- 0.5
V
Input voltage high
(TXD, SD)
VIH
IICH
IIrTX
VCC1 - 0.5
- 2
6
V
Input leakage current
(TXD, SD)
Vin = 0.9 x Vlogic
+ 2
µA
µA
Controlled pull down current
SD, TXD = "0" or "1"
0 < Vin < 0.15 VCC1
+ 150
SD, TXD = "0" or "1"
IIrTX
CI
- 1
0
1
5
µA
pF
V
in > 0.7 VCC1
Input capacitance
(TXD, SD)
*) The Remote Control receiver is always on. The shutdown function is used for disabling the IrDA channel, only
**) Standard Illuminant A
www.vishay.com
4
Document Number 84773
Rev. 1.1, 27-Sep-06
TFDU7100
Vishay Semiconductors
Optoelectronic Characteristics
Receiver
Tested at Tamb = 25 °C, VCC1 = vCC2 = 2.7 V to 5.5 V unless otherwise noted.
Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
Parameter
Test Conditions
Symbol
Ee
Min
Typ.
Max
Unit
mW/m2
(µW/cm2)
Minimum detection threshold
irradiance, SIR mode*)**)
9.6 kbit/s to 115.2 kbit/s
λ = 850 nm - 900 nm
α = 0°, 15°
45
(4.5)
81
(8.1)
mW/m2
(µW/cm2)
576 kbit/s to 4 Mbit/s
λ = 850 nm - 900 nm
α = 0°, 15°
Ee
100
(10)
190
(19)
kW/m2
(mW/cm2)
mW/m2
(µW/cm2)
Maximum irradiance in angular λ = 850 nm - 900 nm
Ee
Ee
5
range***)
(500)
Logic LOEW receiver input
irradiance
λ = 850 nm - 900 nm
tr, tf < 40 ns, tpo = 1.6 µs at
4
(0.4)
f = 115 kHz, no output signal
allowed
10 % to 90 %, CL = 15 pF
90 % to 10 %, CL = 15 pF
tr (RXD)
tf (RXD)
tPW
Rise time of output signal
Fall time of output signal
40
40
ns
ns
µs
RXD pulse width of output
signal, 50 % SIR Mode
Input pulse length
1.4 µs < PWopt < 25 µs
2.1
1.8
Input pulse length
tPW
1.5
2.6
µs
1.4 µs < PWopt < 25 µs
- 25 °C < T < 85 °C**)
RXD pulse width of output
signal, 50 % MIR mode
Input pulse length
tPW
tPW
tPW
tPW
110
100
225
225
250
270
140
275
ns
ns
ns
P
Wopt = 217 ns, 1.152 Mbit/s
RXD pulse width of output
signal, 50 % FIR mode
Input pulse length
PWopt = 125 ns, 4.0 Mbit/s
Input pulse length
PWopt = 250 ns, 4.0 Mbit/s
275
20
ns
ns
Ee = 200 mW/m2,
4 Mbit/s
Stochastic jitter, leading edge
Ee = 200 mW/m2,
1.152 kbit/s
40
ns
Input irradiance = 100 mW/m2,
576 kbit/s
Ee = 200 mW/m2,
80
ns
ns
350
≤ 115.2 kbit/s
Receiver start-up time
After completion of shutdown
programming sequence Power
on delay
500
µs
*) IrDA low power specification is 90 mW/m2. Spec takes a window loss 10 % into account.
**) IrDA sensitivity definition: Minimum Irradiance Ee In Angular Range, power per unit area. The receiver must meet the BER speci-
fication while the source is operating at the minimum intensity in angular range into the minimum half-angle range at the maximum Link
Length.
***) Maximum Irradiance Ee In Angular Range, power per unit area. The optical delivered to the detector by a source operating at the
maximum intensity in angular range at Minimum Link Length must not cause receiver overdrive distortion and possible related link errors.
If placed at the Active Output Interface reference plane of the transmitter, the receiver must meet its bit error ratio (BER) specification
For more definitions see the document “Symbols and Terminology” on the Vishay Website (http://www.vishay.com/docs/82512/82512.pdf).
Document Number 84773
Rev. 1.1, 27-Sep-06
www.vishay.com
5
TFDU7100
Vishay Semiconductors
*)
Remote Control Receiver
Tested at Tamb = 25 °C, VCC1 = vCC2 = 2.7 V to 5.5 V unless otherwise noted.
Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing
Parameter
Test Conditions
λ = 950 nm
α = 0°, 15°, RC5/RC6, 36 kHz
Symbol
EeRC
Min
Typ.
Max
Unit
Minimum detection threshold
irradianceRC
0.4
(0.04)
mW/m2
(µW/cm2)
Maximum detection threshold
irradiance
λ = 950 nm
α = 0°, 15°, 36 kHz to 38 kHz
EeRC
EeRC
0.4
(0.04)
1
2
mW/m2
(µW/cm2)
Minimum detection threshold
irradiance)
λ = 850 nm - 970 nm
0.4
(0.04)
mW/m2
(µW/cm2)
Maximum detection threshold
irradiance
λ = 850 nm - 900 nm
EeRCmax
30
W/m2
Output voltage low, RC-RXD
Output voltage high, RC-RXD
CLoad = 15 pF, RL = 10 kΩ∗∗)
CLoad = 15 pF, RL = 10 kΩ∗∗)
VOLRC
VHLRC
- 0.5
0.15 x VCC1
V
V
VCC1
*) Timing parameters are equivalent to TSOP1238, see that datasheet.
**) The RC-RXD output is an open collector output, therefore a load resistor is mandatory.
Optoelectronic Characteristics
Transmitter
Tested at Tamb = 25 °C, VCC1 = vCC2 = 2.7 V to 5.5 V unless otherwise noted.
Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing
Parameter
Test Conditions
Symbol
ID
Min
450
Typ.
550
Max
650
Unit
mA
IRED operating current
limitation
No external resistor for current
limitation*)
IRED operating current
limitation for low power FIR
mode
VCC2 = 3.3 V, RS = 18 Ω,
Ie 10 ≥ mW/sr
ID
90
mA
Output leakage IRED current
Output radiant intensity
TXD = 0 V, 0 < VCC1 < 5.5 V
IIRED
Ie
- 1
50
1
µA
α = 0°, 15°, full IrDA cone,
TXD = High, SD = Low, no external
resistor for current limitation*)
70
300
mW/sr
α = 0°
Ie
80
200
400
0.04
900
mW/sr
mW/sr
TXD = High, SD = Low, no external
resistor for current limitation*)
VCC1 = 5.0 V, α = 0°, 15°
TXD = Low or SD = High (Receiver is
inactive as long as SD = High)
Ie
Peak - emission wavelength**)
Spectral bandwidth
λp
Δλ
880
nm
nm
ns
45
Optical rise time, fall time
Optical output pulse duration
tropt, tfopt
topt
10
40
Input pulse width 1.63 µs,
115.2 kbit/s (SIR)
1.6
1.63
217
125
250
tTXD
1.75
µs
Input pulse width 217 ns,
1.152 Mbit/s
topt
topt
topt
topt
topt
207
117
242
227
133
258
ns
ns
ns
µs
µs
%
Input pulse width 125 ns,
4.0 Mbit/s
Input pulse width 250 ns,
4.0 Mbit/s
Input pulse width
0.1 µs, < tTXD < 100 µs
Input pulse width
0.1 µs, tTXD ≥ 100 µs
tTXD
100
25
Optical overshoot
*)
Using an external current limiting resistor is allowed and recommended to reduce IRED intensity and operating current when current
reduction is intended to operate at the IrDA low power conditions.
E.g. for VCC2 = 3.3 V a current limiting resistor of Rs = 56 Ω will allow a power minimized operation at IrDA low power conditions.
**) Note: Due to this wavelength restriction compared to the IrDA spec of 850 nm to 900 nm the transmitter is able to operate as source for
the standard Remote Control applications with codes as e.g. Philips RC5/RC6® or RECS 80.
www.vishay.com
6
Document Number 84773
Rev. 1.1, 27-Sep-06
TFDU7100
Vishay Semiconductors
Recommended Circuit Diagram
Operated at a clean low impedance power supply the of the supply voltages V
and injected noise. An
CCx
TFDU7100 needs no additional external components unstable power supply with dropping voltage during
beside a resistor at the open collector RC-RXD-out- transmission may reduce the sensitivity (and trans-
put. However, depending on the entire system design mission range) of the transceiver.
and board layout, additional components may be
required (see figure 2).
The placement of these parts is critical. It is strongly
recommended to position C2 as close as possible to
the transceiver power supply pins. An Tantalum
capacitor should be used for C1 while a ceramic
capacitor is used for C2.
In addition, when connecting the described circuit to
the power supply, low impedance wiring should be
used.
When extended wiring is used the inductance of the
power supply can cause dynamically a voltage drop
VIRED
IRED Anode
VCC1
R1
R2
VCC
C1
C2
Ground
GND
R3
RC-RXD
SD
RC-RXD
at V
. Often some power supplies are not apply to
CC2
SD
follow the fast current rise time. In that case another
TXD
TXD
RXD
4.7 µF (type, see table under C1) at V
ful.
will be help-
CC2
RXD
IRED Cathode
The RC-RXD output is an open collector driver.
Therefore it needs an external pull-up resistor of e.g.
10 kΩ (R3).
19600
Under extreme EMI conditions as placing an RF-
transmitter antenna on top of the transceiver, we rec-
ommend to protect all inputs by a low-pass filter, as a
minimum a 12 pF capacitor, especially at the RXD
port. The transceiver itself withstands EMI at GSM
frequencies above 500 V/m. When interference is
observed, it is picked up by the wiring to the inputs. It
is verified by DPI measurements that as long as the
interfering RF - voltage is below the logic threshold
levels of the inputs and equivalent levels at the out-
puts no interference is expected.
One should keep in mind that basic RF - design rules
for circuit design should be taken into account. Espe-
cially longer signal lines should not be used without
termination. See e.g. "The Art of Electronics" Paul
Horowitz, Winfield Hill, 1989, Cambridge University
Press, ISBN: 0521370957.
Figure 2. Recommended Application Circuit
The capacitor C1 is buffering the supply voltage and
eliminates the inductance of the power supply line.
This one should be a Tantalum or other fast capacitor
to guarantee the fast rise time of the IRED current.
The resistor R1 is the current limiting resistor, which
may be used to reduce the operating current to levels
below the specified controlled values for saving bat-
tery power.
Vishay’s transceivers integrate a sensitive receiver
and a built-in power driver. The combination of both
needs a careful circuit board layout. The use of thin,
long, resistive and inductive wiring should be avoided.
The inputs (TXD, SD) and the output RXD should be
directly (DC) coupled to the I/O circuit.
The capacitor C2 combined with the resistor R2 is the
low pass filter for smoothing the supply voltage. R2,
C1 and C2 are optional and dependent on the quality
Recommended Application Circuit Components
Component
Recommended Value
Vishay Part Number
293D 475X9 016B
C1
C2
R1
R2
R3
4.7 µF, 16 V
0.1 µF, Ceramic
VJ 1206 Y 104 J XXMT
depends on current to be adjusted
47 Ω, 0.125 W
CRCW-0805-47R
CRCW-0805-10K
10 kΩ, 0.125 W
Document Number 84773
Rev. 1.1, 27-Sep-06
www.vishay.com
7
TFDU7100
Vishay Semiconductors
After that TXD is enabled as normal TXD input and
the transceiver is set for the high bandwidth (576 kbit/
s to 4 Mbit/s) mode.
I/O and Software
In the description, already different I/Os are men-
tioned. Different combinations are tested and the
function verified with the special drivers available
from the I/O suppliers. In special cases refer to the I/
O manual, the Vishay application notes, or contact
directly Vishay Sales, Marketing or Application.
Setting to the Lower Bandwidth Mode
(2.4 kbit/s to 115.2 kbit/s)
1. Set SD input to logic "HIGH".
2. Set TXD input to logic "LOW". Wait t > 200 ns.
3. Set SD to logic "LOW" (this negative edge latches
state of TXD, which determines speed setting).
s
Mode Switching
The TFDU7100 is in the SIR mode after power on as
a default mode, therefore the FIR data transfer rate
has to be set by a programming sequence using the
TXD and SD inputs as described below. The low fre-
quency mode covers speeds up to 115.2 kbit/s. Sig-
nals with higher data rates should be detected in the
high frequency mode. Lower frequency data can also
be received in the high frequency mode but with
reduced sensitivity.
To switch the transceivers from low frequency mode
to the high frequency mode and vice versa, the pro-
gramming sequences described below are required.
The SD-pulse duration for programming should be
limited to a maximum of 5 µs avoiding that the trans-
ceiver goes into sleep mode.
4. TXD must be held for t > 200 ns.
h
After that TXD is enabled as normal TXD input and
the transceiver is set for the lower bandwidth (9.6 kbit/s
to 115.2 kbit/s) mode.
50 %
SD
t
s
t
h
High : FIR
Low : SIR
50 %
50 %
TXD
Setting to the High Bandwidth Mode
(0.576 Mbit/s to 4.0 Mbit/s)
14873
1. Set SD input to logic "HIGH".
2. Set TXD input to logic "HIGH". Wait t > 200 ns.
3. Set SD to logic "LOW" (this negative edge latches
state of TXD, which determines speed setting).
s
Figure 3. Mode Switching Timing Diagram
4. After waiting t > 200 ns TXD can be set to logic
h
"LOW". The hold time of TXD is limited by the maxi-
mum allowed pulse length.
Table 2.
Truth table
Inputs
Outputs
Remark
Optical input Irradiance mW/m2
x
SD
TXD
x
RXD
Transmitter
0
RC-RXD
x
high
weakly pulled
(500 kΩ to VCC1
)
Ie
0
low
low
high
x
x
active low (echo)
high
x
x
high
> 100 µs
x
low
> specified RC sensitivity (RC-
protocol)
x
0
active low (envelope)
low
low
low
low
< 4
high
0
0
x
x
> minimum irradiance in angular
range (IrDA)
low (active)
< maximum irradiance in angular
range (IrDA)
low
low
> maximum irradiance in angular
range (IrDA)
x
0
x
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8
Document Number 84773
Rev. 1.1, 27-Sep-06
TFDU7100
Vishay Semiconductors
Recommended Solder Profiles
Solder Profile for Sn/Pb Soldering
on the packing and also in the application note
"Taping, Labeling, Storage and Packing"
(http://www.vishay.com/docs/82601/82601.pdf).
260
10 s max. at 230 °C
240
220
200
180
160
140
120
100
80
240 °C max.
275
2...4 °C/s
≥
T
peak
= 260 °C
T
255 °C for 10 s....30 s
250
225
200
175
150
125
100
75
160 °C max.
≥
T
217 °C for 70 s max
120 s...180 s
90 s max.
2...4 °C/s
30 s max.
70 s max.
60
40
90 s...120 s
20
2 °C...4 °C/s
0
0
50
100
150
200
250
300
350
2 °C...3 °C/s
50
50
19535
Time/s
25
Figure 4. Recommended Solder Profile for Sn/Pb soldering
0
0
100
150
Time/s
200
250
300
350
19532
Lead (Pb)-Free, Recommended Solder Profile
Figure 5. Solder Profile, RSS Recommendation
The TFDU7100 is a lead (Pb)-free transceiver and
qualified for lead (Pb)-free processing. For lead (Pb)-
free solder paste like Sn (3.0 - 4.0) Ag (0.5 - 0.9) Cu,
there are two standard reflow profiles: Ramp-Soak-
Spike (RSS) and Ramp-To-Spike (RTS). The Ramp-
Soak-Spike profile was developed primarily for reflow
ovens heated by infrared radiation. With widespread
use of forced convection reflow ovens the Ramp-To-
Spike profile is used increasingly. Shown below in fig-
ure 5 and 6 are VISHAY's recommended profiles for
use with the TFDU7100 transceivers. For more
details please refer to the application note
280
260
240
220
200
180
160
140
120
100
80
T
= 260 °C max
peak
< 4 °C/s
1.3 °C/s
≤
≤
Time above 217 °C t 70 s
Time above 250 °C t 40 s
Peak temperature T = 260 °C
< 2 °C/s
peak
60
40
20
“SMD Assembly Instructions”
0
0
50
100
150
200
250
300
(http://www.vishay.com/docs/82602/82602.pdf).
Time/s
A ramp-up rate less than 0.9 °C/s is not recom-
mended. Ramp-up rates faster than 1.3 °C/s could
damage an optical part because the thermal conduc-
tivity is less than compared to a standard IC.
Figure 6. RTS Recommendation
Current Derating Diagram
Figure 7 shows the maximum operating temperature
when the device is operated without external current
limiting resistor.
Wave Soldering
For TFDUxxxx and TFBSxxxx transceiver devices
wave soldering is not recommended.
90
85
80
75
70
65
Manual Soldering
Manual soldering is the standard method for lab use.
However, for a production process it cannot be rec-
ommended because the risk of damage is highly
dependent on the experience of the operator. Never-
theless, we added a chapter to the above mentioned
application note, describing manual soldering and
desoldering.
60
55
50
Storage
The storage and drying processes for all VISHAY
transceivers (TFDUxxxx and TFBSxxx) are equiva-
lent to MSL4.
4.5
Operating Voltage [V] at duty cycle 20 %
2.0
2.5
3.0
3.5
4.0
5.0
5.5
6.0
18097
The data for the drying procedure is given on labels
Figure 7. Current Derating Diagram
Document Number 84773
Rev. 1.1, 27-Sep-06
www.vishay.com
9
TFDU7100
Vishay Semiconductors
Optical Window
For the design of the optical windows see application
note “Window Size in Housings”
TFDU7100 - (Universal) Package
19586
Figure 8. Package drawing TFDU7100, dimensions in mm, tolerance 0.2 if not otherwise mentioned
7 x 1 = 7
0.6
2.5
1
8
1
19587
Figure 9. Recommended solder pad layout
www.vishay.com
10
Document Number 84773
Rev. 1.1, 27-Sep-06
TFDU7100
Vishay Semiconductors
Tape and Reel
Reel dimensions
Drawing-No.: 9.800-5090.01-4
Issue: 1; 29.11.05
14017
Figure 10. Reel dimensions, tolerance 0.2 mm, if not otherwise mentioned
Tape Width
A max.
N
W1 min.
W2 max.
W3 min.
W3 max.
mm
24
mm
330
mm
60
mm
mm
mm
mm
24.4
30.4
23.9
27.4
Document Number 84773
Rev. 1.1, 27-Sep-06
www.vishay.com
11
TFDU7100
Vishay Semiconductors
Tape Dimensions
19819
Drawing-No.: 9.700-5251.01-4
Issue: 3; 02.09.05
Figure 11. Tape dimensions, tolerance ± 0.2 mm, if not otherwise mentioned
www.vishay.com
12
Document Number 84773
Rev. 1.1, 27-Sep-06
TFDU7100
Vishay Semiconductors
Ozone Depleting Substances Policy Statement
It is the policy of Vishay Semiconductor GmbH to
1. Meet all present and future national and international statutory requirements.
2. Regularly and continuously improve the performance of our products, processes, distribution and operating
systems with respect to their impact on the health and safety of our employees and the public, as well as
their impact on the environment.
It is particular concern to control or eliminate releases of those substances into the atmosphere which are
known as ozone depleting substances (ODSs).
The Montreal Protocol (1987) and its London Amendments (1990) intend to severely restrict the use of ODSs
and forbid their use within the next ten years. Various national and international initiatives are pressing for an
earlier ban on these substances.
Vishay Semiconductor GmbH has been able to use its policy of continuous improvements to eliminate the use
of ODSs listed in the following documents.
1. Annex A, B and list of transitional substances of the Montreal Protocol and the London Amendments
respectively
2. Class I and II ozone depleting substances in the Clean Air Act Amendments of 1990 by the Environmental
Protection Agency (EPA) in the USA
3. Council Decision 88/540/EEC and 91/690/EEC Annex A, B and C (transitional substances) respectively.
Vishay Semiconductor GmbH can certify that our semiconductors are not manufactured with ozone depleting
substances and do not contain such substances.
We reserve the right to make changes to improve technical design
and may do so without further notice.
Parameters can vary in different applications. All operating parameters must be validated for each
customer application by the customer. Should the buyer use Vishay Semiconductors products for any
unintended or unauthorized application, the buyer shall indemnify Vishay Semiconductors against all
claims, costs, damages, and expenses, arising out of, directly or indirectly, any claim of personal
damage, injury or death associated with such unintended or unauthorized use.
Vishay Semiconductor GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany
Document Number 84773
Rev. 1.1, 27-Sep-06
www.vishay.com
13
Legal Disclaimer Notice
Vishay
Notice
Specifications of the products displayed herein are subject to change without notice. Vishay Intertechnology, Inc.,
or anyone on its behalf, assumes no responsibility or liability for any errors or inaccuracies.
Information contained herein is intended to provide a product description only. No license, express or implied, by
estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Vishay's
terms and conditions of sale for such products, Vishay assumes no liability whatsoever, and disclaims any express
or implied warranty, relating to sale and/or use of Vishay products including liability or warranties relating to fitness
for a particular purpose, merchantability, or infringement of any patent, copyright, or other intellectual property right.
The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications.
Customers using or selling these products for use in such applications do so at their own risk and agree to fully
indemnify Vishay for any damages resulting from such improper use or sale.
Document Number: 91000
Revision: 08-Apr-05
www.vishay.com
1
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