VS-10CTQ150STRLPBF [VISHAY]
Rectifier Diode, Schottky, 1 Phase, 2 Element, 5A, 150V V(RRM), Silicon, TO-263AB, HALOGEN FREE AND ROHS COMPLIANT, PLASTIC, SMD-220, D2PAK-3;型号: | VS-10CTQ150STRLPBF |
厂家: | VISHAY |
描述: | Rectifier Diode, Schottky, 1 Phase, 2 Element, 5A, 150V V(RRM), Silicon, TO-263AB, HALOGEN FREE AND ROHS COMPLIANT, PLASTIC, SMD-220, D2PAK-3 高功率电源 二极管 |
文件: | 总8页 (文件大小:269K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
VS-10CTQ150SPbF, VS-10CTQ150-1PbF
www.vishay.com
Vishay Semiconductors
High Performance Schottky Rectifier, 2 x 5 A
FEATURES
VS-10CTQ150SPbF
VS-10CTQ150-1PbF
• 175 °C TJ operation
• Center tap configuration
• Low forward voltage drop
• High frequency operation
• High purity, high temperature epoxy
encapsulation for enhanced mechanical
strength and moisture resistance
Base
common
cathode
Base
common
cathode
2
2
• Guard ring for enhanced ruggedness and long term
reliability
• Meets MSL level 1, per J-STD-020, LF maximum peak
of 260 °C
2
2
1
1
3
3
Common
cathode
Common
cathode
• AEC-Q101 qualified
Anode
Anode
Anode
Anode
• Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
D2PAK
TO-262
DESCRIPTION
PRODUCT SUMMARY
Package
D2PAK, TO-262
2 x 5 A
This center tap Schottky rectifier has been optimized for low
reverse leakage at high temperature. The proprietary barrier
technology allows for reliable operation up to 175 °C
junction temperature. Typical applications are in switching
power supplies, converters, freewheeling diodes, and
reverse battery protection.
IF(AV)
VR
150 V
VF at IF
IRM
0.93 V
7 mA at 125 °C
175 °C
TJ max.
Diode variation
EAS
Common cathode
5 mJ
MAJOR RATINGS AND CHARACTERISTICS
SYMBOL
IF(AV)
VRRM
IFSM
CHARACTERISTICS
VALUES
10
UNITS
Rectangular waveform
A
V
150
tp = 5 μs sine
620
A
VF
5 Apk, TJ = 125 °C (per leg)
Range
0.73
V
TJ
-55 to +175
°C
VOLTAGE RATINGS
VS-10CTQ150SPbF
VS-10CTQ150-1PbF
PARAMETER
SYMBOL
UNITS
Maximum DC reverse voltage
VR
150
V
Maximum working peak reverse voltage
VRWM
ABSOLUTE MAXIMUM RATINGS
PARAMETER
SYMBOL
TEST CONDITIONS
50 % duty cycle at TC = 155 °C, rectangular waveform
VALUES
UNITS
per leg
5
Maximum average
forward current, see fig. 5
IF(AV)
A
per device
10
5 μs sine or 3 μs rect. pulse
10 ms sine or 6 ms rect. pulse
TJ = 25 °C, IAS = 1 A, L = 10 mH
Following any rated load
condition and with rated
620
Maximum peak one cycle non-repetitive
IFSM
A
surge current per leg, see fig. 7
115
5
V
RRM applied
Non-repetitive avalanche energy per leg
Repetitive avalanche current per leg
EAS
IAR
mJ
A
Current decaying linearly to zero in 1 μs
Frequency limited by TJ maximum VA = 1.5 x VR typical
1
Revision: 20-May-14
Document Number: 94116
1
For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
VS-10CTQ150SPbF, VS-10CTQ150-1PbF
www.vishay.com
Vishay Semiconductors
ELECTRICAL SPECIFICATIONS
PARAMETER
SYMBOL
TEST CONDITIONS
VALUES
0.93
1.10
0.73
0.86
0.05
7
UNITS
5 A
TJ = 25 °C
10 A
Maximum forward voltage drop per leg
See fig. 1
(1)
VFM
V
5 A
TJ = 125 °C
10 A
TJ = 25 °C
TJ = 125 °C
Maximum reverse leakage current per leg
See fig. 2
(1)
IRM
VR = Rated VR
mA
Threshold voltage
VF(TO)
rt
0.468
28
V
TJ = TJ maximum
Forward slope resistance
m
pF
Maximum junction capacitance per leg
Typical series inductance per leg
Maximum voltage rate of change
CT
VR = 5 VDC (test signal range 100 kHz to 1 MHz), 25 °C
Measured lead to lead 5 mm from package body
Rated VR
200
LS
8.0
nH
dV/dt
10 000
V/μs
Note
(1)
Pulse width < 300 μs, duty cycle < 2 %
THERMAL - MECHANICAL SPECIFICATIONS
PARAMETER
SYMBOL
TEST CONDITIONS
VALUES
UNITS
Maximum junction and storage
temperature range
TJ, TStg
-55 to +175
°C
Maximum thermal resistance,
3.50
1.75
0.50
junction to case per leg
RthJC
DC operation
Maximum thermal resistance,
junction to case per package
°C/W
Typical thermal resistance,
case to heatsink (only for TO-220)
RthCS
Mounting surface, smooth and greased
2
g
Approximate weight
0.07
oz.
minimum
maximum
6 (5)
kgf · cm
(lbf · in)
Mounting torque
Marking device
12 (10)
Case style D2PAK
Case style TO-262
10CTQ150S
10CTQ150-1
100
10
1
100
10
1
TJ = 175 °C
TJ = 150 °C
TJ = 125 °C
TJ = 100 °C
TJ = 175 °C
TJ = 125 °C
TJ = 25 °C
0.1
0.01
0.001
TJ = 75 °C
TJ = 50 °C
TJ = 25 °C
0.0001
0
0.5
1.0
1.5
2.0
2.5
3.0
0
25
50
75
100
125
150
VR - Reverse Voltage (V)
VFM - Forward Voltage Drop (V)
Fig. 1 - Maximum Forward Voltage Drop Characteristics
(Per Leg)
Fig. 2 - Typical Values of Reverse Current vs. Reverse Voltage
(Per Leg)
Revision: 20-May-14
Document Number: 94116
2
For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
VS-10CTQ150SPbF, VS-10CTQ150-1PbF
www.vishay.com
Vishay Semiconductors
1000
100
10
TJ = 25 °C
20
40
60
80 100 120 140 160
VR - Reverse Voltage (V)
Fig. 3 - Typical Junction Capacitance vs. Reverse Voltage (Per Leg)
10
1
D = 0.75
D = 0.50
D = 0.33
D = 0.25
D = 0.20
PDM
0.1
0.01
t1
t2
Notes:
1. Duty factor D = t1/t2
2. Peak TJ = PDM x ZthJC + TC
Single pulse
(thermal resistance)
0.001
0.00001
0.0001
0.001
0.01
0.1
1
10
100
t1 - Rectangular Pulse Duration (s)
Fig. 4 - Maximum Thermal Impedance ZthJC Characteristics (Per Leg)
180
170
160
150
140
130
120
5
D = 0.20
D = 0.25
D = 0.33
D = 0.50
D = 0.75
DC
4
3
2
1
0
RMS limit
Square wave (D = 0.50)
80 % rated VR applied
DC
See note (1)
2
0
4
6
8
0
1
2
3
4
5
6
7
8
IF(AV) - Average Forward Current (A)
IF(AV) - Average Forward Current (A)
Fig. 6 - Forward Power Loss Characteristics (Per Leg)
Fig. 5 - Maximum Allowable Case Temperature vs.
Average Forward Current (Per Leg)
Revision: 20-May-14
Document Number: 94116
3
For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
VS-10CTQ150SPbF, VS-10CTQ150-1PbF
www.vishay.com
Vishay Semiconductors
1000
At any rated load condition and
with rated VRRM applied
following surge
100
10
100
1000
10 000
tp - Square Wave Pulse Duration (µs)
Fig. 7 - Maximum Non-Repetitive Surge Current (Per Leg)
L
High-speed
switch
IRFP460
D.U.T.
Freewheel
diode
Rg = 25 Ω
Vd = 25 V
+
Current
monitor
40HFL40S02
Fig. 8 - Unclamped Inductive Test Circuit
Note
(1)
Formula used: TC = TJ - (Pd + PdREV) x RthJC;
Pd = Forward power loss = IF(AV) x VFM at (IF(AV)/D) (see fig. 6);
PdREV = Inverse power loss = VR1 x IR (1 - D); IR at VR1 = 10 V
Revision: 20-May-14
Document Number: 94116
4
For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
VS-10CTQ150SPbF, VS-10CTQ150-1PbF
www.vishay.com
Vishay Semiconductors
ORDERING INFORMATION TABLE
Device code
VS-
10
C
T
Q
150
S
TRL PbF
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
-
-
-
-
-
-
-
Vishay Semiconductors product
Current rating (10 A)
Circuit configuration: C = common cathode
T = TO-220
Schottky “Q” series
Voltage rating (150 = 150 V)
S = D2PAK
-1 = TO-262
8
9
-
-
None = tube (50 pieces)
TRL = tape and reel (left oriented - for D2PAK only)
TRR = tape and reel (right oriented - for D2PAK only)
PbF = lead (Pb)-free
LINKS TO RELATED DOCUMENTS
www.vishay.com/doc?95014
www.vishay.com/doc?95008
www.vishay.com/doc?95032
Dimensions
Part marking information
Packaging information
Revision: 20-May-14
Document Number: 94116
5
For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Outline Dimensions
Vishay Semiconductors
D2PAK, TO-262
DIMENSIONS - D2PAK in millimeters and inches
Conforms to JEDEC outline D2PAK (SMD-220)
B
A
Pad layout
A
(2)(3)
E
A
(E)
c2
110ꢀꢀ
MIN0
(ꢀ0ꢁ3)
(3)
D
L1
ꢁ
2
9065
MIN0
(ꢀ038)
(D1) (3)
Detail A
1709ꢀ (ꢀ07ꢀ)
150ꢀꢀ (ꢀ0625)
H
(2)
1
3
3081
MIN0
L2
(ꢀ015)
B
B
2032
MIN0
(ꢀ0ꢀ8)
A
B
206ꢁ (ꢀ01ꢀ3)
20ꢁ1 (ꢀ0ꢀ96)
(3)
E1
2 x b2
2 x b
C
c
View A - A
ꢀ0ꢀꢀꢁ M
Base
Metal
ꢀ0ꢀ1ꢀ M
M
B
A
Plating
(ꢁ)
b1, b3
2 x
e
H
Gauge
plane
(ꢁ)
c1
(c)
B
ꢀ° to 8°
L3
Seating
plane
Lead assignments
A1
Lead tip
(b, b2)
L
Diodes
Lꢁ
Detail “A”
Rotated 9ꢀ °CW
Scale: 8:1
Section B - B and C - C
Scale: None
10 - Anode (two die)/open (one die)
20, ꢁ0 - Cathode
30 - Anode
MILLIMETERS
SYMBOL
INCHES
MILLIMETERS
INCHES
NOTES
SYMBOL
NOTES
MIN.
4.06
0.00
0.51
0.51
1.14
1.14
0.38
0.38
1.14
8.51
MAX.
4.83
0.254
0.99
0.89
1.78
1.73
0.74
0.58
1.65
9.65
MIN.
0.160
0.000
0.020
0.020
0.045
0.045
0.015
0.015
0.045
0.335
MAX.
0.190
0.010
0.039
0.035
0.070
0.068
0.029
0.023
0.065
0.380
MIN.
6.86
9.65
7.90
MAX.
8.00
MIN.
MAX.
0.315
0.420
0.346
A
A1
b
D1
E
0.270
0.380
0.311
3
2, 3
3
10.67
8.80
E1
e
b1
b2
b3
c
4
4
4
2
2.54 BSC
0.100 BSC
H
14.61
1.78
-
15.88
2.79
1.65
1.78
0.575
0.070
-
0.625
0.110
0.066
0.070
L
L1
L2
L3
L4
3
c1
c2
D
1.27
0.050
0.25 BSC
0.010 BSC
4.78
5.28
0.188
0.208
Notes
(1)
(7)
Dimensioning and tolerancing per ASME Y14.5 M-1994
Dimension D and E do not include mold flash. Mold flash shall
not exceed 0.127 mm (0.005") per side. These dimensions are
measured at the outmost extremes of the plastic body
Thermal pad contour optional within dimension E, L1, D1 and E1
Dimension b1 and c1 apply to base metal only
Outline conforms to JEDEC outline TO-263AB
(2)
(3)
(4)
(5)
(6)
Datum A and B to be determined at datum plane H
Controlling dimension: inch
Document Number: 95014
Revision: 31-Mar-09
For technical questions within your region, please contact one of the following:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
www.vishay.com
1
Outline Dimensions
Vishay Semiconductors
D2PAK, TO-262
DIMENSIONS - TO-262 in millimeters and inches
Modified JEDEC outline TO-262
(2) (3)
E
A
(Datum A)
B
A
c2
E
A
(3)
L1
D
Seating
plane
D1(3)
1
2
3
C
C
L2
B
B
L (2)
A
c
(3)
E1
3 x b2
3 x b
A1
Section A - A
2 x e
Base
metal
(ꢁ)
b1, b3
Plating
c
M
M
B
ꢀ0ꢀ1ꢀ
A
Lead assignments
c1
(ꢁ)
Diodes
10 - Anode (two die)/open (one die)
20, ꢁ0 - Cathode
30 - Anode
(b, b2)
Lead tip
Section B - B and C - C
Scale: None
MILLIMETERS
INCHES
SYMBOL
NOTES
MIN.
4.06
2.03
0.51
0.51
1.14
1.14
0.38
0.38
1.14
8.51
6.86
9.65
7.90
MAX.
4.83
3.02
0.99
0.89
1.78
1.73
0.74
0.58
1.65
9.65
8.00
10.67
8.80
MIN.
0.160
0.080
0.020
0.020
0.045
0.045
0.015
0.015
0.045
0.335
0.270
0.380
0.311
MAX.
0.190
0.119
0.039
0.035
0.070
0.068
0.029
0.023
0.065
0.380
0.315
0.420
0.346
A
A1
b
b1
b2
b3
c
4
4
4
c1
c2
D
2
3
D1
E
2, 3
3
E1
e
2.54 BSC
0.100 BSC
L
13.46
-
14.10
1.65
3.71
0.530
-
0.555
0.065
0.146
L1
L2
3
3.56
0.140
Notes
(1)
(6)
Dimensioning and tolerancing as per ASME Y14.5M-1994
Dimension D and E do not include mold flash. Mold flash shall
not exceed 0.127 mm (0.005") per side. These dimensions are
measured at the outmost extremes of the plastic body
Thermal pad contour optional within dimension E, L1, D1 and E1
Dimension b1 and c1 apply to base metal only
Outline conform to JEDEC TO-262 except A1 (maximum), b
(minimum) and D1 (minimum) where dimensions derived the
actual package outline
(2)
(3)
(4)
(5)
Controlling dimension: inches
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2
For technical questions within your region, please contact one of the following:
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Document Number: 95014
Revision: 31-Mar-09
Legal Disclaimer Notice
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Disclaimer
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RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.
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“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other
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Parameters provided in datasheets and / or specifications may vary in different applications and performance may vary over
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including but not limited to the warranty expressed therein.
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© 2017 VISHAY INTERTECHNOLOGY, INC. ALL RIGHTS RESERVED
Revision: 08-Feb-17
Document Number: 91000
1
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