VS-MURB1520TRRPBF [VISHAY]
Rectifier Diode, 1 Phase, 1 Element, 15A, 200V V(RRM), Silicon, D2PAK-3;
| 型号： | VS-MURB1520TRRPBF |
| 厂家： | 
VISHAY |
| 描述： | Rectifier Diode, 1 Phase, 1 Element, 15A, 200V V(RRM), Silicon, D2PAK-3 快速恢复大电源 超快恢复二极管 快速恢复二极管 超快恢复大功率电源 高功率电源 |
| 文件： | 总13页 (文件大小：299K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
VS-MURB1520-M3, VS-MURB1520-1-M3
www.vishay.com
Vishay Semiconductors
Ultrafast Rectifier, 15 A FRED Pt®
FEATURES
• Ultrafast recovery time
• Low forward voltage drop
• Low leakage current
2
• 175 °C operating junction temperature
3
3
1
2
• Meets MSL level 1, per J-STD-020,
LF maximum peak of 245 °C
1
D2PAK (TO-263AB)
TO-262AA
Base
cathode
• Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
2
2
DESCRIPTION / APPLICATIONS
MUR.. series are the state of the art ultrafast recovery
rectifiers specifically designed with optimized performance
of forward voltage drop and ultrafast recovery time.
The planar structure and the platinum doped life time
control, guarantee the best overall performance,
ruggedness and reliability characteristics.
1
3
1
3
N/C
Anode
N/C
Anode
VS-MURB1520-1-M3
VS-MURB1520-M3
These devices are intended for use in the output rectification
stage of SMPS, UPS, DC/DC converters as well as
freewheeling diode in low voltage inverters and chopper
motor drives.
Their extremely optimized stored charge and low recovery
current minimize the switching losses and reduce over
dissipation in the switching element and snubbers.
PRIMARY CHARACTERISTICS
IF(AV)
15 A
200 V
0.85 V
35 ns
VR
VF at IF
trr
TJ max.
175 °C
Package
D2PAK (TO-263AB), TO-262AA
Circuit configuration
Single
ABSOLUTE MAXIMUM RATINGS
PARAMETER
SYMBOL
VRRM
IF(AV)
TEST CONDITIONS
MAX.
200
UNITS
Peak repetitive reverse voltage
Average rectified forward current
Non-repetitive peak surge current
Peak repetitive forward current
Operating junction and storage temperatures
V
Total device, rated VR, TC = 150 °C
Rated VR, square wave, 20 kHz, TC = 150 °C
15
IFSM
200
A
IFM
30
TJ, TStg
-65 to +175
°C
ELECTRICAL SPECIFICATIONS (TJ = 25 °C unless otherwise specified)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNITS
Breakdown voltage,
blocking voltage
VBR
VR
,
IR = 100 μA
IF = 15 A
200
-
-
V
-
-
-
-
-
-
-
-
1.05
0.85
10
Forward voltage
VF
IR
IF = 15 A, TJ = 150 °C
VR = VR rated
-
Reverse leakage current
μA
TJ = 150 °C, VR = VR rated
VR = 200 V
-
500
-
Junction capacitance
Series inductance
CT
LS
55
8.0
pF
nH
Measured lead to lead 5 mm from package body
-
Revision: 25-Oct-17
Document Number: 96316
1
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ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
VS-MURB1520-M3, VS-MURB1520-1-M3
www.vishay.com
Vishay Semiconductors
DYNAMIC RECOVERY CHARACTERISTICS (TJ = 25 °C unless otherwise specified)
PARAMETER
SYMBOL
TEST CONDITIONS
IF = 1.0 A, dIF/dt = 50 A/μs, VR = 30 V
TJ = 25 °C
MIN.
TYP.
MAX.
UNITS
-
-
-
-
-
-
-
-
35
-
Reverse recovery time
trr
22
ns
TJ = 125 °C
39
-
IF = 15 A
dIF/dt = 200 A/μs
TJ = 25 °C
1.6
4.1
19
-
Peak recovery current
IRRM
Qrr
A
TJ = 125 °C
-
V
R = 160 V
TJ = 25 °C
-
Reverse recovery charge
nC
TJ = 125 °C
90
-
THERMAL - MECHANICAL SPECIFICATIONS
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNITS
Maximum junction and
storage temperature range
TJ, TStg
-65
-
175
°C
Thermal resistance,
RthJC
RthJA
RthCS
-
-
-
-
-
1.5
50
-
junction-to-case
Thermal resistance,
junction-to-ambient
°C/W
Thermal resistance,
case-to-heatsink
Mounting surface, flat, smooth, and
greased
0.5
-
-
2.0
-
-
g
Weight
0.07
oz.
6.0
(5.0)
12
(10)
kgf · cm
(lbf · in)
Mounting torque
Marking device
-
Case style D2PAK (TO-263AB)
Case style TO-262
MURB1520
MURB1520-1
100
10
1
1000
100
10
TJ = 175 °C
TJ = 150 °C
TJ = 125 °C
TJ = 100 °C
TJ = 175 °C
TJ = 150 °C
TJ = 25 °C
1
0.1
TJ = 25 °C
0.1
0.01
0
50
100
150
200
250
0
0.3
0.6
0.9
1.2
1.5
VR - Reverse Voltage (V)
Fig. 2 - Typical Values of Reverse Current vs. Reverse Voltage
VF - Forward Voltage Drop (V)
Fig. 1 - Typical Forward Voltage Drop Characteristics
Revision: 25-Oct-17
Document Number: 96316
2
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ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
VS-MURB1520-M3, VS-MURB1520-1-M3
www.vishay.com
Vishay Semiconductors
1000
100
10
TJ = 25 °C
1
10
100
1000
VR - Reverse Voltage (V)
Fig. 3 - Typical Junction Capacitance vs. Reverse Voltage
10
1
0.1
PDM
t1
D = 0.50
D = 0.20
D = 0.10
D = 0.05
D = 0.02
D = 0.01
t2
Notes:
1. Duty factor D = t1/t2
2. Peak TJ = PDM x ZthJC + TC
.
Single pulse
(thermal resistance)
.
0.01
0.00001
0.0001
0.001
0.01
0.1
1
t1 - Rectangular Pulse Duration (s)
Fig. 4 - Maximum Thermal Impedance ZthJC Characteristics
180
170
160
150
140
130
25
20
15
10
RMS limit
DC
D = 0.01
D = 0.02
D = 0.05
D = 0.10
D = 0.20
D = 0.50
Square wave (D = 0.50)
Rated VR applied
5
DC
See note (1)
0
0
5
10
15
20
25
0
5
10
15
20
25
IF(AV) - Average Forward Current (A)
Fig. 6 - Forward Power Loss Characteristics
IF(AV) - Average Forward Current (A)
Fig. 5 - Maximum Allowable Case Temperature vs.
Average Forward Current
Revision: 25-Oct-17
Document Number: 96316
3
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
VS-MURB1520-M3, VS-MURB1520-1-M3
www.vishay.com
Vishay Semiconductors
60
50
40
30
20
10
200
VR = 160 V
TJ = 125 °C
TJ = 25 °C
VR = 160 V
TJ = 125 °C
TJ = 25 °C
160
120
80
40
0
IF = 30 A
IF = 15 A
IF = 8 A
IF = 30 A
IF = 15 A
IF = 8 A
100
1000
100
1000
dIF/dt (A/µs)
dIF/dt (A/µs)
Fig. 7 - Typical Reverse Recovery Time vs. dIF/dt
Fig. 8 - Typical Stored Charge vs. dIF/dt
Note
(1)
Formula used: TC = TJ - (Pd + PdREV) x RthJC;
Pd = forward power loss = IF(AV) x VFM at (IF(AV)/D) (see fig. 6);
PdREV = inverse power loss = VR1 x IR (1 - D); IR at VR1 = rated VR
(3)
trr
IF
ta
tb
0
(4)
Qrr
(2)
IRRM
0.5 IRRM
(5)
di(rec)M/dt
0.75 IRRM
diF/dt
(1)
(4) Qrr - area under curve defined by trr
(1) diF/dt - rate of change of current
and IRRM
through zero crossing
trr x IRRM
(2) IRRM - peak reverse recovery current
Qrr
=
2
(3) trr - reverse recovery time measured
from zero crossing point of negative
going IF to point where a line passing
through 0.75 IRRM and 0.50 IRRM
extrapolated to zero current.
(5) di(rec)M/dt - peak rate of change of
current during tb portion of trr
Fig. 9 - Reverse Recovery Waveform and Definitions
Revision: 25-Oct-17
Document Number: 96316
4
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
VS-MURB1520-M3, VS-MURB1520-1-M3
www.vishay.com
Vishay Semiconductors
ORDERING INFORMATION TABLE
Device code
VS- MUR
B
15
20
-1 TRL -M3
1
2
3
4
5
6
7
8
1
2
3
4
5
6
-
-
-
-
-
-
Vishay Semiconductors product
Ultrafast MUR series
B = D2PAK (TO-263AB) / TO-262AA
Current rating (15 = 15 A)
Voltage rating (20 = 200 V)
None = D2PAK (TO-263AB)
-1 = TO-262AA
-
-
7
8
None = tube (50 pieces)
TRL = tape and reel (left oriented, for D2PAK (TO-263AB) package)
TRR = tape and reel (right oriented, for D2PAK (TO-263AB) package)
Environmental digit:
-M3 = halogen-free, RoHS-compliant, and terminations lead (Pb)-free
ORDERING INFORMATION (Example)
PREFERRED P/N
QUANTITY PER T/R
MINIMUM ORDER QUANTITY
PACKAGING DESCRIPTION
Antistatic plastic tube
13" diameter reel
VS-MURB1520-M3
VS-MURB1520TRR-M3
VS-MURB1520TRL-M3
VS-MURB1520-1-M3
50
800
800
50
1000
800
800
13" diameter reel
1000
Antistatic plastic tube
LINKS TO RELATED DOCUMENTS
D2PAK (TO-263AB)
www.vishay.com/doc?96164
Dimensions
TO-262AA
www.vishay.com/doc?96165
www.vishay.com/doc?95444
www.vishay.com/doc?95443
www.vishay.com/doc?96424
www.vishay.com/doc?95271
D2PAK (TO-263AB)
TO-262AA
Part marking information
Packaging information
SPICE model
Revision: 25-Oct-17
Document Number: 96316
5
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Part Marking Information
www.vishay.com
Vishay Semiconductors
TO-262
Example: This is a xxxxxxx-1 (1) with
assembly lot code AC,
Part number
xxxxxxx-1 (1)
assembled on WW 19, 2001
in the assembly line ”X”
V
ZYWWX
C
A
Product version (optional):
Z (replaced according below table)
Date code:
Assembly
lot code
Year 1 = 2001
Week 19
Line X
Note
(1)
If part number contain “H” as last digit, product is AEC-Q101 qualified
ENVIRONMENTAL NAMING CODE (Z)
PRODUCT DEFINITION
Termination lead (Pb)-free
A
B
E
F
Totally lead (Pb)-free
RoHS-compliant and termination lead (Pb)-free
RoHS-compliant and totally lead (Pb)-free
M
N
G
Halogen-free, RoHS-compliant and termination lead (Pb)-free
Halogen-free, RoHS-compliant and totally lead (Pb)-free
Green
Revision: 21-Jun-17
Document Number: 95443
1
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Part Marking Information
www.vishay.com
Vishay Semiconductors
D2PAK
Example: This is a xxxxxx (1) with
assembly lot code AC,
Part number
xxxxxx (1)
assembled on WW 02, 2010
V
ZYWWX
C
Product version (optional):
Z (replaced according below table)
Date code:
A
Assembly
lot code
Year 0 = 2010
Week 02
Line X
Note
(1)
If part number contain “H” as last digit, product is AEC-Q101 qualified
ENVIRONMENTAL NAMING CODE (Z)
PRODUCT DEFINITION
Termination lead (Pb)-free
A
B
E
F
Totally lead (Pb)-free
RoHS-compliant and termination lead (Pb)-free
RoHS-compliant and totally lead (Pb)-free
M
N
G
Halogen-free, RoHS-compliant, and termination lead (Pb)-free
Halogen-free, RoHS-compliant, and totally lead (Pb)-free
Green
Revision: 21-Jun-17
Document Number: 95444
1
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Outline Dimensions
Vishay Semiconductors
www.vishay.com
D2PAK
DIMENSIONS in millimeters and inches
Conforms to JEDEC® outline D2PAK (SMD-220)
B
A
Pad layout
A
(E)
(2)(3)
E
A
c2
11.00
MIN.
(0.43)
(3)
D
L1
4
2
9.65
MIN.
(0.38)
(D1) (3)
Detail A
17.90 (0.70)
15.00 (0.625)
H
(2)
1
3
3.81
MIN.
L2
(0.15)
B
B
2.32
MIN.
(0.08)
A
B
2.64 (0.103)
2.41 (0.096)
2 x b2
2 x b
C
(3)
E1
c
View A - A
0.004 M
0.010 M
M
B
A
2 x e
Base
Metal
Plating
(4)
b1, b3
H
Gauge
plane
(4)
c1
(c)
B
0° to 8°
L
Seating
plane
L3
A1
(b, b2)
Lead tip
L4
Detail “A”
Section B - B and C - C
Scale: None
Rotated 90 °CW
Scale: 8:1
MILLIMETERS
INCHES
MILLIMETERS
INCHES
SYMBOL
NOTES
SYMBOL
NOTES
MIN.
4.06
0.00
0.51
0.51
1.14
1.14
0.38
0.38
1.14
8.51
MAX.
4.83
0.254
0.99
0.89
1.78
1.73
0.74
0.58
1.65
9.65
MIN.
0.160
0.000
0.020
0.020
0.045
0.045
0.015
0.015
0.045
0.335
MAX.
0.190
0.010
0.039
0.035
0.070
0.068
0.029
0.023
0.065
0.380
MIN.
6.86
9.65
7.90
MAX.
8.00
MIN.
MAX.
0.315
0.420
0.346
A
A1
b
D1
E
0.270
0.380
0.311
3
2, 3
3
10.67
8.80
E1
e
b1
b2
b3
c
4
4
4
2
2.54 BSC
0.100 BSC
H
14.61
1.78
-
15.88
2.79
1.65
1.78
0.575
0.070
-
0.625
0.110
0.066
0.070
L
L1
L2
L3
L4
3
c1
c2
D
1.27
0.050
0.25 BSC
0.010 BSC
4.78
5.28
0.188
0.208
Notes
(1)
Dimensioning and tolerancing per ASME Y14.5 M-1994
Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at
the outmost extremes of the plastic body
(2)
(3)
(4)
(5)
(6)
(7)
Thermal pad contour optional within dimension E, L1, D1 and E1
Dimension b1 and c1 apply to base metal only
Datum A and B to be determined at datum plane H
Controlling dimension: inches
Outline conforms to JEDEC® outline TO-263AB
Revision: 13-Jul-17
Document Number: 96164
1
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Outline Dimensions
Vishay Semiconductors
www.vishay.com
TO-262AA
DIMENSIONS in millimeters and inches
Modified JEDEC® outline TO-262
(2) (3)
E
A
B
(Datum A)
c2
E
A
A
(3)
L1
D
Seating
plane
D1 (3)
1
2
3
C
C
L2
B
B
L (2)
A
c
(3)
E1
3 x b2
3 x b
A1
Section A - A
2 x e
Base
metal
(4)
b1, b3
Plating
c
M
M
B
0.010
A
Lead assignments
c1
(4)
Diodes
1. - Anode (two die)/open (one die)
2., 4. - Cathode
3. - Anode
(b, b2)
Lead tip
Section B - B and C - C
Scale: None
MILLIMETERS
INCHES
SYMBOL
NOTES
MIN.
4.06
2.03
0.51
0.51
1.14
1.14
0.38
0.38
1.14
8.51
6.86
9.65
7.90
MAX.
4.83
3.02
0.99
0.89
1.78
1.73
0.74
0.58
1.65
9.65
8.00
10.67
8.80
MIN.
0.160
0.080
0.020
0.020
0.045
0.045
0.015
0.015
0.045
0.335
0.270
0.380
0.311
MAX.
0.190
0.119
0.039
0.035
0.070
0.068
0.029
0.023
0.065
0.380
0.315
0.420
0.346
A
A1
b
b1
b2
b3
c
4
4
4
c1
c2
D
2
3
D1
E
2, 3
3
E1
e
2.54 BSC
0.100 BSC
L
13.46
-
14.10
1.65
3.71
0.530
-
0.555
0.065
0.146
L1
L2
3
3.56
0.140
Notes
(1)
Dimensioning and tolerancing as per ASME Y14.5M-1994
(2)
Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at
the outmost extremes of the plastic body
(3)
(4)
(5)
(6)
Thermal pad contour optional within dimension E, L1, D1 and E1
Dimension b1 and c1 apply to base metal only
Controlling dimension: inches
Outline conform to JEDEC® TO-262 except A1 (max.), b (min., max.), b1 (min.), b2 (max.), c (min.), c1(min.), c2 (max.), D (min.), E (max.),
L1 (max.), L2 (min., max.)
Revision: 30-Nov-17
Document Number: 96165
1
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ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Packaging Information
www.vishay.com
Vishay Semiconductors
D2PAK (TO-263AB)
CARRIER TAPE FOR TAPE AND REEL LEFT in millimeters
16 0.1
5.25 0.2
0.40 0.1
4
0.1
Ø 1.55 0.05
2
0.1
B
Section B-B
A
A
+0.25
-0.1
B
Cover tape (1)
Ø 1.5
+0.2
-0.05
Ø 4.9
5
0.2
+0.2
-0.1
Ø 10.8
Section A-A
Note
(1)
For dimensions, see next pages
CARRIER TAPE FOR TAPE AND REEL RIGHT in millimeters
16 0.1
+0.2
-0.05
Ø 4.9
4
0.1
Ø 1.55 0.05
2
0.1
0.40 0.1
B
Section B-B
A
A
+0.25
-0.1
Cover tape (1)
B
Ø 1.5
5.25 0.2
5
0.2
+0.2
-0.1
Ø 10.8
Section A-A
Note
(1)
For dimensions, see next pages
Revision: 13-Oct-17
Document Number: 96424
1
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ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Packaging Information
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Vishay Semiconductors
REEL FOR CARRIER TAPE in millimeters
29
1
24.4 0.3
2.3 0.2
Ø 13.2 0.2
Ø 21 0.4
6.2 0.2
CARRIER TAPE AND REEL PACKAGING D2PAK (TO-263AB)
Top Cover Tape
Embossed Carrier
Tape
Component
Cavity
Revision: 13-Oct-17
Document Number: 96424
2
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Packaging Information
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Vishay Semiconductors
COVER TAPE FOR CARRIER TAPE in millimeters
Top view:
W
Section view:
T
Y
Y
Section Y - Y
COVER TAPE WIDTH COVER TAPE THICKNESS
APPLICATION
CARRIER TAPE WIDTH
24
MATERIAL
W
T
D2PAK
(TO-263AB)
21.3 0.1
0.060 0.01
Antistatic/treated/transparent/polyester
Revision: 13-Oct-17
Document Number: 96424
3
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Revision: 08-Feb-17
Document Number: 91000
1
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