EDI8F32256C20MZC [WEDC]

SRAM Module, 256KX32, 20ns, CMOS, ZIP-64;
EDI8F32256C20MZC
型号: EDI8F32256C20MZC
厂家: WHITE ELECTRONIC DESIGNS CORPORATION    WHITE ELECTRONIC DESIGNS CORPORATION
描述:

SRAM Module, 256KX32, 20ns, CMOS, ZIP-64

静态存储器 内存集成电路
文件: 总7页 (文件大小:365K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
EDI8F32256C  
White Electronic Designs  
256Kx32 Static RAM CMOS, High Speed Module  
FEATURES  
DESCRIPTION  
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256Kx32 bit CMOS Static  
The EDI8F32256C is a high speed 8Mb Static RAM  
module organized as 256K words by 32 bits. This module is  
constructed from eight 256Kx4 Static RAMs in SOJ packages  
on an epoxy laminate (FR4) board.  
Random Access Memory  
Access Times: 12, 15, 20, and 25ns  
Individual Byte Selects  
Four chip enables (E0#-E3#) are used to independently  
enable the four bytes. Reading or writing can be executed on  
individual bytes or any combination of multiple bytes through  
proper use of selects.  
Fully Static, No Clocks  
TTL Compatible I/O  
High Density Package with JEDEC Standard Pinouts  
64 Pin ZIP, No. 85  
The EDI8F32256C is offered in 64 pin ZIP/SIMM package  
which enables eight megabits of memory to be placed in less  
than 1.4 square inches of board space.  
64 Lead Angled SIMM, No. 32  
64 Lead SIMM, No. 333  
All inputs and outputs are TTL compatible and operate from  
a single 5V supply. Fully asynchronous circuitry requires no  
clocks or refreshing for operation and provides equal access  
and cycle times for ease of use.  
Common Data Inputs and Outputs  
Single +5V (±10%) Supply Operation  
The ZIP and SIMM modules contain two pins, PD1 and  
PD2, which are used to identify module memory density in  
applications where alternate modules can be interchanged.  
PIN CONFIGURATIONS AND BLOCK DIAGRAM  
FIG. 1  
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ꢀꢃꢁ  
ꢀꢃꢂ  
ꢀꢃꢇ  
ꢀꢃꢈ  
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PIN NAMES  
ꢀꢃꢄ  
ꢀꢃꢅ  
ꢀꢃꢂꢁ  
A0-A17  
E0#-E3#  
W#  
Address Inputs  
Chip Enables  
ꢂꢁ  
ꢂꢇ  
ꢂꢉ  
ꢂꢂ ꢀꢃꢂꢂ  
ꢂꢈ ꢆꢁ  
ꢆꢂ  
ꢆꢂ  
ꢂꢅ ꢀꢃꢂꢇ  
ꢇꢂ ꢀꢃꢂꢈ  
ꢕꢕ  
ꢆꢌ  
Write Enables  
ꢂꢊ  
ꢂꢌ  
ꢆꢄ ꢂꢋ  
ꢆꢅ ꢂꢄ  
ꢇꢁ  
ꢀꢃꢊ ꢇꢇ  
ꢀꢃꢋ  
ꢀꢃꢌ  
ꢍꢎ ꢇꢄ  
G#  
Output Enable  
DQ0-DQ31  
VCC  
Common Data Input/Output  
Power (+5V ±10%)  
Ground  
ꢀꢃꢉ  
ꢇꢈ  
ꢇꢊ  
ꢇꢌ  
ꢇꢅ  
ꢈꢂ  
ꢀꢃꢂꢉ  
ꢀꢃꢂꢊ  
ꢇꢉ  
ꢇꢋ  
VSS  
ꢔꢔ  
ꢆꢂꢊ  
ꢏꢂꢎ  
ꢆꢂꢉ  
ꢏꢁꢎ  
ꢈꢁ  
ꢈꢇ  
�ꢀꢁ�ꢂꢃ  
ꢄꢅ  
ꢆꢅ  
ꢈꢈ ꢏꢈꢎ  
ꢈꢉ  
ꢈꢋ  
ꢈꢄ  
ꢉꢁ  
ꢉꢇ  
ꢉꢉ  
ꢉꢋ  
ꢏꢇꢎ  
ꢆꢂꢋ  
ꢆꢂꢌ  
ꢈꢊ  
ꢈꢌ  
ꢈꢅ  
ꢉꢂ  
ꢉꢈ  
ꢉꢊ  
ꢉꢌ  
ꢈꢊꢋꢌ  
ꢍꢎꢏ  
ꢈꢊꢋꢌ  
ꢐꢑꢏꢁꢐꢑꢃ  
ꢐꢑꢀꢁꢐꢑꢉ  
ꢐꢎ  
ꢍꢎꢏ  
ꢔꢔ  
ꢀꢃꢇꢉ  
ꢀꢃꢇꢊ  
ꢀꢃꢇꢋ  
ꢀꢃꢇꢌ  
ꢆꢈ  
ꢀꢃꢂꢋ  
ꢀꢃꢂꢌ  
ꢀꢃꢂꢄ  
ꢀꢃꢂꢅ  
ꢇꢀꢅ  
ꢇꢂꢅ  
ꢇꢈꢅ  
ꢇꢉꢅ  
ꢈꢊꢋꢌ  
ꢍꢎꢏ  
ꢈꢊꢋꢌ  
ꢐꢑꢂꢈꢁꢐꢑꢂꢊ  
ꢐꢑꢈꢀꢁꢐꢑꢈꢉ  
ꢐꢑꢈꢒꢁꢐꢑꢉꢂ  
ꢐꢑꢒꢁꢐꢑꢂꢂ  
ꢍꢎꢏ  
ꢆꢂꢁ ꢉꢄ  
ꢆꢂꢂ ꢊꢁ  
ꢉꢅ ꢆꢉ  
ꢆꢊ  
ꢊꢂ  
ꢊꢈ  
ꢊꢊ  
ꢊꢌ  
ꢊꢅ  
ꢋꢂ  
ꢋꢈ  
ꢆꢂꢇ  
ꢆꢂꢈ  
ꢊꢇ  
ꢊꢉ  
ꢊꢋ  
ꢊꢄ  
ꢋꢁ  
ꢋꢇ  
ꢋꢉ  
ꢈꢊꢋꢌ  
ꢍꢎꢏ  
ꢈꢊꢋꢌ  
ꢕꢕ  
ꢐꢑꢂꢋꢁꢐꢑꢂꢓ  
ꢍꢎꢏ  
ꢆꢋ  
ꢀꢃꢇꢁ  
ꢀꢃꢇꢂ  
ꢀꢃꢇꢇ  
ꢀꢃꢇꢈ  
ꢀꢃꢇꢄ  
ꢀꢃꢇꢅ  
ꢀꢃꢈꢁ  
ꢀꢃꢈꢂ  
ꢈꢊꢋꢌ  
ꢍꢎꢏ  
ꢈꢊꢋꢌ  
ꢐꢑꢈꢏꢁꢐꢑꢈꢃ  
ꢍꢎꢏ  
ꢔꢔ  
�ꢀꢁꢑꢒꢑꢓꢔꢔ  
�ꢀꢂꢑꢒꢑꢓꢔꢔ  
White Electronic Designs Corp. reserves the right to change products or specifications without notice.  
July 2002  
Rev. 2A  
1
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com  
EDI8F32256C  
White Electronic Designs  
ABSOLUTE MAXIMUM RATINGS*  
RECOMMENDED DC OPERATING CONDITIONS  
Voltage on any pin relative to VSS  
-0.5V to 7.0V  
Parameter  
Sym  
VCC  
VSS  
VIH  
Min  
4.5  
0
Typ  
5.0  
0
Max  
5.5  
Units  
Operating Temperature tA (Ambient)  
Commercial  
Industrial  
0°C to +70°C  
-40°C to +85°C  
Supply Voltage  
Supply Voltage  
Input High Voltage  
Input Low Voltage  
V
V
V
V
0
2.2  
-0.3  
--  
VCC+0.3V  
0.8  
Storage Temperature, Plastic  
Power Dissipation  
-55°C to +125°C  
8.0 Watt  
VIL  
--  
Output Current  
20 mA  
AC TEST CONDITIONS  
*Stress greater than those listed under "Absolute Maximum Ratings"  
may cause permanent damage to the device. This is a stress rating  
only and functional operation of the device at these or any other  
conditions greater than those indicated in the operational sections of  
this specification is not implied. Exposure to absolute maximum rating  
conditions for extended periods may affect reliability.  
Input Pulse Levels  
VSS to 3.0V  
Input Rise and Fall Times  
Input and Output Timing Levels  
Output Load  
5ns  
1.5V  
1tTL, CL = 30pF  
Note: For tEHQZ,tGHQZ and tWLQZ, CL = 5pF)  
DC ELECTRICAL CHARACTERISTICS  
Max  
12-25  
800  
Units  
ns  
Parameter  
Sym  
Conditions  
Min  
Operating Power Supply Current  
Standby (tTL) Power Supply Current  
Full Standby Power Supply Current  
CMOS  
ICC1  
ICC2  
W#, E# = VIL, II/O = 0mA, Min Cycle  
E# ≥ VIH, VIN ≤ VIL or VIN ≥VIH  
E# ≥ VCC-0.2V  
mA  
240  
mA  
ICC3  
40  
mA  
VIN ≥ VCC-0.2V or VIN ≤ 0.2V  
VIN = 0V to VCC  
Input Leakage Current  
Output Leakage Current  
Output High Voltage  
ILI  
±80  
±20  
µA  
µA  
V
ILO  
V I/O = 0V to VCC  
VOH  
VOL  
IOH = -4.0mA  
2.4  
Output Low Voltage  
IOL = 8.0mA  
0.4  
V
Note: Typical: tA = 25°C, VCC = 5.0V  
TRUTH TABLE  
CAPACITANCE  
(f=1.0MHz, VIN=VCC or VSS)  
E# W# G#  
Mode  
Standby  
Output Power  
Parameter  
Sym  
Max  
60  
Unit  
pF  
H
L
L
L
X
H
L
X
L
HIGH Z  
DOUT  
ICC3  
ICC1  
ICC1  
ICC1  
Address Lines  
Data Lines  
CI  
CD/Q  
CC  
Read  
20  
20  
60  
pF  
X
H
Write  
DIN  
Chip Enable Line  
Write Control Line  
pF  
H
Output Deselect  
HIGH Z  
CN  
pF  
Note: These parameters are sampled, not 100% tested.  
White Electronic Designs Corp. reserves the right to change products or specifications without notice.  
July 2002  
Rev. 2A  
2
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com  
EDI8F32256C  
White Electronic Designs  
AC CHARACTERISTICS READ CYCLE  
Symbol  
JEDEC  
12ns  
15ns  
20ns  
Max  
25ns  
Units  
Parameter  
Alt.  
tRC  
Min  
Max  
Min Max Min  
Min  
Max  
Read Cycle Time  
tAVAV  
tAVQV  
tELQV  
tELQX  
tEHQZ  
tAVQX  
tGLQV  
tGLQX  
tGHQZ  
12  
15  
20  
25  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
Address Access Time  
tAA  
12  
12  
15  
15  
20  
20  
25  
25  
Chip Enable Access  
tACS  
tCLZ  
tCHZ  
tOH  
Chip Enable to Output in Low Z (1)  
Chip Disable to Output in High Z (1)  
Output Hold from Address Change  
Output Enable to Output Valid  
Output Enable to Output in Low Z (1)  
Output Disable to Output in High Z (1)  
Note: 1. Parameter guaranteed, but not tested.  
3
3
0
3
3
0
3
3
0
3
3
0
6
6
6
7
7
7
9
9
9
9
9
9
tOE  
tOLZ  
tOHZ  
FIG. 2  
READ CYCLE 1 - W# HIGH, G#, E# LOW  
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ꢀ�ꢉ�ꢄꢅ  
FIG. 3  
READ CYCLE 2 - W# HIGH  
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ꢊꢇꢃꢇ  
ꢅꢉ  
ꢅꢆꢃꢇ  
ꢅꢂꢃꢄ  
ꢅꢆꢃꢈ  
ꢁꢉ  
ꢁꢆꢃꢇ  
ꢁꢆꢃꢈ  
�ꢀꢁꢂꢃꢄꢀꢀꢀ  
White Electronic Designs Corp. reserves the right to change products or specifications without notice.  
July 2002  
Rev. 2A  
3
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com  
EDI8F32256C  
White Electronic Designs  
AC CHARACTERISTICS WRITE CYCLE  
Parameter  
Symbol  
10ns  
12ns  
15ns  
20ns  
25ns  
Units  
JEDEC  
Alt.  
Min Max Min Max Min Max Min  
Max Min Max  
Write Cycle Time  
tAVAV  
tWC  
10  
12  
15  
20  
25  
ns  
Chip Enable to End of Write  
tELWH  
tWLEH  
tAVWL  
tAVEL  
tAVWH  
tAVEH  
tWLWH  
tELEH  
tWHAX  
tEHAX  
tWHDX  
tEHDX  
tCW  
tCW  
7
7
8
8
12  
12  
15  
15  
15  
15  
ns  
ns  
Address Setup Time  
Address Valid to End of Write  
Write Pulse Width  
tAS  
tAS  
0
0
0
0
0
0
0
0
0
0
ns  
ns  
tAW  
tAW  
7
7
8
8
12  
12  
15  
15  
15  
15  
ns  
ns  
tWP  
tWP  
7
7
8
8
12  
12  
15  
15  
15  
15  
ns  
ns  
Write Recovery Time  
Data Hold Time  
tWR  
tWR  
0
0
0
0
0
0
0
0
0
0
ns  
ns  
tDH  
tDH  
3
3
3
3
3
3
3
3
3
3
ns  
ns  
Write to Output in High Z (1)  
Data to Write Time  
tWLQZ  
tWHZ  
0
5
0
6
0
9
0
9
0
9
ns  
tDVWH  
tDVEH  
tDW  
tDW  
5
5
6
6
7
7
8
8
8
8
ns  
ns  
Output Active from End of Write (1)  
tWHQX  
tWLZ  
3
3
3
3
3
ns  
Note 1: Parameter guaranteed, but not tested.  
White Electronic Designs Corp. reserves the right to change products or specifications without notice.  
July 2002  
Rev. 2A  
4
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com  
EDI8F32256C  
White Electronic Designs  
FIG. 4  
WRITE CYCLE 1 - W# CONTROLLED  
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�ꢄꢅꢆ  
ꢅꢆꢁꢇ  
ꢁꢃꢅꢆ  
ꢅꢄꢅꢆ  
ꢅꢀ  
ꢁꢃꢅꢄ  
ꢌꢃꢅꢆ  
ꢅꢆꢌꢇ  
ꢌꢁꢍꢁꢊꢃꢁꢄꢈꢌ  
ꢅꢆꢎꢇ  
ꢅꢄꢎꢋ  
ꢆꢈꢉꢆꢊꢋ  
FIG. 5  
WRITE CYCLE 2 - E# CONTROLLED  
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ꢂꢃꢂꢄ  
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ꢂꢄ�ꢉ  
ꢂꢄꢌꢉ  
ꢊꢃꢂꢄ  
ꢊꢋ  
ꢌꢁꢂꢄ  
ꢌ�ꢎ�ꢇꢁ�ꢃꢅꢌ  
ꢄꢅꢆꢄꢇꢈ  
White Electronic Designs Corp. reserves the right to change products or specifications without notice.  
July 2002  
Rev. 2A  
5
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com  
EDI8F32256C  
White Electronic Designs  
ORDERING INFORMATION  
Part Number  
Speed  
(ns)  
Package  
No.  
12  
15  
20  
25  
12  
15  
20  
25  
12  
15  
20  
25  
32  
32  
EDI8F32256C12MNC  
EDI8F32256C15MNC  
EDI8F32256C20MNC  
EDI8F32256C25MNC  
EDI8F32256C12MMC  
EDI8F32256C15MMC  
EDI8F32256C20MMC  
EDI8F32256C25MMC  
EDI8F32256C12MZC  
EDI8F32256C15MZC  
EDI8F32256C20MZC  
EDI8F32256C25MZC  
32  
32  
333  
333  
333  
333  
85  
85  
85  
85  
NOTE: 1. For Gold SIMM change form EDI8F to EDI8G.  
PACKAGE DESCRIPTION  
PACKAGE NO. 32: 64 LEAD  
ANGLED SIMM  
3.855 MAX.  
3.584  
.360  
MAX.  
.680  
MAX.  
.400  
.250  
P1  
.250  
.050  
1.845  
.225  
MIN.  
.125  
MIN.  
3.350  
1.792  
R.062. (2x)  
White Electronic Designs Corp. reserves the right to change products or specifications without notice.  
July 2002  
Rev. 2A  
6
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com  
EDI8F32256C  
White Electronic Designs  
PACKAGE NO. 85: 64 PIN ZIP  
.360  
3.665 MAX.  
.050  
MAX.  
.050  
.165  
.135  
.022  
.018  
.250  
TYP.  
.050  
TYP.  
.100  
TYP.  
.175  
.125  
.100  
TYP.  
PACKAGE NO. 333: 64 LEAD SIMM  
3.855 MAX.  
3.584  
.125  
MAX.  
.615  
MAX.  
#
REV.  
.401  
0.250  
P1  
0.050 TYP.  
.062 R. (2x)  
0.250  
3.350  
.360  
MAX.  
1.845  
1.792  
ALL DIMENSIONS ARE IN INCHES  
White Electronic Designs Corp. reserves the right to change products or specifications without notice.  
July 2002  
Rev. 2A  
7
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com  

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