WS128K32-25G2LQ [WEDC]
SRAM Module, 128KX32, 25ns, CMOS, CQFP68, 22.40 MM, 5.08 MM HEIGHT, CERAMIC, QFP-68;
| 型号： | WS128K32-25G2LQ |
| 厂家： | 
WHITE ELECTRONIC DESIGNS CORPORATION |
| 描述： | SRAM Module, 128KX32, 25ns, CMOS, CQFP68, 22.40 MM, 5.08 MM HEIGHT, CERAMIC, QFP-68 静态存储器 |
| 文件： | 总9页 (文件大小：406K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
WS128K32-XXX
White Electronic Designs
128Kx32 SRAM MODULE, SMD 5962-93187 & 5962-95595
FEATURES
ꢀ
ꢀ
ꢀ
Access Times of 15, 17, 20, 25, 35, 45, 55ns
MIL-STD-883 Compliant Devices Available
Packaging
ꢀ
ꢀ
ꢀ
Low Power CMOS
TTL Compatible Inputs and Outputs
Built in Decoupling Caps and Multiple Ground Pins
for Low Noise Operation
• 66 pin, PGA Type, 1.075" square, Hermetic
Ceramic HIP (Package 400)
• 68 lead, 40mm CQFP (G4T)1, 3.56mm (0.140")
(Package 502)
ꢀ
ꢀ
Weight:
WS128K32-XG2UX - 8 grams typical
WS128K32-XG2LX - 8 grams typical
WS128K32-XH1X - 13 grams typical
WS128K32-XG4TX1 - 20 grams typical
• 68 lead, 22.4mm CQFP (G2U), 3.56mm (0.140"),
(Package 510)
Devices are upgradeable to 512Kx32
• 68 lead, 22.4mm (0.880") square, CQFP (G2L),
5.08mm (0.200") high, (Package 528)
ꢀ
ꢀ
ꢀ
Organized as 128Kx32; User Configurable as
256Kx16 or 512Kx8
This product is subject to change without notice.
Commercial, Industrial and Military Temperature
Ranges
5 Volt Power Supply
FIGURE 1 – PIN CONFIGURATION FOR WS128K32N-XH1X
Top View Pin Description
1
12
23
34
45
56
I/O0-31
A0-16
Data Inputs/Outputs
Address Inputs
Write Enables
Chip Selects
Output Enable
Power Supply
Ground
I/O8
I/O9
I/O10
A13
WE2#
CS2#
GND
I/O11
A10
I/O15
I/O24
I/O25
I/O26
A6
VCC
CS4#
WE4#
I/O27
A3
I/O31
I/O30
I/O29
I/O28
A0
WE1-4
#
I/O14
I/O13
I/O12
OE#
NC
CS1-4
OE#
VCC
#
GND
NC
Not Connected
A14
A7
A15
A11
NC
A4
A1
Block Diagram
WE#1 CS#1
WE#2 CS#2
128K x 8
WE#3 CS#3
WE#4 CS#4
128K x 8
A16
A12
WE1#
I/O7
A8
A5
A2
OE#
A0-16
NC
VCC
A9
WE3#
CS3#
GND
I/O19
I/O23
I/O22
I/O21
I/O20
128K x 8
128K x 8
I/O0
I/O1
I/O2
CS1#
NC
I/O6
I/O16
I/O17
I/O18
I/O5
8
8
8
8
I/O3
I/O4
I/O 0-7
I/O 8-15
I/O 16-23
I/O 24-31
11
22
33
44
55
66
May 2004
Rev. 15
1
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
WS128K32-XXX
White Electronic Designs
FIGURE 2 – PIN CONFIGURATION FOR WS128K32-XG4TX1
Top View Pin Description
I/O0-31
A0-16
Data Inputs/Outputs
Address Inputs
Write Enables
Chip Selects
Output Enable
Power Supply
Ground
WE1-4
#
9
8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61
CS1-4
OE#
VCC
#
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
0
1
2
3
4
5
6
7
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
I/O16
I/O17
I/O18
I/O19
I/O20
I/O21
I/O22
I/O23
GND
I/O24
I/O25
I/O26
I/O27
I/O28
I/O29
I/O30
I/O31
GND
NC
Not Connected
GND
Block Diagram
I/O
8
CS1#
CS2#
CS3#
CS4#
I/O
9
WE#
OE#
A0-16
I/O10
I/O11
I/O12
I/O13
I/O14
I/O15
128K X 8
128K X 8
128K X 8
128K X 8
2728 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
8
8
8
8
I/O0 - 7
I/O8 - 15
I/O16 - 23
I/O24 - 31
Note 1: Package Not Recommended For New Design
FIGURE 3 – PIN CONFIGURATION FOR WS128K32-XG2UX AND WS128K32-XG2LX
Top View Pin Description
I/O0-31
A0-16
Data Inputs/Outputs
Address Inputs
Write Enables
Chip Selects
Output Enable
Power Supply
Ground
WE1-4
#
9
8
7
6
5
4
3
2
1
68 67 66 65 64 63 62 61
60 I/O16
CS1-4
OE#
VCC
#
I/O0 10
I/O1 11
I/O2 12
I/O3 13
I/O4 14
I/O5 15
I/O6 16
I/O7 17
GND 18
I/O8 19
I/O9 20
I/O10 21
I/O11 22
I/O12 23
I/O13 24
I/O14 25
I/O15 26
59 I/O17
58 I/O18
57 I/O19
56 I/O20
55 I/O21
54 I/O22
53 I/O23
52 GND
51 I/O24
50 I/O25
49 I/O26
48 I/O27
47 I/O28
46 I/O29
45 I/O30
44 I/O31
GND
NC
Not Connected
Block Diagram
WE#1 CS#1
WE#2 CS#2
128K x 8
WE#3 CS#3
WE#4 CS#4
128K x 8
OE#
A0-16
128K x 8
128K x 8
2728 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
8
8
8
8
I/O 0-7
I/O 8-15
I/O 16-23
I/O 24-31
Note 1: Package Not Recommended For New Design
May 2004
Rev. 15
2
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
WS128K32-XXX
White Electronic Designs
ABSOLUTE MAXIMUM RATINGS
TRUTH TABLE
Parameter
Symbol
TA
TSTG
VG
TJ
VCC
Min
-55
-65
-0.5
Max
+125
+150
VCC+0.5
150
Unit
°C
°C
V
°C
V
CS
H
L
L
L
OE
X
L
X
H
WE
X
H
L
H
Mode
Standby
Read
Write
Out Disable
Data I/O
High Z
Data Out
Data In
High Z
Power
Standby
Active
Active
Active
Operating Temperature
Storage Temperature
Signal Voltage Relative to GND
Junction Temperature
Supply Voltage
-0.5
7.0
CAPACITANCE
TA = +25°C
RECOMMENDED OPERATING CONDITIONS
Parameter
Symbol
COE
CWE
Conditions
Max Unit
OE# capacitance
WE1-4# capacitance
HIP (PGA) H1
VIN = 0V, f = 1.0 MHz 50 pF
Parameter
Supply Voltage
Input High Voltage
Input Low Voltage
Operating Temp (Mil)
Symbol
VCC
VIH
Min
4.5
2.2
Max
5.5
VCC + 0.3
+0.8
Unit
V
V
V
°C
VIN = 0V, f = 1.0 MHz
pF
20
50
20
CQFP G4T
CQFP G2U/G2L
CS1-4# capacitance
Data# I/O capacitance
Address input capacitance
This parameter is guaranteed by design but not tested.
VIL
TA
-0.5
-55
+125
CCS
CI/O
CAD
VIN = 0V, f = 1.0 MHz 20 pF
VI/O = 0V, f = 1.0 MHz 20 pF
VIN = 0V, f = 1.0 MHz 50 pF
DC CHARACTERISTICS
VCC = 5.0V, VSS = 0V, -55°C ≤ TA ≤ +125°C
Parameter
Sym Conditions
-15
-17
-20
-25
Units
Min
Max
10
10
600
80
0.4
Min
Max
10
10
600
80
0.4
Min
Max
10
10
600
80
0.4
Min
Max
10
10
600
60
0.4
Input Leakage Current
Output Leakage Current
Operating Supply Current
Standby Current
Output Low Voltage
Output High Voltage
ILI
ILO
ICC
ISB
VOL
VOH
VCC = 5.5, VIN = GND to VCC
µA
µA
mA
mA
V
CS# = VIH, OE# = VIH, VOUT = GND to VCC
CS# = VIL, OE# = VIH, f = 5MHz, VCC = 5.5
CS# = VIH, OE# = VIH, f = 5MHz, VCC = 5.5
IOL = 8mA, VCC = 4.5
IOH = -4.0mA, VCC = 4.5
2.4
2.4
2.4
2.4
V
Parameter
Sym Conditions
-35
-45
-55
Units
Min
Max
Min
Max
10
10
600
60
0.4
Min
Max
10
10
600
60
0.4
Input Leakage Current
Output Leakage Current
Operating Supply Current
Standby Current
Output Low Voltage
Output High Voltage
ILI
ILO
ICC
ISB
VOL
VOH
VCC = 5.5, VIN = GND to VCC
10
10
µA
µA
mA
mA
V
CS# = VIH, OE# = VIH, VOUT = GND to VCC
CS# = VIL, OE# = VIH, f = 5MHz, VCC = 5.5
CS# = VIH, OE# = VIH, f = 5MHz, VCC = 5.5
IOL = 8mA, VCC = 4.5
600
60
0.4
IOH = -4.0mA, VCC = 4.5
2.4
2.4
2.4
V
NOTE: DC test conditions: VIH = VCC -0.3V, VIL = 0.3V
DATA RETENTION CHARACTERISTICS (For WS128K32L-XXX Only)
-55°C ≤ TA ≤ +125°C, -40°C ≤ TA ≤ +85°C
Characteristic
Sym
Conditions
Min
Typ
Max
Units
Data Retention Voltage
Data Retention Quiescent Current
VCC
ICCDR
VCC = 2.0V
CS ³ VCC -0.2V
2
-
-
1
-
2
V
mA
Chip Disable to Data Retention Time (1)
Operation Recovery Time (1)
TCDR
TR
VIN ³ VCC -0.2V
or VIN 0.2V
0
TRC
-
-
-
ns
ns
NOTE: Parameter guaranteed, but not tested.
May 2004
Rev. 15
3
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
WS128K32-XXX
White Electronic Designs
AC CHARACTERISTICS
VCC = 5.0V, GND = 0V, -55°C ≤ TA ≤ +125°C
Parameter
Read Cycle
Symbol
-15
-17
-20
-25
-35
-45
-55
Units
Min Max Min Max Min Max Min Max Min Max Min Max Min Max
Read Cycle Time
Address Access Time
tRC
tAA
15
0
17
0
20
0
25
0
35
0
45
0
55
0
ns
ns
ns
ns
ns
ns
ns
ns
ns
15
17
20
25
35
45
55
Output Hold from Address Change
Chip Select Access Time
Output Enable to Output Valid
Chip Select to Output in Low Z
Output Enable to Output in Low Z
Chip Disable to Output in High Z
Output Disable to Output in High Z
tOH
tACS
tOE
15
10
17
10
20
12
25
15
35
20
45
25
55
30
1
tCLZ
3
0
3
0
3
0
3
0
3
0
3
0
3
0
1
tOLZ
tCHZ
tOHZ
1
12
12
12
12
12
12
12
12
15
15
20
20
20
20
1
1. This parameter is guaranteed by design but not tested.
AC CHARACTERISTICS
VCC = 5.0V, GND = 0V, -55°C ≤ TA ≤ +125°C
-17 -20 -25
Parameter
Write Cycle
Symbol
-15
-35
-45
-55
Units
Min Max Min Max Min Max Min Max Min Max Min Max Min Max
Write Cycle Time
tWC
tCW
tAW
tDW
tWP
tAS
15
14
14
10
14
0
17
14
15
10
14
0
20
15
15
12
15
0
25
20
20
15
20
0
35
25
25
20
25
0
45
30
30
25
30
0
55
45
45
25
45
0
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Chip Select to End of Write
Address Valid to End of Write
Data Valid to End of Write
Write Pulse Width
Address Setup Time
Address Hold Time
Output Active from End of Write
Write Enable to Output in High Z
Data Hold Time
tAH
0
3
0
3
0
3
0
3
0
4
0
4
0
4
1
tOW
1
tWHZ
tDH
10
10
12
15
20
25
25
0
0
0
0
0
0
0
1. This parameter is guaranteed by design but not tested.
FIGURE. 4 – AC TEST CIRCUIT
AC Test Conditions
Parameter
Input Pulse Levels
Input Rise and Fall
Input and Output Reference Level
Output Timing Reference Level
Notes:
Typ
IL = 0, VIH = 3.0
Unit
V
ns
V
V
5
1.5
1.5
V
V
Z is programmable from -2V to +7V.
OL & IOH programmable from 0 to 16mA.
Tester Impedance Z0 = 75 ý.
Z is typically the midpoint of VOH and VOL
OL & IOH are adjusted to simulate a typical resistive load circuit.
ATE tester includes jig capacitance.
I
V
.
I
May 2004
Rev. 15
4
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
WS128K32-XXX
White Electronic Designs
FIGURE 5 – TIMING WAVEFORM - READ CYCLE
CS#
OE#
READ CYCLE 2, (CS# = OE# = VIL, WE# = VIH
)
READ CYCLE 2 (WE# = VIH)
FIGURE 6 – WRITE CYCLE - WE# CONTROLLED
CS#
WE#
WRITE CYCLE 2, CS# CONTROLLED
FIGURE 7 – WRITE CYCLE - CS# CONTROLLED
WS32K32-XHX
CS#
WE#
WRITE CYCLE 2, CS# CONTROLLED
May 2004
Rev. 15
5
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
WS128K32-XXX
White Electronic Designs
PACKAGE 400: 66 PIN, PGA TYPE, CERAMIC HEX-IN-LINE PACKAGE, HIP (H1)
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
PACKAGE 502: 68 LEAD, CERAMIC QUAD FLAT PACK, LOW PROFILE CQFP (G4T)1
Note 1: Package Not
Recommended
For New Design
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
May 2004
Rev. 15
6
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
WS128K32-XXX
White Electronic Designs
PACKAGE 510: 68 LEAD, CERAMIC QUAD FLAT PACK, CQFP (G2U)
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
PACKAGE 528: 68 LEAD, CERAMIC QUAD FLAT PACK, CQFP (G2L)
25.15 (0.990) 0.25 (0.010) MAX
5.10 (0.200) MAX
22.36 (0.880) 0.25 (0.010) MAX
0.25 (0.010) 0.10 (0.002)
0.23 (0.009) REF
24.0 (0.946)
0.25 (0.010)
R 0.127
(0.005)
1.37 (0.054) MIN
0.004
2O / 9O
0.89 (0.035)
1.14 (0.045)
1.27 (0.050) TYP
0.38 (0.015) 0.05 (0.002)
20.31 (0.800) REF
0.940" TYP
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
May 2004
Rev. 15
7
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
WS128K32-XXX
White Electronic Designs
ORDERING INFORMATION
W S 128K 32 X - XXX X X X
LEAD FINISH:
Blank = Gold plated leads
A = Solder dip leads
DEVICE GRADE:
Q = MIL-STD-883 Compliant
M= Military Screened -55°C to +125°C
I = Industrial
C = Commercial
-40°C to +85°C
0°C to +70°C
PACKAGE TYPE:
H1 = 1.075" sq. Ceramic Hex-In-line Package, HIP (Package 400)
G2U = 22.4mm Ceramic Quad Flat Pack, CQFP (Package 510)
G2L = 22.4mm Ceramic Quad Flat Pack, CQFP (Package 528)
G4T1 = 40 mm Low Profile CQFP (Package 502)
ACCESS TIME (ns)
IMPROVEMENT MARK:
N = No Connect at pin 8, 21, 28 and 39 in HIP for Upgrades
L = Low Power*
ORGANIZATION, 128Kx32
User configurable as 256Kx16 or 512Kx8
SRAM
WHITE ELECTRONIC DESIGNS CORPORATION
Note 1: Package Not Recommended For New Designs
* Low Power Data Retention only available in G2U, G2L, PackageTypes
May 2004
Rev. 15
8
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
WS128K32-XXX
White Electronic Designs
DEVICE TYPE
SPEED
PACKAGE
SMD NO.
128K x 32 SRAM Module
128K x 32 SRAM Module
128K x 32 SRAM Module
128K x 32 SRAM Module
128K x 32 SRAM Module
128K x 32 SRAM Module
128K x 32 SRAM Module
55ns
45ns
35ns
25ns
20ns
17ns
15ns
66 pin HIP (H1)
66 pin HIP (H1)
66 pin HIP (H1)
66 pin HIP (H1)
66 pin HIP (H1)
66 pin HIP (H1)
66 pin HIP (H1)
5962-93187 05H4X
5962-93187 06H4X
5962-93187 07H4X
5962-93187 08H4X
5962-93187 09H4X
5962-93187 10H4X
5962-93187 11H4X
128K x 32 SRAM Module
128K x 32 SRAM Module
128K x 32 SRAM Module
128K x 32 SRAM Module
128K x 32 SRAM Module
128K x 32 SRAM Module
128K x 32 SRAM Module
55ns
45ns
35ns
25ns
20ns
17ns
15ns
68 lead CQFP Low Profile (G4T)1
68 lead CQFP Low Profile (G4T)1
68 lead CQFP Low Profile (G4T)1
68 lead CQFP Low Profile (G4T)1
68 lead CQFP Low Profile (G4T)1
68 lead CQFP Low Profile (G4T)1
68 lead CQFP Low Profile (G4T)1
5962-95595 05HYX1
5962-95595 06HYX1
5962-95595 07HYX1
5962-95595 08HYX1
5962-95595 09HYX1
5962-95595 10HYX1
5962-95595 11HYX1
128K x 32 SRAM Module
128K x 32 SRAM Module
128K x 32 SRAM Module
128K x 32 SRAM Module
128K x 32 SRAM Module
128K x 32 SRAM Module
128K x 32 SRAM Module
55ns
45ns
35ns
25ns
20ns
17ns
15ns
68 lead CQFP/J (G2U)
68 lead CQFP/J (G2U)
68 lead CQFP/J (G2U)
68 lead CQFP/J (G2U)
68 lead CQFP/J (G2U)
68 lead CQFP/J (G2U)
68 lead CQFP/J (G2U)
5962-95595 05HMX
5962-95595 06HMX
5962-95595 07HMX
5962-95595 08HMX
5962-95595 09HMX
5962-95595 10HMX
5962-95595 11HMX
128K x 32 SRAM Module
128K x 32 SRAM Module
128K x 32 SRAM Module
128K x 32 SRAM Module
128K x 32 SRAM Module
128K x 32 SRAM Module
128K x 32 SRAM Module
55ns
45ns
35ns
25ns
20ns
17ns
15ns
68 lead CQFP/J (G2L)
68 lead CQFP/J(G2L)
68 lead CQFP/J(G2L)
68 lead CQFP/J(G2L)
68 lead CQFP/J(G2L)
68 lead CQFP/J(G2L)
68 lead CQFP/J(G2L)
5962-95595 05HAX
5962-95595 06HAX
5962-95595 07HAX
5962-95595 08HAX
5962-95595 09HAX
5962-95595 10HAX
5962-95595 11HAX
Note 1: Package Not Recommended For New Design
May 2004
Rev. 15
9
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
相关型号：
WS128K32-25G2LQA
SRAM Module, 128KX32, 25ns, CMOS, CQFP68, 22.40 MM, 5.08 MM HEIGHT, CERAMIC, QFP-68
MICROSEMI
WS128K32-25G2QA
SRAM Module, 512KX8, 25ns, CMOS, CQFP68, 22 X 22 MM, HERMETIC SEALED, CERAMIC, QFP-68
WEDC
WS128K32-25G2QE
SRAM Module, 512KX8, 25ns, CMOS, CQFP68, 22 X 22 MM, HERMETIC SEALED, CERAMIC, QFP-68
WEDC
©2020 ICPDF网 联系我们和版权申明