W24V04B-85LL [WINBOND]
Standard SRAM, 512KX8, 85ns, CMOS, CSP-36;
| 型号： | W24V04B-85LL |
| 厂家： | 
WINBOND |
| 描述： | Standard SRAM, 512KX8, 85ns, CMOS, CSP-36 静态存储器 |
| 文件： | 总11页 (文件大小：154K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Preliminary W24V04
512K ´ 8 CMOS STATIC RAM
GENERAL DESCRIPTION
´
The W24V04 is a normal-speed, very low-power CMOS static RAM organized as 524288
8 bits
that operates on a wide voltage range from 2.3V to 2.7V power supply. The W24V04, W24V04-LE
and W24V04-LI, can meet the requirement of various operating temperature. This device is
manufactured using Winbond's high performance CMOS technology.
FEATURES
·
·
·
·
·
·
·
·
·
Low power consumption
Access time: 85 nS
2.3V to 2.7V supply voltage
Fully static operation
All inputs and outputs directly TTL compatible
Three-state outputs
Battery back-up operation capability
Data retention voltage: 1.5V (min.)
Packaged in 32-pin 450 mil SOP, standard
´
type one TSOP (8 mm 20 mm), small type
´
one TSOP (8 mm 13.4 mm) and 36-pin CSP
PIN CONFIGURATIONS
BLOCK DIAGRAM
PRECHARGE CKT.
CLK GEN.
32
31
30
29
28
1
2
VDD
A15
A17
A18
A16
A18
A17
3
4
A14
A16
WE
A13
A8
A12
A7
R
5
6
O
A15
A14
CORE CELL ARRAY
1024 ROWS
W
27
26
A6
A5
A4
A3
A2
A1
A0
7
A9
A11
D
E
C
O
D
E
R
32-pin
SOP
25
24
23
22
512 X 8 COLUMNS
A13
A12
8
9
OE
10
A10
A10
A8
11
12
CS
21
20
19
18
I/O8
I/O7
I/O6
I/O5
I/O4
I/O1
I/O2
I/O3
13
14
A7
15
16
I/O1
:
I/O8
I/O CKT.
COLUMN DECODER
DATA
CNTRL.
V
SS
17
CLK
GEN.
A9 A6 A5 A4 A3 A2 A1A0
A11
1
2
3
4
A11
A9
A8
A13
WE
WE
32
OE
A10
31
30
29
28
27
26
CS
CS
OE
I/O8
I/O7
I/O6
5
6
A17
A15
VDD
A18
A16
A14
I/O5
I/O4
VSS
I/O3
I/O2
I/O1
A0
A1
7
8
25
24
23
22
21
20
19
18
32-pin
TSOP
9
10
11
12
PIN DESCRIPTION
A12
A7
A6
A5
A4
13
14
15
16
SYMBOL
DESCRIPTION
Address Inputs
A2
A3
17
-
A0 A18
Data Inputs/Outputs
Chip Select Input
-
I/O1 I/O8
36-pin CSP TOP VIEW
CS
WE
OE
1
2
3
4
5
6
Write Enable Input
Output Enable Input
Power Supply
Ground
NC
A0
A1
A2
A3
A4
A5
A6
A8
A
I/O5
I/O6
VSS
VCC
I/O1
I/O2
VCC
VSS
I/O3
I/O4
A7
WE
NC
B
C
D
E
DD
V
A17
A16
A12
A18
I/O7
F
G
H
A15
A13
OE
A10
CS
A11
I/O8
A9
SS
V
A14
NC
No Connection
Publication Release Date: January 2000
Revision A1
- 1 -
Preliminary W24V04
TRUTH TABLE
DD
CURRENT
MODE
Not Selected
Output Disable
Read
V
I/O1-I/O8
OE
X
WE
X
CS
H
L
SB SB
High Z
High Z
I
I
I
I
, I
1
DD
DD
DD
H
H
L
L
H
Data Out
Data In
L
X
L
Write
DC CHARACTERISTICS
Absolute Maximum Ratings
PARAMETER
RATING
UNIT
V
SS
Supply Voltage to V Potential
-0.5 to +4.6
SS
DD
Input/Output to V Potential
-0.5 to V +0.5
V
Allowable Power Dissipation
Storage Temperature
1.0
W
-65 to +150
-20 to 85
-40 to 85
°
C
C
Operating Temperature
LE
LI
°
°C
Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability
of the device.
Operating Characteristics
(VSS = 0V; TA ( C) = -20 to 85 for LE, -40 to 85 for LI)
°
PARAMETER
SYM.
TEST
W24V04
UNIT
CONDITIONS
MIN.
MAX.
DD
V
Operating Power
Voltage
-
2.3
2.7
V
IL
Input Low Voltage
Input High Voltage
V
-
-
-0.2
+2.0
-1
+0.4
V
V
IH
DD
+0.2
V
V
LI
IN
SS
DD
DD
Input Leakage
Current
I
V
V
= V to V
+1
mA
LO
I/O
SS
Output Leakage
Current
I
= V to V
-1
+1
mA
IH
CS = V (min.) or
IH
OE = V (min.) or
WE
IL
= V (max.)
OL
OL
Output Low Voltage
V
I
I
= +0.5 mA
OH
= -0.5 mA
-
0.4
-
V
V
OH
Output High
Voltage
V
2.0
- 2 -
Preliminary W24V04
Operating Characteristics, continued
PARAMETER
SYM.
TEST
W24V04
UNIT
CONDITIONS
MIN.
MAX.
DD
Operating Power
Supply Current
I
-
30
mA
CS
IL
= V (max.)
I/O = 0 mA
Cycle = min.
Duty = 100%
SB
Standby Power
Supply Current
I
-
-
0.3
5
mA
IH
CS
= V (min.)
Duty = 100%
SB1
I
mA
DD
V
CS
³
-0.2V
CAPACITANCE
(TA = 25 C, f = 1 MHz)
°
PARAMETER
Input Capacitance
Input/Output Capacitance
SYM.
CONDITIONS
MAX.
8
UNIT
pF
IN
IN
V
C
= 0V
I/O
C
OUT
V = 0V
10
pF
Note: These parameters are sampled but not 100% tested.
AC CHARACTERISTICS
AC Test Conditions
PARAMETER
Input Pulse Levels
CONDITIONS
0V to 2.5V
5 nS
Input Rise and Fall Times
Input and Output Timing Reference Level
Output Load
1.2V
See the drawing below
AC Test Loads and Waveform
1 TTL
1 TTL
OUTPUT
OUTPUT
5 pF
100 pF
Including
Jig and
Scope
Including
Jig and
Scope
(For T
T
T
T
T
T
)
CLZ, OLZ, CHZ, OHZ, WHZ, OW
2.5V
90%
90%
10%
10%
5 nS
0V
5 nS
Publication Release Date: January 2000
Revision A1
- 3 -
Preliminary W24V04
AC Characteristics, continued
(VSS = 0V; TA ( C) = -20 to 85 for LE, -40 to 85 for LI)
°
Read Cycle
PARAMETER
SYM.
W24V04
UNIT
MIN.
MAX.
-
RC
Read Cycle Time
T
85
-
nS
nS
nS
nS
nS
nS
nS
nS
nS
AA
Address Access Time
T
T
T
T
T
T
T
T
85
85
50
-
ACS
AOE
CLZ
Chip Select Access Time
-
Output Enable to Output Valid
Chip Selection to Output in Low Z
Output Enable to Output in Low Z
Chip Deselection to Output in High Z
Output Disable to Output in High Z
Output Hold from Address Change
-
*
10
5
OLZ
*
-
CHZ
*
-
35
35
-
OHZ
OH
*
-
10
These parameters are sampled but not 100% tested
*
Write Cycle
PARAMETER
SYM.
W24V04
UNIT
MIN.
85
75
75
0
MAX.
WC
Write Cycle Time
T
-
-
-
-
-
-
nS
nS
nS
nS
nS
nS
CW
T
AW
T
AS
T
T
T
Chip Selection to End of Write
Address Valid to End of Write
Address Setup Time
WP
WR
Write Pulse Width
65
0
Write Recovery Time
CS WE
,
DW
DH
Data Valid to End of Write
Data Hold from End of Write
Write to Output in High Z
T
T
T
T
50
0
-
-
nS
nS
nS
nS
WHZ
OW
*
-
35
-
Output Active from End of Write
8
These parameters are sampled but not 100% tested
*
- 4 -
Preliminary W24V04
TIMING WAVEFORMS
Read Cycle 1
(Address Controlled)
RC
T
Address
AA
T
TOH
OH
T
D
OUT
Read Cycle 2
(Chip Select Controlled)
CS
T
ACS
T
CHZ
T
CLZ
D
OUT
Read Cycle 3
(Output Enable Controlled)
T
RC
Address
OE
T
AA
T
OH
TAOE
OLZ
T
CS
T
OHZ
TACS
CHZ
T
T
CLZ
D
OUT
Publication Release Date: January 2000
Revision A1
- 5 -
Preliminary W24V04
Timing Waveforms, continued
Write Cycle 1
T
WC
Address
OE
T
WR
T
CW
CS
T
AW
T
WE
WP
T
AS
T
OHZ
(1, 4)
D
OUT
T
T
DH
DW
D
IN
Write Cycle 2
OE
IL
(
= V Fixed)
T
WC
Address
CS
T
WR
T
CW
T
AW
WE
T
T
OH
WP
T
AS
(2)
(3)
T
WHZ
T
OW
(1, 4)
D
OUT
DIN
T
DH
T
DW
Notes:
1. During this period, I/O pins are in the output state, so input signals of opposite phase to the outputs should not be applied.
2. The data output from DOUT are the same as the data written to DIN during the write cycle.
3. DOUT provides the read data for the next address.
4. Transition is measured 500 mV from steady state with CL = 5 pF. This parameter is guaranteed but not 100% tested.
±
- 6 -
Preliminary W24V04
DATA RETENTION CHARACTERISTICS
(TA ( C) = -20 to 85 for LE; -40 to 85 for LI)
°
PARAMETER
SYM.
TEST CONDITIONS
MIN. TYP. MAX. UNIT
DD
DR
V
for Data Retention
V
1.5
-
-
-
-
-
5
-
V
DD
CS ³
CS ³
V
V
-0.2V
DDDR
CDR
Data Retention Current
I
m
A
DD
DD =
-0.2V, V
3.0V
Chip Deselect to Data
Retention Time
T
T
See data retention waveform
0
nS
R
RC
Operation Recovery Time
T
*
-
-
nS
Read Cycle Time
*
DATA RETENTION WAVEFORM
VDD
DD
0.9 x V
DD
>
0.9 x V
DR 1.5V
V
=
T
CDR
R
T
>
CS
DD
V
- 0.2V
CS
=
Publication Release Date: January 2000
Revision A1
- 7 -
Preliminary W24V04
ORDERING INFORMATION
PART NO.
ACCESS OPERATING VOLTAGE (V)
OPERATING
PACKAGE
TIME
/
TEMPERATURE
(nS)
STANDBY CURRENT
(mA)
(°C)
W24V04B-85LE
W24V04Q-85LE
W24V04S-85LE
W24V04T-85LE
W24V04B-85LI
W24V04Q-85LI
W24V04S-85LI
W24V04T-85LI
W24V04B-85LL
W24V04Q-85LL
W24V04S-85LL
W24V04T-85LL
85
85
85
85
85
85
85
85
85
85
85
85
-20 to 85
-20 to 85
-20 to 85
-20 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
0 to 70
CSP
2.5V / 5 mA
2.5V / 5 mA
2.5V / 5 mA
2.5V / 5 mA
2.5V / 5 mA
2.5V / 5 mA
2.5V / 5 mA
2.5V / 5 mA
2.5V / 20 mA
2.5V / 20 mA
Small type one TSOP
450 mil SOP
Standard type one TSOP
CSP
Small type one TSOP
450 mil SOP
Standard type one TSOP
CSP
0 to 70
Small type one TSOP
450 mil SOP
0 to 70
2.5V / 20 A
m
0 to 70
Standard type one TSOP
2.5V / 20 mA
Notes:
1. Winbond reserves the right to make changes to its products without prior notice.
2. Purchasers are responsible for performing appropriate quality assurance testing on products intended for use in applications
where personal injury might occur as a consequence of product failure.
- 8 -
Preliminary W24V04
PACKAGE DIMENSIONS
32-pin SOP Wide Body
Dimension in Inches
Dimension in mm
Symbol
A
Min. Nom. Max. Min. Nom. Max.
3.00
0.118
0.111
17
32
0.004
0.101
0.014
0.006
0.10
2.57
0.36
0.15
A
1
e1
0.106
0.016
2.69
0.41
0.20
2.82
0.51
A 2
b
c
D
E
e
0.020
0.012
0.31
0.008
0.805
0.445
0.050
20.75
11.43
1.42
0.817
0.450
0.056
20.45
11.30
1.27
E H
E
11.18
1.12
0.440
0.044
q
0.546
0.023
0.556
0.031
0.556
0.039
13.87
0.58
1.19
14.12
0.79
14.38
0.99
HE
L
L E
L
0.047
0.063
0.036
1.40
0.055
1.60
0.91
0.10
Detail F
1
16
b
S
y
0.004
10
10
0
0
q
Notes:
1. Dimensions D Max. & S include mold flash
or tie bar burrs.
e1
D
2. Dimension b does not include dambar
protrusion/intrusion.
c
3. Dimensions D & E include mold mismatch
.
A
A
2
and determined at the mold parting line.
4. Controlling dimension: Inches
5. General appearance spec should be based
on final visual inspection spec.
e
S
y
L
E
A
1
See Detail F
Seating Plane
32-pin Standard Type One TSOP
H D
D
Dimension in Inches
Dimension in mm
Min. Nom. Max.
Symbol
Min. Nom.
Max.
__
__
__
__
A
1.20
0.15
1.05
0.23
0.047
0.006
c
__
__
0.002
0.037
0.05
0.95
A 1
1
A
b
c
2
0.041
0.009
1.00
0.20
0.039
M
e
0.007 0.008
0.17
0.12
E
0.005 0.006
0.720 0.724
0.15
0.17
0.007
0.728
0.10(0.004)
D
18.30 18.40 18.50
b
0.311 0.315
0.780 0.787
7.90
8.00
8.10
E
0.319
19.80
__
20.00
0.795
__
20.20
__
HD
e
__
0.020
0.50
0.50
0.016 0.020
0.40
__
0.60
__
L
0.024
__
__
L 1
0.031
0.80
__
A
__
0.000
0.004
5
0.10
5
0.00
1
Y
A2
1
3
3
q
q
L
1
A
Y
L1
Controlling dimension: Millimeters
Publication Release Date: January 2000
Revision A1
- 9 -
Preliminary W24V04
Package Dimensions, continued
32-pin Small Type One TSOP
D
H
Dimension in Inches
Dimension in mm
Symbol
Min.
Max.
Nom.
Min. Nom.
Max.
D
c
1.25
0.15
1.05
A
0.049
1
0.002
0.05
0.006
A
1
2
1.00
0.037
0.007
0.041 0.95
A
0.039
e
0.008 0.009 0.17 0.20 0.27
b
c
E
0.0056 0.0059 0.0062 0.14 0.15 0.16
D
E
0.461
0.311
0.520
0.469 11.70 11.80 11.90
0.319 7.90 8.00 8.10
0.536 13.20 13.40 13.60
0.50
0.465
0.315
b
D
0.528
H
e
0.020
0.020
L
0.012
0.027
0.000
0
0.028
0.50 0.70
0.30
0.675
1
L
2
A
A
0.00
0
0.004
5
0.10
Y
q
A
q
1
L
3
3
5
Y
1
L
Controlling dimension: Millimeters
- 10 -
Preliminary W24V04
VERSION HISTORY
VERSION
DATE
PAGE
DESCRIPTION
A1
Jan. 2000
-
Initial Issued
Winbond Electronics (H.K.) Ltd.
Winbond Electronics North America Corp.
Headquarters
Rm. 803, World Trade Square, Tower II, Winbond Memory Lab.
123 Hoi Bun Rd., Kwun Tong,
No. 4, Creation Rd. III,
Science-Based Industrial Park,
Hsinchu, Taiwan
TEL: 886-3-5770066
FAX: 886-3-5796096
Winbond Microelectronics Corp.
Kowloon, Hong Kong
TEL: 852-27513100
FAX: 852-27552064
Winbond Systems Lab.
2727 N. First Street, San Jose,
CA 95134, U.S.A.
http://www.winbond.com.tw/
TEL: 408-9436666
FAX: 408-5441798
Voice & Fax-on-demand: 886-2-27197006
Taipei Office
11F, No. 115, Sec. 3, Min-Sheng East Rd.,
Taipei, Taiwan
TEL: 886-2-27190505
FAX: 886-2-27197502
Note: All data and specifications are subject to change without notice.
Publication Release Date: January 2000
Revision A1
- 11 -
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