WM8734-EV1M [WOLFSON]
WM8734 Evaluation Board User Handbook; WM8734评估板用户手册
| 型号： | WM8734-EV1M |
| 厂家： | 
WOLFSON MICROELECTRONICS PLC |
| 描述： | WM8734 Evaluation Board User Handbook |
| 文件： | 总31页 (文件大小：900K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
WM8734-EV1M
WM8734 Evaluation Board User Handbook
INTRODUCTION
The WM8734 is a portable stereo audio CODEC.
This evaluation platform and documentation should be used in conjunction with the latest version of
the WM8734 datasheet. The datasheet gives device functionality information as well as timing and
data format requirements.
This evaluation platform has been designed to allow the user ease of use and give optimum
performance in device measurement as well as providing the user with the ability to listen to the
excellent audio quality offered by the WM8734.
GETTING STARTED
PACKING LIST
The WM8734 Evaluation Kit contains:
•
•
•
1 WM8734-EV1B Evaluation Board
2 WM8734-EV1S 3.5” floppy disks containing control software
This manual -1 WM8734-EV1M
CUSTOMER REQUIREMENTS
Minimum customer requirements are:
•
•
•
D.C. Power supply of +5V
D.C. Power supply of +2.7V to +3.6V
PC and printer cable (for software control)
Minimum spec requirements are:
•
•
•
Win95/98/NT/2000/XP
486 Processor
Approximately 1.5Mb of free disk space
DAC Signal Path Requires:
•
•
Digital coaxial or optical data source
1 set of active stereo speakers
ADC Signal Path Requires:
•
•
Analogue coaxial or 3.5mm jack plug data source
Digital coaxial or optical data receiving unit
November 2002, Rev 1.2
WOLFSONMICROELECTRONICS plc
Copyright 2002 Wolfson Microelectronics plc
www.wolfsonmicro.com
WM8734-EV1M
POWER SUPPLIES
Using appropriate power leads with 4mm connectors, supplies should be connected as described in
Table 1.
REF-DES
SOCKET NAME
DCVDD
+5V
SUPPLY
+1.42V to +3.6V
+5V
J1
J2
J4
DBVDD
AVDD
+2.7V to +3.6V
+2.7V to +3.6V
J7
J3GND
J6
0V
AGND
0V
Table 1 Power Supply Connections
The DGND and AGND connections may be connected to a common GND on the supply with no
reduction in performance.
Note:
1. As standard, designator L4 will be populated with a zero ohm link connecting the AVDD and
DBVDD supplies together reducing the amount of connections to the board. If a separate supply
is to be connected, L4 should be unpopulated and +2.7V to +3.6V should be connected to the
DBVDD panel socket (J4).
2. Refer to WM8734 datasheet for limitations on individual supply voltages.
Important: Exceeding the recommended maximum voltage can damage EVB components.
Under voltage may cause improper operation of some or all of the EVB components.
BOARD FUNCTIONALITY
When using the DAC, there are three options for inputting digital data into the WM8734 evaluation
board. There is a coaxial input (J12) via a standard phono connector or an optical input (U1) via a
standard optical receiver module. A direct digital input is also available via one side of a 2x8 pin
header (H1).
When using the ADC, the analogue input signals are applied to the evaluation board via phono
connectors J11 (LLINEIN) and J13(RLINEIN).
There are three options for outputting digital data from the WM8734 evaluation board when the ADC
is used. There is a coaxial output (J22) via a standard phono connector or an optical output (U6) via a
standard optical transmitter module. The digital signals output from the WM8734 may also be
accessed via one side of a 2x6 pin header (H2).
The analogue outputs of the board are via phono connectors J23(LOUT) and J19 (ROUT).
All WM8734 device pins are accessible for easy measurement via the 10 pin headers (J10 & J15)
running up each side of the device.
The software control mode (i.e. SPI or 2-wire) is selectable via a 2-pin jumper connection (J8).
A level-shift IC (U3) is used to shift the fixed +5V digital input from the CS8427 (U5) down to the same
level as DBVDD. A transistor level-shift arrangement (Q1, Q2 & Q3) is used to shift the software
digital control lines from the PC (fixed +5V) to the same level as DBVDD.
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WM8734-EV1M
BOARD INPUT
The input interface to this board is via two analogue signal input phono connectors J11 (LLINEIN) and
J13(RLINEIN). These signals are AC coupled before being input to the device. To allow a 2Vrms
input signal to be input to the evaluation board without causing damage to the WM8734, a simple
resistor divider puts a 7dB attenuation on the input signal ensuring that a signal no greater than
1Vrms reaches the WM8734.
When used in Slave Mode digital clock signals must be applied to the WM8734. A digital (AES/EBU,
UEC958, S/PDIF, EIAJ CP340/1201) signal input must be applied to the coaxial input (J12), or the
optical input (U1), allowing the CS8427 (U5) to generate the necessary clocks.
A direct digital input is also available via one side of a 2x8 pin header (H1); data must be input in one
of the WM8734 supported formats - see datasheet.
BOARD OUTPUT
The output interface from the board is via an optical (U6) or coaxial (J22) digital (AES/EBU, UEC958,
S/PDIF, EIAJ CP340/1201) signal output. A direct signal output is available via one side of a 2x6 pin
header (H2). Data is output in one of the WM8734 supported formats - see datasheet.
There are two analogue signal output phono connectors J23(LOUT) and J19 (ROUT). These signals
are AC coupled (optional, may be bypassed via links J18 and J21) before being output from the
board. There is also an SMB connector J20 (DACLRC_OUT). This may be used to connect to some
external circuit. DACLRC is only an output when the WM8734 is in Master Mode.
Warning: If AC coupling capacitors are bypassed, the outputs will be on a DC level (AVDD/2).
This can damage Hi-Fi equipment if directly connected.
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WM8734-EV1M
INTERFACES
KEY
J6
J7
J1
J4
J2
J3
1
3
5
7
9
11
13
15
11
9
7
5
3
2
4
6
12
10
8
E N O P
0
8
6
SW1
2
10
12
14
16
4
2
1
5
4 6
3
1
1
1
J8
1
J10
J15
1
2
3
4
5
6
7
8
9
1
2
3
J9
SW2
1
2
J14
H1
H2
10
1
SW3
1
J16
J17
1
J18
J21
J20
Figure 1 Interfaces
H1
HEADERS
SIGNAL
SIGNAL
DGND
J15
1
WM8734
1/2
3/4
MCLK
GND
1
2
2
DBVDD
5/6
DACDAT
GND
33
4
BCLK
7/8
4
5
DACDAT
DACLRC
ADCDAT
ADCLRC
LOUT
9/10
11/12
13/14
15/16
DACLRC
GND
5
6
6
BCLK
GND
7
7
8
8
9
9
ROUT
SIGNAL
GND
10
10
AVDD
H2
12/11
10/9
8/7
ADC_DAT_OUT
GND
J10
1
SIGNAL
AGND
VMID
WM8734
11
12
6/5
BCLK_OUT
2
4/3GND
2/1
3
13
RLINEIN
ADC_LRC_OUT
4
5
14
15
16
17
18
19
20
LLINEIN
MODE
CSB
6
7
SDIN
8
SCLK
MCLK
DCVDD
9
10
Table 2 Headers
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WM8734-EV1M
LINKS
LINKS & JUMPERS
J8
DESCRIPTION
OPEN - SPI software interface control
SHORT - 2-wire software interface control
OPEN - ROUT signal is AC coupled
SHORT - ROUT signal with no AC coupling1
OPEN - LOUT signal is AC coupled
SHORT - LOUT signal with no AC coupling1
OPEN - Master mode
J21
J18
J14 (BCLK)
J16 (DACLRC)
J17 (ADCLRC)
SHORT - Slave mode
OPEN - Master mode
SHORT - Slave mode
OPEN - Master mode
SHORT - Slave mode
J9
ADCLRC input for slave mode2
J20
DACLRC output used for external sync
Table 3 Links
Note:
1. Caution: Output signals in this configuration will be DC biased to AVDD/2
2. When running the ADC in slave mode; ADCLRC can be generated from a correctly
formatted digital input on J12 or U1. SW3must be in position 1-2.
SWITCHES
SWITCH
DESCRIPTION
SW1
1
1
1
1
2
0
0
0
3
0
0
0
4
1
0
0
5
0
0
0
6
DATA FORMAT
I2S Compatible
24-bit Right Justified
Left Justified
(DATA FORMAT)
0
1
0
SW2
After an input data format change has been made using SW1, the
CS8427 will only latch the new settings after SW2 has been pressed
and released.
SW3Pins 1 & 2 SHORT - DACLRC used to supply ADCLRC in Slave Mode.
Pins 2 & 3SHORT - external ADCLRC may be applied via J9.
Table 4 Switches
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WM8734-EV1M
WM8734 OPERATION
SOFTWARE CONTROL
There are two possible serial control modes that may be selected to operate the WM8734. The
standard SPI user interface is a 3-wire solution with the second option being a 2-wire solution.
To operate the WM8734 in SPI (3-wire) mode, the jumper on link J8 must be removed leaving pins 1
and 2 OPEN. The 3-wire serial interface then becomes active on pins 18(SCLK), 17(SDIN) and
16(CSB). The serial interface on the board can be connected to a PC via the printer port or any other
standard parallel port. The port used can be selected through the software provided. The software
supplied with this kit gives the user access to all the possible features provided by the WM8734. The
3-wire latch, data and clock lines may also be connected to the board via the test points TP3 (CSB),
TP2 (SDIN) and TP1 (SCLK).
Please refer to the WM8734 datasheet for full details of the serial interface timing and all register
features.
CSB
SCLK
B15
B14
B13
B12
B11
B10
B9
B8
B7
B6
B5
B4
B3
B2
B1
B0
SDIN
Figure 2 3-Wire Serial Interface
To operate the WM8734 in 2-wire mode, the jumper on link J8 must SHORT pins 1 and 2. The 2-wire
serial interface becomes active on pins 18(SCLK) and 17(SDIN). The serial interface on the board
can be connected to a PC via the printer port or any other standard parallel port. Note: a bi-
directional parallel port is required for 2-wire operation1. The 2-wire data and clock lines may also
be connected to the board via the test points TP2 (SDIN) and TP1 (SCLK).
When used in 2-wire mode, the WM8734 has two possible addresses (0011010 [0x34h] or 0011011
[0x36h]) that are selectable by pulling CSB low or high. If connecting a probe to the Test Points it
must be noted that the CSB line is pulled high on the WM8734 evaluation board selecting address
0011011. CSB must be pulled low or driven low through the software writes if address 0011010 is
used (as is done in the WM8734-EV1S software provided).
ACK
ACK
ACK
DATA B15-8
R ADDR
R/W
DATA B7-0
SDIN
SCLK
START
STOP
Figure 3 2-Wire Serial Interface
Note:
1. If the 2-wire mode is not reporting as expected then the most likely cause is that the
parallel port being used is not bi-directional. In most PC’s, the parallel port can be
configured in the BIOS settings during initial power up.
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WM8734-EV1M
Register
B
B
B
B
B
B
B9
B8
B7
B6
B5
B4
B3
B2
B1
B0
15
14
13
12
11
10
LRIN
LIN
R0 (00h)
R1 (02h)
R4 (08h)
R5 (0Ah)
R6 (0Ch)
R7 (0Eh)
R8 (10h)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
1
1
1
1
0
0
0
0
0
1
1
0
0
1
0
1
0
1
0
0
0
0
0
0
0
1
LINVOL
RINVOL
0
BOTH
MUTE
RLIN
RIN
BOTH
MUTE
DAC
SEL
0
0
0
0
0
0
0
0
0
1
0
DAC
MU
ADC
HPD
0
HPOR
DEEMPH
PWR
OFF
LINEIN
PD
1
OUTPD DACPD ADCPD
BCLK
INV
LR
MS
LRP
IWL
FORMAT
SWAP
CLKI
DIV2
USB/
0
0
0
0
SR
BOSR
0
NORM
R9 (12h)
R15(1Eh)
0
0
0
0
0
0
1
1
0
1
0
1
1
1
0
0
0
0
0
ACTIVE
RESET
ADDRESS
DATA
Table 5 Mapping of Program Registers
Please refer to the WM8734 datasheet for full details of the serial interface timing and all register
features
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WM8734-EV1M
SERIAL INTERFACE SOFTWARE DESCRIPTION
SOFTWARE INSTALLATION
There are 2 floppy disks supplied with this evaluation kit. To install the software:
1. Insert disk 1
2. Select the ‘Start’ button on the Windows task bar and the ‘Run…’ option.
3. Type “A:\setup” and then press OK.
4. Follow the on-screen instructions
SOFTWARE OPERATION
Figure 4 WM8734 Default Screen Settings
The WM8734 default screen settings shown in Figure 4 resemble the default state of the device at
initial power on. After a device Reset the ‘WM8734’ button can be pressed to set the software
interface to match the WM8734 register values. Pressing the ‘WM8734’ button does not write to the
WM8734, it only changes the software screen settings.
Important: It must be noted that the CS8427 SPDIF decoder IC will only work at a rate of 256fs. This
will limit the sample rates that may be set using the WM8734 unless an external source is used
supplying signals directly to the relevant pins of header H1 or taking the signals from the relevant pins
of header H2.
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WM8734-EV1M
DAC DEFAULT SETUP
Figure 5 DAC Default Screen Settings
By pressing the DAC default button, the software writes to the device setting the SPDIF_In through
DAC to Line_Out path active in 24-bit, I2S input data format. This is to ease the initial use of the
WM8734 until the user becomes familiar with both device and software operation.
+1.42V
to
+5V GND
+3.6V
PARALLEL PORT
AGND
J6
J7
J1
J2
J3
J4
+2.7V
to
+3.6V
N E O P
0
SW1
2
1
5
6
3
4
1
1
J8
LLINEIN
1
J10
J15
J9
OPT_
SPDIF_
IN
SW2
RLINEIN
ROUT
SPDIF_
IN
J14
H1
H2
1
SW3
OPT_
SPDIF_
OUT
LOUT
1
J16
J17
1
J18
J21
SPDIF_
OUT
J20
Figure 6 WM8734-EV1B Board Setup for DAC Operation
Note: Setup for Slave Mode; SPI software control mode. The WM8734 registers must be set
accordingly by pressing the DAC button as described above.
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WM8734-EV1M
LINKS & JUMPERS
J8
STATUS
OPEN
DESCRIPTION
SPI software interface control
ROUT signal is AC coupled
LOUT signal is AC coupled
Slave mode
J21
OPEN
J18
OPEN
J14 (BCLK)
J16 (DACLRC)
J17 (ADCLRC)
SW3OFF Position
H1
SHORT
SHORT
SHORT
Slave mode
Slave mode
ADCLRC not required for DAC operation
SHORT opposite
pins
Digital audio interface input (DAC) signals
H2
All opposite pins
OPEN
Digital audio interface output (ADC) signals
Table 6 DAC Test Jumper Setup (Slave Mode)
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WM8734-EV1M
ADC DEFAULT SETUP
Figure 7 ADC Default Screen Settings
By pressing the ADC default button, the software writes to the device setting the Line_In through ADC
to SPDIF_Out path active. This is to ease the initial use of the WM8734 until the user becomes
familiar with both device and software operation.
+1.42V
to
+5V GND
+3.6V
PARALLEL PORT
AGND
J6
J7
J1
J4
J2
J3
+2.7V
to
+3.6V
N E O P
0
SW1
2
1
6
5
4
3
1
J8
LLINEIN
1
J10
J15
J9
OPT_
SPDIF_
IN
SW2
RLINEIN
ROUT
The SPDIF input is
required to provide
clocks for the
WM8734 audio
interface.
J14
SPDIF_
IN
H1
H2
1
SW3
OPT_
SPDIF_
OUT
LOUT
1
J16
J17
1
J18
J21
SPDIF_
OUT
J20
Figure 8 WM8734-EV1B Board Setup for ADC Operation
Note: Setup for Slave Mode; SPI software control mode. The WM8734 registers must be set
accordingly by pressing the ADC button as described above.
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WM8734-EV1M
LINKS & JUMPERS
J8
STATUS
OPEN
DESCRIPTION
SPI software interface control
ROUT signal is AC coupled
LOUT signal is AC coupled
Slave mode
J21
OPEN
J18
OPEN
J14 (BCLK)
J16 (DACLRC)
J17 (ADCLRC)
SHORT
SHORT
SHORT
Slave mode
Slave mode
SW3Pins 1 & 2 SHORT DACLRC used to supply ADCLRC in Slave mode.
H1
Opposite pins 5/6
and 7/8 OPEN. All
Digital audio interface input (DAC) signals.
DACDAT should not be connected as it may
other opposite pins cause reduced ADC measurement performance
SHORT.
H2
All opposite pins
OPEN
Digital audio interface output (ADC) signals
Table 7 ADC Test Jumper Setup (Slave Mode)
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WM8734-EV1M
CHANGING THE DEFAULT SETUP
If any further changes are made to the settings, after a default button is pressed, the Submit button
must be pressed to write the new settings to the WM8734.
Figure 9 Changing Default Settings
Once any of the WM8734 default settings are changed on the control panel, the relevant section is
highlighted (see Figure 9) to show the section where the setting has changed. For example, as
shown in Figure 9, the Master/Slave switch has changed state from Slave to Master. The highlight
around the relevant section also has the purpose of letting the user know that they have not yet
submitted the required changes to the WM8734. After a Submit, all the sections default back to their
original 'panel grey' colour. The Submit button also becomes inactive until another change is made to
the register settings.
All volume sliders are automatically submitted to the WM8734, and updated in "real-time".
If the WM8734 has been set active and a change is made to the Digital Audio Interface or the
Sampling Control, the Active switch goes automatically to Inactive (as suggested in the WM8734
datasheet). This is to ensure that there are no digital interface issues caused by changes being made
to these sections while the Active switch is in the 'Active' position.
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WM8734-EV1M
MASTER MODE OPERATION
As well as being used in Slave mode as described in the default settings already mentioned, the
WM8734 may be used in Master mode. When using any of the default setups, the WM8734 can be
easily changed from a Slave to a Master device by writing to the WM8734 registers using the supplied
software.
ADC NORMAL SETUP
To set the WM8734-EV1B into ADC Master mode, press the ‘ADC’ default button, change the
‘Master/Slave’ switch to Master and ensure that the ‘Active’ switch is set to the Active position. Then
press the ‘Submit’ button. The board should be set up as shown in Figure 10 and Table 8.
Note: The only digital signal that is supplied to the WM8734 audio interface is MCLK. All other
signals are output from the WM8734 in Master Mode.
+1.42V
to
+5V GND
+3.6V
PARALLEL PORT
AGND
J6
J7
J1
J4
J2
J3
+2.7V
to
+3.6V
N E
O P
0
SW1
4
6
3
2
1
5
1
J8
LLINEIN
1
J10
J15
J9
OPT_
SPDIF_
IN
SW2
RLINEIN
ROUT
The SPDIF input is
required to provide
clocks for the
WM8734 audio
interface.
J14
SPDIF_
IN
H1
H2
1
SW3
OPT_
SPDIF_
OUT
LOUT
1
J16
J17
1
J18
J21
SPDIF_
OUT
J20
Figure 10 WM8734-EV1B Board Setup for ADC Operation in Master Mode
Note: Setup for Master Mode; SPI software control mode. The relevant WM8734 registers
must be set using the software.
LINKS & JUMPERS
J8
STATUS
OPEN
DESCRIPTION
SPI software interface control
ROUT signal is AC coupled
LOUT signal is AC coupled
Master mode
J21
OPEN
OPEN
OPEN
OPEN
OPEN
J18
J14 (BCLK)
J16 (DACLRC)
J17 (ADCLRC)
SW3OFF Position
H1
Master mode
Master mode
ADCLRC input not required for master mode
Opposite pins 1/2
and 3/4 SHORT.
All other opposite
pins OPEN.
Digital audio interface input (DAC) signals. MCLK
is the only audio interface signal that should be
supplied to the WM8734.
H2
All opposite pins
SHORT
Digital audio interface output (ADC) signals
Table 8 ADC Normal Master Mode Set-up
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WM8734-EV1M
SOFTWARE MENU FEATURES
Figure 11 Options Available from the File Menu
Figure 11 shows the 'File' menu. This menu is used for printing the screen to the PCs default
printer and to exit the WM8734 software.
Figure 12 Options Available from the Radix Menu
The 'Radix' menu shown in Figure 12 allows the user to choose which numeric format to view the Line
Input volume control settings in.
Figure 13 Options Available from the Port Menu
The 'Port' menu shown in Figure 13allows the user to specify a parallel port address on the
PC.
The 'Help' menu (not shown) gives the software version number and contact details if further
assistance is required.
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WM8734-EV1M
Figure 14 Options Available from the Software Interface Menu
The 'Software Interface' menu shown in Figure 14 allows the user to select which method of
control is to be used. 3-wire (SPI); or 2-wire with a choice of two available addresses offered
by the WM8734.
The current software control method is displayed in the box highlighted in red at the bottom
of the software control window. In 2-wire mode, the result of the write is also displayed. As
shown in Figure 15, an 'Error in Address' has been reported - Please refer to the WM8734
datasheet for a full explanation of 2-wire mode operation.
Figure 15 2-wire Interface Write Result
If clicked on, the Wolfson logo in the bottom left of the control panel window will open the Wolfson
website (www.wolfsonmicro.com) in the PCs default browser.
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WM8734-EV1M
WM8734-EV1B SCHEMATIC
Figure 16 Functional Diagram
Figure 17 SPDIF Interface
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Figure 18 Analogue Input
Figure 19 Software Control
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WM8734-EV1M
Figure 20 Level Shift
Figure 21 WM8734
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Figure 22 Analogue Output
Figure 23 Power
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WM8734-EV1B PCB LAYOUT
Figure 24 Top Layer Silkscreen
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WM8734-EV1M
Figure 25 Top Layer
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Figure 26 Bottom Layer
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WM8734-EV1M
Figure 27 Bottom Layer Silkscreen
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WM8734-EV1M
WM8734-EV1B BILL OF MATERIAL
Description
Reference
QTY
74ALVC164245 16 Bit Dual Supply BusTransceiver SSO
10uF 6.3 Dia 2.5 pitch Oscon Through Hole Cap. 16V 20%
1uF 4 Dia 2 pitch Oscon Through Hole Cap. 25V 20%
0.01uF 0805 SMD Ceramic Capacitor 50V X7R
0.1uF 0805 SMD Ceramic Capacitor 50V X7R
U3
1
C4-6 C10 C18-19 C28 C30 C42 C47
10
2
C16 C33
C17
1
C1-3 C7-9 C11 C14-15 C20-22 C26-27
C29 C31-32 C34 C36 C39-40 C45
22
1nF 0805 SMD Ceramic Capacitor 50V NPO
1uF 0805 SMD Ceramic Capacitor 10V X7R
220pF 0805 SMD Ceramic Capacitor 50V X7R
82nF 0805 SMD Ceramic Capacitor 25V X7R
Unpop 0805 SMD Ceramic Capacitor site
2.2nF 1206 SMD Ceramic Capacitor 50V NPO
0.47uF MKS02 leaded Polyester Capacitor 50V 20%
1x10 2.54mm pitch PCB Pin Header VERTICAL
2x6 2.54mm pitch PCB Pin Header VERTICAL
2x8 2.54mm pitch PCB Pin Header VERTICAL
36-way Centronics/IEE488 PCB mountable Connector
JSK9-16-G0 PCB 1x3 Jumper Switch 0.1" Center-off VERTICAL
4mm Non-Insulated Panel Socket 16A
Phono Socket PCB mount BLACK
C25 C35
2
2
4
1
1
1
2
2
1
1
1
1
6
1
2
2
1
2
1
1
5
1
1
1
6
2
1
2
1
3
1
15
3
1
4
1
1
1
4
1
1
4
5
C12 C23
C13 C24 C43-44
C38
R36
C37
C41 C46
J10 J15
H2
H1
J5
SW3
J1-4 J6-7
J22
Phono Socket PCB mount RED
J13 J19
Phono Socket PCB mount WHITE
J11 J23
Phono Socket PCB mount YELLOW
J12
SMB Connector PCB Mount 50 Ohm VERTICAL
CS8427 96KHz Audio Transceiver
J9 J20
U5
DS1813 5V active Low Power-On-Reset chip SOT
0R 1206 Resistor on 1210 Inductor site
3.3uH 1210 Surface Mount Inductor 'NA series'
47uH 1210 Surface Mount Inductor 'PA series'
Unpop 1210 Surface Mount Inductor site
1x2 PCB Pin Header 0.1" VERTICAL
U2
L1-5
L7
L6
L8
J8 J14 J16-18 J21
R38 R41
R26
0R 0805 SMD chip resistor 1% 0.1W
100K 0805 SMD chip resistor 1% 0.1W
100R 0805 SMD chip resistor 1% 0.1W
10K 0805 SMD chip resistor 1% 0.1W
1K2 0805 SMD chip resistor 1% 0.1W
39R 0805 SMD chip resistor 1% 0.1W
47K 0805 SMD chip resistor 1% 0.1W
4K7 0805 SMD chip resistor 1% 0.1W
5k1 0805 SMD chip resistor 1% 0.125W
5K6 0805 SMD chip resistor 1% 0.1W
620R 0805 SMD chip resistor 1% 0.1W
75R 0805 SMD chip resistor 1% 0.125W
8K2 0805 SMD chip resistor 1% 0.1W
Unpopulated 0805 resistor site
R32 R34
R28
R1 R3 R5
R29
R7-19 R31 R33
R2 R4 R6
R27
R20-21 R24-25
R37
R23
R30
R22 R35 R39-40
SW1
DIL Switch 6-Way Rocker
B3F1000 SPNO PCB mount switch
SW2
1.32mm PCB Test Terminal BLACK
TP4-5 TP7 TP9
TP1-3 TP6 TP8
1.32mm PCB Test Terminal RED
Rev 1.2 November 2002
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WM8734-EV1M
Description
Reference
QTY
TORX176 Digirtal Audio Optical Receiver
TOTX176 Digirtal Audio Optical Transmitter
U1
1
U6
1
1
3
1
1
T1
2:1 Ratio 96KHz SPDIF Digital Audio transformer SOIC
TN0200T N- Channel MOSFET SOT23
Q1-3
U4
WM8734 Stereo Audio CODEC SSOP
Table 9 Board Bill of Materials
Note:
1. The audio transformer used on this board is manufactured by Scientific Conversion Inc.
(www.scientificonversion.com).
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WM8734-EV1M
APPENDIX A
EXTERNAL DSP CONNECTION TO THE WM8734-EV1B
The WM8734-EV1B evaluation board hasbeen designed to allow it to be easily connected to an
external DSP platform with error free operation.
The following information is provided to ease the connection process and ensure that all signals sent
and received by the WM8734-EV1B are reliable and at the correct voltage levels.
AUDIO INTERFACE CONNECTIONS
It is recommended that twisted pair (signal twisted with GND) or shielded wires are used to make the
audio interface connectionsbetween the DSP and WM8734-EV1B platforms. Thisisto ensure that
no interference or noise ispicked up by the clocksor data lines, thusreducing performance and
reliability.
When the WM8734 isest in
Slave Mode, the jumperson header H1 hsould be removed,
disconnecting the digital input section of the evaluation board. The audio interface timing and data
signalsfrom the DSP platform should then be connected asshown in Figure 28. The signalsshould
be connected to H1 and not on the header strips J10 and J15 running up each side of the device.
Connecting the signals on the output side of the level-shift IC (U3) will cause drive contention
between U3 and the DSP and could result in damage to either or both devices. In most cases, the
DSP supplies will be set around 3V for low power portable applications. The inputs to the level-shift
IC (74ALVC164245) have a TTL threshold (i.e. Logic High = +2V(min); Logic Low = +0.8V(max)) and
low input current requirements(i.e. 15uA max) allowing most DSP'sto connect directly.
MCLK
GND
DACDAT
GND
DACLRC
GND
BCLK
GND
H1
Figure 28 Connections from DSP Platform
The digital inputsto the WM8734 have a CMOS threshold (i.e. Logic High (min) = DBVDDx0.7; Logic
Low (max) = DBVDDx0.3). These are met directly by the level shift IC outputs.
The jumpers on H2 should also be removed, disconnecting the digital output section of the WM8734
evaluation board. The ADCDAT data from the WM8734 should then be connected to the DSP via pin
6 of header strip J15 and the GND connection should be taken from pin 1 of header strip J15.
The ADCDAT signal should be taken direct from the WM8734 digital output as the output side of the
level-shift IC (U3) from the WM8734 is pulled up to +5V which may overdrive and cause damage to
the DSP inputs. The digital output levels of the WM8734 are Logic High (min) = DBVDDx0.9; Logic
Low (max) = DBVDDx0.1 which should meet the input level requirementsof most DSPsrunning at
+3V supplies. If the DSP is running with +5V supplies then the connections to it should be made from
the output side of the level-shift IC (U3), connecting the signals as shown in Figure 29.
GND
ADCDAT
H2
Figure 29 Data Connection to the DSP Platform (+5V tolerant input levels)
Rev 1.2 November 2002
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WM8734-EV1M
When the WM8734 isest to
Master mode, the jumperson header H1 hsould be removed,
disconnecting the digital input section of the evaluation board. If an external MCLK signal is being
used (i.e. supplied by the DSP) then the DSP platform should be connected as shown in Figure 30.
The signal should be connected to H1 and not on the header strip J15 running up the side of the
device. Connecting the signal on the output side of the level-shift IC (U3) will cause drive contention
between U3 and the DSP and could result in damage to either or both devices. In most cases, the
DSP supplies will be set around +3V for low power portable applications. The inputs to the level-shift
IC (74ALVC164245) have a TTL threshold (i.e. Logic High = +2V(min); Logic Low = +0.8V(max)) and
low input current requirements(i.e. 15uA max) allowing most DSPsto connect directly.
MCLK
GND
H1
Figure 30 Timing Connections from DSP Platform
The digital inputsto the WM8734 have a CMOS threshold (i.e. Logic High (min) = DBVDDx0.7; Logic
Low (max) = DBVDDx0.3). These are met directly by the level shift IC outputs.
The jumpers on H2 should also be removed, disconnecting the digital output section of the WM8734
evaluation board. The ADCDAT, BCLK and ADCLRC signals from the WM8734 should then be
connected to the DSP from headersJ10 and J15 running up each side of the WM8734.
The ADCDAT, BCLK and ADCLRC signals should be taken direct from the WM8734 digital output as
the output side of the level-shift IC (U3) from the WM8734 is pulled up to +5V which may overdrive
and cause damage to the DSP inputs. The digital output levels of the WM8734 are Logic High (min)
= DBVDDx0.9; Logic Low (max) = DBVDDx0.1 which should meet the input level requirements of
most DSPs running at +3V supplies. If the DSP is running with +5V supplies (and +5V tolerant
inputs) then the connections from the WM8734 evaluation board to the DSP should be made from
H2 on the output side of the level-shift IC from the WM8734 as shown in Figure 31.
GND
ADCDAT
GND
BCLK
GND
ADCLRC
H2
Figure 31 Connections to the DSP Platform (+5V tolerant input levels)
Thiswill ensure that the DSP input level specificationsare met.
SOFTWARE INTERFACE
When using the WM8734-EV1B evaluation board with a DSP platform, the registers may be set
using the supplied software with a PC and parallel port cable as shown in Figure 32.
If the DSP isbeing used to write to the WM8734 registersaswell assupplying/receiving the audio
interface timing and data signals, then it is recommended that twisted pair or shielded wires are used
to connect the DSP platform to the WM8734-EV1B. If the DSP supplies are set to the same voltage
asthe DBVDD suppliesof the WM8734; a direct connection can be made to pin 6 (CSB), pin 7
(SDIN) and pin 8 (SCLK) of header strip J10 for 3-wire software mode as shown in Figure 33. If the
DSP isrunning at a higher voltage (e.g. +5V) than the WM8734, then the signalsfrom the DSP
platform should be connected to test points TP3 (CSB), TP2 (SDIN) and TP1 (SCLK). Connecting
the higher voltage signals from the DSP to the test points will level shift them through the transistors
down to the same level asthe DBVDD supply asshown in Figure 34. Thiswill ensure that the
WM8734 input CMOS thresholds (i.e. Logic High (min)
DBVDDx0.3) are met and no damage isdone to the device.
=
DBVDDx0.7; Logic Low (max) =
Rev 1.2 November 2002
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WM8734-EV1M
The same connections apply for controlling the WM8734 via 2-wire software mode (i.e. only pin 9
(SDIN) and pin 10 (SCLK) of header strip J10 are used). Pin 6 (CSB) can be pulled low on the board
if device address0011010 [0x34h] isrequired or pulled high address0011011 [0x36h] isrequired.
CONNECTION DIAGRAMS
Software
Control
Audio
Interface
WM8734-EV1B
DSP
Platform
H1
J10
J15
Figure 32 DSP Connection with PC Control using Wolfson Software
DSP
Software
Control
WM8734-EV1B
H1
Audio
Interface
DSP
Platform
J10
J15
Rev 1.2 November 2002
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WM8734-EV1M
Figure 33 Full DSP Control with Equal Supplies for DSP andWM8734
DSP
Software
Control
Test Points
& Transistors
WM8734-EV1B
Audio
Interface
H1
H2
DSP
Platform
J10
J15
Figure 34 Full DSP Control with Higher DSP Supply than WM8734
EVALUATION SUPPORT
The aim of thisevaluation kit isto help you to become familiar with the functionality and performance
of the WM8734, stereo CODEC.
If you require more information or require technical support please contact Wolfson Microelectronics
Applicationsgroup through the following channels:
Email:
Telephone Apps:
Fax:
apps@wolfsonmicro.com
(+44) 131 272 7070
(+44) 131 272 7001
Mail:
Applicationsat the addresson the last page.
or contact your local Wolfson representative.
Additional information may be made available from time to time on our web site at
http://www.wolfsonmicro.com
Rev 1.2 November 2002
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WM8734-EV1M
IMPORTANT NOTICE
Wolfson Microelectronics plc (WM) reserve the right to make changes to their products or to discontinue any product or
service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing
orders, that information being relied on iscurrent. All productsare sold subject to the WM termsand conditionsof sale
supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation
of liability.
WM warrantsperformance of itsproductsto the specificationsapplicable at the time of sale in accordance with WM’s
standard warranty. Testing and other quality control techniques are utilised to the extent WM deems necessary to support
this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by
government requirements.
In order to minimise risks associated with customer applications, adequate design and operating safeguards must be used
by the customer to minimise inherent or procedural hazards.
WM assumes no liability for applications assistance or customer product design. WM does not warrant or represent that
any license, either expressor implied, isgranted under any patent right, copyright, mask work right, or other intellectual
property right of WM covering or relating to any combination, machine, or process in which such products or services might
be or are used. WM’s publication of information regarding any third party’s products or services does not constitute WM’s
approval, license, warranty or endorsement thereof.
Reproduction of information from the WM web site or datasheets is permissible only if reproduction is without alteration and
is accompanied by all associated warranties, conditions, limitations and notices. Representation or reproduction of this
information with alteration voidsall warrantiesprovided for an associated WM product or service isan unfair and deceptive
business practice, and WM is not responsible or liable for any such use.
Resale of WM’sproductsor serviceswith statementsdifferent from or beyond the parametersstated by WM for that
product or service voids all express and any implied warranties for the associated WM product or service, is an unfair and
deceptive business practice, and WM is not responsible nor liable for any such use.
ADDRESS:
Wolfson Microelectronics plc
20 Bernard Terrace
Edinburgh
EH8 9NX
United Kingdom
Tel :: +44 (0)131 272 7000
Fax :: +44 (0)131 272 7001
Email :: apps@wolfsonmicro.com
Rev 1.2 November 2002
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