ZL30142GGG2 [ZARLINK]

Support Circuit, 1-Func, PBGA64, 9 X 9 MM, 1 MM PITCH, LEAD FREE, CABGA-64;
ZL30142GGG2
型号: ZL30142GGG2
厂家: ZARLINK SEMICONDUCTOR INC    ZARLINK SEMICONDUCTOR INC
描述:

Support Circuit, 1-Func, PBGA64, 9 X 9 MM, 1 MM PITCH, LEAD FREE, CABGA-64

ATM 异步传输模式 电信 电信集成电路
文件: 总4页 (文件大小:70K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
ZL30142  
SyncE SONET/SDH  
G.8262/Stratum 3 System Synchronizer  
Short Form Data Sheet  
July 2009  
Features  
Ordering Information  
Supports the requirements of ITU-T G.8262 for  
synchronous Ethernet Equipment slave Clocks  
(EEC option 1 and 2)  
ZL30142GGG  
64 Pin CABGA  
Trays  
Trays  
ZL30142GGG2 64 Pin CABGA*  
*Pb Free Tin/Silver/Copper  
Supports the requirements of Telcordia GR-1244  
Stratum 3 and GR-253, ITU-T G.812, G.813  
-40oC to +85oC  
Supports ITU-T G.823, G.824 and G.8261 for 2048  
kbit/s and 1544 kbit/s interfaces  
Flexible input reference monitoring automatically  
disqualifies references based on frequency and  
phase irregularities  
Meets the SONET/SDH jitter generation  
requirements up to OC-48/STM-16  
Provides automatic reference switching and  
holdover during loss of reference input  
Synchronizes to telecom reference clocks (2 kHz,  
N*8 kHz up to 77.76 MHz, 155.52 MHz) or to  
Ethernet reference clocks (25 MHz, 50 MHz,  
62.5 MHz, 125 MHz)  
Supports master/slave configuration and dynamic  
input to output delay compensation for  
AdvancedTCATM  
Generates standard SONET/SDH clock rates (e.g.,  
19.44 MHz, 38.88 MHz, 77.76 MHz, 155.52 MHz,  
622.08 MHz) or Ethernet clock rates (e.g., 25 MHz,  
50 MHz, 125 MHz, 156.25 MHz, 312.5 MHz) for  
synchronizing Gigabit Ethernet PHYs  
Configurable input to output delay and output to  
output phase alignment  
Applications  
Programmable output synthesizer generates  
telecom clock frequencies from any multiple of  
8 kHz up to 100 MHz  
ITU-T G.8262 System Timing Cards which support  
1 GbE interfaces  
Telcordia GR-253 Carrier Grade SONET/SDH  
Stratum 3 System Timing Cards  
Generates several styles of telecom frame pulses  
with selectable pulse width, polarity and frequency  
Internal state machine automatically controls mode  
of operation (free-run, locked, holdover)  
osci  
osco  
/N1  
SONET/  
Ethernet  
APLL  
ref0  
ref1  
ref2  
diff  
/N2  
ref  
apll_clk  
DPLL  
Programmable  
Synthesizer  
sync0  
sync1  
sync2  
p_clk  
p_fp  
sync  
N*8kHz  
I2C/SPI  
JTAG  
hold  
mode  
lock  
Figure 1 - Functional Block Diagram  
1
Zarlink Semiconductor Inc.  
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.  
Copyright 2009, Zarlink Semiconductor Inc. All Rights Reserved.  
ZL30142  
Short Form Data Sheet  
1.0 High Level Overview  
The ZL30142 SONET/SDH/GbE Stratum 3 System Synchronizer and SETS device is a highly integrated device  
that provides all of the functionality that is required for a central timing card in carrier grade network equipment. The  
basic functions of a central timing card include:  
Input reference monitoring for both frequency accuracy and phase irregularities  
Automatic input reference selection  
Support of both external timing and line timing modes  
Hitless reference switching  
Wander and jitter filtering  
Master/slave crossover for minimizing phase alignment between redundant timing cards  
Independent derived output timing path for support of the SETS functionality  
In a typical application, the main timing path uses the DPLL to synchronize to either an external BITS source or to a  
recovered line timed source. The DPLL monitors the references and automatically selects the best available  
reference based on configurable priority and revertive properties. the DPLL provides the wander filtering function  
and the P0 synthesizer generates a jitter filtered clock and frame pulse for the system timing bus which supplies all  
line cards with a common timing reference.  
B IT S  
A
B IT S  
B
C e n tra l  
T im in g  
C a rd  
C e n tra l  
T im in g  
C a rd  
S
P
P
S
Z L 3 0 1 4 2  
Z L 3 0 1 4 2  
X O V E R  
D P L L  
D P L L  
P
S
1 9 .4 4 M H z  
1 9 .4 4 M H z  
S
P
L in e R e c o v e re d T im in g  
S y s te m T im in g B u s  
T e le c o m  
B a c k p la n e  
S
A
B
P
A
A
B
B
1 9 .4 4 M H z  
1 9 .4 4 M H z  
P ro g  
S y n th  
Z L 3 0 1 4 6  
Z L 3 0 1 4 6  
P ro g  
S y n th  
T x  
T x  
D P L L  
D P L L  
R x  
R x  
D P L L  
D P L L  
A P L L  
A P L L  
6 2 2 .0 8 M H z  
1 5 6 .2 5 M H z  
8
k H z  
2 5 M H z  
P H Y  
P H Y  
O C -1 9 2  
L in e C a rd  
1 0 G b E  
L in e C a rd  
Figure 2 - Typical Application of the ZL30142  
2
Zarlink Semiconductor Inc.  
For more information about all Zarlink products  
visit our Web Site at  
www.zarlink.com  
Information relating to products and services furnished herein by Zarlink Semiconductor Inc. or its subsidiaries (collectively “Zarlink”) is believed to be reliable.  
However, Zarlink assumes no liability for errors that may appear in this publication, or for liability otherwise arising from the application or use of any such  
information, product or service or for any infringement of patents or other intellectual property rights owned by third parties which may result from such application or  
use. Neither the supply of such information or purchase of product or service conveys any license, either express or implied, under patents or other intellectual  
property rights owned by Zarlink or licensed from third parties by Zarlink, whatsoever. Purchasers of products are also hereby notified that the use of product in  
certain ways or in combination with Zarlink, or non-Zarlink furnished goods or services may infringe patents or other intellectual property rights owned by Zarlink.  
This publication is issued to provide information only and (unless agreed by Zarlink in writing) may not be used, applied or reproduced for any purpose nor form part  
of any order or contract nor to be regarded as a representation relating to the products or services concerned. The products, their specifications, services and other  
information appearing in this publication are subject to change by Zarlink without notice. No warranty or guarantee express or implied is made regarding the  
capability, performance or suitability of any product or service. Information concerning possible methods of use is provided as a guide only and does not constitute  
any guarantee that such methods of use will be satisfactory in a specific piece of equipment. It is the user’s responsibility to fully determine the performance and  
suitability of any equipment using such information and to ensure that any publication or data used is up to date and has not been superseded. Manufacturing does  
not necessarily include testing of all functions or parameters. These products are not suitable for use in any medical products whose failure to perform may result in  
significant injury or death to the user. All products and materials are sold and services provided subject to Zarlink’s conditions of sale which are available on request.  
Purchase of Zarlink’s I2C components conveys a license under the Philips I2C Patent rights to use these components in and I2C System, provided that the system  
conforms to the I2C Standard Specification as defined by Philips.  
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trademarks of Zarlink Semiconductor Inc.  
TECHNICAL DOCUMENTATION - NOT FOR RESALE  

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