1ED020I12FTXUMA1

更新时间:2024-12-03 19:14:32
品牌:INFINEON
描述:Half Bridge Based MOSFET Driver, 2A, PDSO16, GREEN, PLASTIC, SOP-16

1ED020I12FTXUMA1 概述

Half Bridge Based MOSFET Driver, 2A, PDSO16, GREEN, PLASTIC, SOP-16 MOSFET 驱动器

1ED020I12FTXUMA1 规格参数

是否Rohs认证: 符合生命周期:Active
包装说明:SOP,Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
Factory Lead Time:18 weeks风险等级:5.63
高边驱动器:YES接口集成电路类型:HALF BRIDGE BASED IGBT DRIVER
JESD-30 代码:R-PDSO-G16长度:10.34 mm
湿度敏感等级:3标称负供电电压:-8 V
功能数量:1端子数量:16
最高工作温度:105 °C最低工作温度:-40 °C
标称输出峰值电流:2 A封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):NOT SPECIFIED
座面最大高度:2.64 mm最大供电电压:5.5 V
最小供电电压:4.5 V标称供电电压:5 V
电源电压1-最大:20 V电源电压1-分钟:13 V
电源电压1-Nom:15 V表面贴装:YES
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED断开时间:2 µs
接通时间:2 µs宽度:7.52 mm
Base Number Matches:1

1ED020I12FTXUMA1 数据手册

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EiceDRIVER™  
1ED020I12-FT  
Single IGBT Driver IC  
Final Data Sheet  
Rev 2.0, 2012-07-31  
Industrial Power Control  
Edition 2012-07-31  
Published by  
Infineon Technologies AG  
81726 Munich, Germany  
© 2012 Infineon Technologies AG  
All Rights Reserved.  
Legal Disclaimer  
The information given in this document shall in no event be regarded as a guarantee of conditions or  
characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any  
information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties  
and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights  
of any third party.  
Information  
For further information on technology, delivery terms and conditions and prices, please contact the nearest  
Infineon Technologies Office (www.infineon.com).  
Warnings  
Due to technical requirements, components may contain dangerous substances. For information on the types in  
question, please contact the nearest Infineon Technologies Office.  
Infineon Technologies components may be used in life-support devices or systems only with the express written  
approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure  
of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support  
devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain  
and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may  
be endangered.  
EiceDRIVER™  
1ED020I12-FT  
Revision History  
Page or Item  
Subjects (major changes since previous revision)  
Rev 2.0, 2012-07-31  
Trademarks of Infineon Technologies AG  
AURIX™, BlueMoon™, C166™, CanPAK™, CIPOS™, CIPURSE™, COMNEON™, EconoPACK™, CoolMOS™,  
CoolSET™, CORECONTROL™, CROSSAVE™, DAVE™, EasyPIM™, EconoBRIDGE™, EconoDUAL™,  
EconoPIM™, EiceDRIVER™, eupec™, FCOS™, HITFET™, HybridPACK™, I²RF™, ISOFACE™, IsoPACK™,  
MIPAQ™, ModSTACK™, my-d™, NovalithIC™, OmniTune™, OptiMOS™, ORIGA™, PRIMARION™,  
PrimePACK™, PrimeSTACK™, PRO-SIL™, PROFET™, RASIC™, ReverSave™, SatRIC™, SIEGET™,  
SINDRION™, SIPMOS™, SMARTi™, SmartLEWIS™, SOLID FLASH™, TEMPFET™, thinQ!™,  
TRENCHSTOP™, TriCore™, X-GOLD™, X-PMU™, XMM™, XPOSYS™.  
Other Trademarks  
Advance Design System™ (ADS) of Agilent Technologies, AMBA™, ARM™, MULTI-ICE™, KEIL™,  
PRIMECELL™, REALVIEW™, THUMB™, µVision™ of ARM Limited, UK. AUTOSAR™ is licensed by AUTOSAR  
development partnership. Bluetooth™ of Bluetooth SIG Inc. CAT-iq™ of DECT Forum. COLOSSUS™,  
FirstGPS™ of Trimble Navigation Ltd. EMV™ of EMVCo, LLC (Visa Holdings Inc.). EPCOS™ of Epcos AG.  
FLEXGO™ of Microsoft Corporation. FlexRay™ is licensed by FlexRay Consortium. HYPERTERMINAL™ of  
Hilgraeve Incorporated. IEC™ of Commission Electrotechnique Internationale. IrDA™ of Infrared Data  
Association Corporation. ISO™ of INTERNATIONAL ORGANIZATION FOR STANDARDIZATION. MATLAB™ of  
MathWorks, Inc. MAXIM™ of Maxim Integrated Products, Inc. MICROTEC™, NUCLEUS™ of Mentor Graphics  
Corporation. Mifare™ of NXP. MIPI™ of MIPI Alliance, Inc. MIPS™ of MIPS Technologies, Inc., USA. muRata™  
of MURATA MANUFACTURING CO., MICROWAVE OFFICE™ (MWO) of Applied Wave Research Inc.,  
OmniVision™ of OmniVision Technologies, Inc. Openwave™ Openwave Systems Inc. RED HAT™ Red Hat, Inc.  
RFMD™ RF Micro Devices, Inc. SIRIUS™ of Sirius Satellite Radio Inc. SOLARIS™ of Sun Microsystems, Inc.  
SPANSION™ of Spansion LLC Ltd. Symbian™ of Symbian Software Limited. TAIYO YUDEN™ of Taiyo Yuden  
Co. TEAKLITE™ of CEVA, Inc. TEKTRONIX™ of Tektronix Inc. TOKO™ of TOKO KABUSHIKI KAISHA TA.  
UNIX™ of X/Open Company Limited. VERILOG™, PALLADIUM™ of Cadence Design Systems, Inc. VLYNQ™  
of Texas Instruments Incorporated. VXWORKS™, WIND RIVER™ of WIND RIVER SYSTEMS, INC. ZETEX™ of  
Diodes Zetex Limited.  
Last Trademarks Update 2010-10-26  
Final Data Sheet  
3
Rev 2.0, 2012-07-31  
EiceDRIVER™  
1ED020I12-FT  
Table of Contents  
Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4  
List of Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5  
List of Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6  
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7  
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9  
1
2
3
3.1  
3.2  
Pin Configuration and Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10  
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10  
Pin Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
4
4.1  
4.2  
4.3  
4.3.1  
4.3.2  
4.3.3  
4.3.4  
4.4  
4.5  
4.6  
4.7  
4.8  
4.8.1  
4.8.2  
4.8.3  
4.9  
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13  
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13  
Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13  
Internal Protection Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14  
Undervoltage Lockout (UVLO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14  
READY Status Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14  
Watchdog Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14  
Active Shut-Down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14  
Non-Inverting and Inverting Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15  
Driver Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15  
Two-Level Turn-Off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15  
Minimal On Time / Off Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16  
External Protection Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16  
Desaturation Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16  
Active Miller Clamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16  
Short Circuit Clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16  
RESET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16  
5
5.1  
5.2  
5.3  
Electrical Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17  
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17  
Operating Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18  
Recommended Operating Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18  
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19  
Voltage Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19  
Logic Input and Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20  
Gate Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21  
Active Miller Clamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21  
Short Circuit Clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22  
Dynamic Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22  
Desaturation Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23  
Active Shut Down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23  
Two-level Turn-off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24  
5.4  
5.4.1  
5.4.2  
5.4.3  
5.4.4  
5.4.5  
5.4.6  
5.4.7  
5.4.8  
5.4.9  
6
7
Timing Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25  
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30  
8
8.1  
8.2  
Application Notes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31  
Reference Layout for Thermal Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31  
Printed Circuit Board Guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31  
Final Data Sheet  
4
Rev 2.0, 2012-07-31  
 
EiceDRIVER™  
1ED020I12-FT  
List of Figures  
Figure 1  
Figure 2  
Figure 3  
Figure 4  
Figure 5  
Figure 6  
Figure 7  
Figure 8  
Figure 9  
Typical Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8  
Block Diagram 1ED020I12-FT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9  
Pin Configuration PG-DSO-16-15 (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10  
Application Example Bipolar Supply. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13  
Application Example Unipolar Supply. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14  
Propagation Delay, Rise and Fall Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25  
Principle Switching Behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25  
Typical Switching Behavior. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25  
DESAT Switch-OFF Behavior. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26  
Figure 10 Short Switch ON Pulses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26  
Figure 11 Short Switch OFF Pulses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27  
Figure 12 Short Switch OFF Pulses, Ringing Surpression . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27  
Figure 13 VCC2 Ramp Up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28  
Figure 14 VCC2 Ramp Down and VCC2 Drop. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28  
Figure 15 Typical TTLSET Time over CTLSET Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29  
Figure 16 PG-DSO-16-15 (Plastic (Green) Dual Small Outline Package) . . . . . . . . . . . . . . . . . . . . . . . . . . . 30  
Figure 17 Reference Layout for Thermal Data (Copper thickness 102 μm) . . . . . . . . . . . . . . . . . . . . . . . . . . 31  
Final Data Sheet  
5
Rev 2.0, 2012-07-31  
EiceDRIVER™  
1ED020I12-FT  
List of Tables  
Table 1  
Table 2  
Table 3  
Table 4  
Table 5  
Table 6  
Table 7  
Table 8  
Table 9  
Table 10  
Table 11  
Table 12  
Table 13  
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10  
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17  
Operating Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18  
Recommended Operating Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18  
Voltage Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19  
Logic Input and Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20  
Gate Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21  
Active Miller Clamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21  
Short Circuit Clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22  
Dynamic Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22  
Desaturation Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23  
Active Shut Down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23  
Two-level Turn-off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24  
Final Data Sheet  
6
Rev 2.0, 2012-07-31  
EiceDRIVER™  
Single IGBT Driver IC  
1ED020I12-FT  
1
Overview  
Main Features  
Single channel isolated IGBT Driver  
For 600 V/1200 V IGBTs  
2 A rail-to-rail output  
Vcesat-detection  
Active Miller Clamp  
Two level turn off  
Product Highlights  
Coreless transformer isolated driver  
Galvanic Insulation  
Integrated protection features  
Suitable for operation at high ambient temperature  
Typical Application  
Inverters for motor drives  
UPS systems  
Welding  
Description  
The 1ED020I12-FT is a galvanic isolated single channel IGBT driver in PG-DSO-16-15 package that provides an  
output current capability of typically 2A.  
All logic pins are 5V CMOS compatible and could be directly connected to a microcontroller.  
The data transfer across galvanic isolation is realized by the integrated Coreless Transformer Technology.  
The 1ED020I12-FT provides several protection features like IGBT two level turn off, desaturation protection, active  
Miller clamping and active shut down.  
Product Name  
Gate Drive Current  
Package  
1ED020I12-FT  
±2 A  
PG-DSO-16-15  
Final Data Sheet  
7
Rev 2.0, 2012-07-31  
EiceDRIVER™  
1ED020I12-FT  
Overview  
Input Side  
VCC1  
Output Side  
VCC2_H  
DESAT  
CLAMP  
OUT  
EiceDRIVERTM  
1ED020I12-FT  
IN+, IN-, /RST  
/FLT, RDY  
TLSET  
GND2  
GND1  
VCC1  
VEE2_H  
VCC2_L  
CPU  
DESAT  
CLAMP  
OUT  
EiceDRIVERTM  
1ED020I12-FT  
IN+, IN-, /RST  
/FLT, RDY  
TLSET  
GND2  
GND1  
VEE2_L  
Figure 1  
Typical Application  
Final Data Sheet  
8
Rev 2.0, 2012-07-31  
EiceDRIVER™  
1ED020I12-FT  
Block Diagram  
2
Block Diagram  
VCC1 15  
IN+ 10  
UVLO  
UVLO  
5
7
VCC2  
&
K4  
2V  
delay  
delay  
CLAMP  
&
TX  
RX  
1
VCC1  
VCC2  
VEE2  
20MHz  
&
IN-  
11  
VCC1  
OSC LOGIC  
6
4
2
OUT  
RDY 12  
/FLT 13  
/RST 14  
&
VCC2  
/RDY  
VEE2  
VCC2  
DECODER RX  
TX ENCODER  
500µA  
1
TLSET  
DESAT  
VCC1  
7V  
&
S
K3  
FLT Q  
FLT2  
Q
S
R
1
9V  
R
VCC1  
1  
RST  
delay  
1
3
GND2  
VEE2  
1ED020I12-FT  
1
9
16  
GND1  
1
8
GND1  
VEE2  
VEE2  
Figure 2  
Block Diagram 1ED020I12-FT  
Final Data Sheet  
9
Rev 2.0, 2012-07-31  
EiceDRIVER™  
1ED020I12-FT  
Pin Configuration and FunctionalityPin Configuration  
3
Pin Configuration and Functionality  
3.1  
Pin Configuration  
Table 1  
Pin Configuration  
Pin No. Name  
Function  
1
VEE2  
DESAT  
GND2  
TLSET  
VCC2  
OUT  
Negative power supply output side  
Desaturation protection  
Signal ground output side  
Two level set  
2
3
4
5
Positive power supply output side  
Driver output  
6
7
CLAMP  
VEE2  
GND1  
IN+  
Miller clamping  
8
Negative power supply output side  
Ground input side  
9
10  
11  
12  
13  
14  
15  
16  
Non inverted driver input  
Inverted driver input  
IN-  
RDY  
Ready output  
/FLT  
Fault output, low active  
Reset input, low active  
Positive power supply input side  
Ground input side  
/RST  
VCC1  
GND1  
VEE2  
GND1  
VCC1  
/RST  
1
2
3
4
5
6
7
8
16  
15  
14  
DESAT  
GND2  
TLSET  
VCC2  
OUT  
/FLT 13  
RDY 12  
IN- 11  
CLAMP  
VEE2  
IN+ 10  
GND1  
9
Figure 3  
Pin Configuration PG-DSO-16-15 (top view)  
Final Data Sheet  
10  
Rev 2.0, 2012-07-31  
EiceDRIVER™  
1ED020I12-FT  
Pin Configuration and FunctionalityPin Functionality  
3.2  
Pin Functionality  
GND1  
Ground connection of the input side.  
IN+ Non Inverting Driver Input  
IN+ control signal for the driver output if IN- is set to low. (The IGBT is on if IN+ = high and IN- = low)  
A minimum pulse width is defined to make the IC robust against glitches at IN+. An internal Pull-Down-Resistor  
ensures IGBT Off-State.  
IN- Inverting Driver Input  
IN- control signal for driver output if IN+ is set to high. (IGBT is on if IN- = low and IN+ = high)  
A minimum pulse width is defined to make the IC robust against glitches at IN-. An internal Pull-Up-Resistor  
ensures IGBT Off-State.  
/RST Reset Input  
Function 1: Enable/shutdown of the input chip. (The IGBT is off if /RST = low). A minimum pulse width is defined  
to make the IC robust against glitches at /RST.  
Function 2: Resets the DESAT-FAULT-state of the chip if /RST is low for a time TRST. An internal Pull-Up-Resistor  
is used to ensure /FLT status output.  
/FLT Fault Output  
Open-drain output to report a desaturation error of the IGBT (/FLT is low if desaturation occurs)  
RDY Ready Status  
Open-drain output to report the correct operation of the device (RDY = high if both chips are above the UVLO level  
and the internal chip transmission is faultless).  
VCC1  
5 V power supply of the input chip  
VEE2  
Negative power supply pins of the output chip. If no negative supply voltage is available, all VEE2 pins have to be  
connected to GND2.  
DESAT Desaturation Detection Input  
Monitoring of the IGBT saturation voltage (VCE) to detect desaturation caused by short circuits. If OUT is high, VCE  
is above a defined value and a certain blanking time has expired, the desaturation protection is activated and the  
IGBT is switched off. The blanking time is adjustable by an external capacitor.  
CLAMP Miller Clamping  
Ties the gate voltage to ground after the IGBT has been switched off at a defined voltage to avoid a parasitic  
switch-on of the IGBT.During turn-off, the gate voltage is monitored and the clamp output is activated when the  
gate voltage goes below 2 V below VEE2.  
Final Data Sheet  
11  
Rev 2.0, 2012-07-31  
EiceDRIVER™  
1ED020I12-FT  
Pin Configuration and FunctionalityPin Functionality  
GND2 Reference Ground  
Reference ground of the output chip.  
OUT Driver Output  
Output pin to drive an IGBT. The voltage is switched between VEE2 and VCC2. In normal operating mode Vout  
is controlled by IN+, IN- and /RST. During error mode (UVLO, internal error or DESAT) Vout is set to VEE2  
independent of the input control signals.  
VCC2  
Positive power supply pin of the output side.  
TLSET Two Level Turn Off Adjust  
Circuitry at TLSET adjust the two level turn off time with an external capacitor to GND2 and the two level voltage  
with an external Zener diode to GND2, for wave forms please see Figure 9.  
Final Data Sheet  
12  
Rev 2.0, 2012-07-31  
EiceDRIVER™  
1ED020I12-FT  
Functional DescriptionIntroduction  
4
Functional Description  
4.1  
Introduction  
The 1ED020I12-FT is an advanced IGBT gate driver for motor drives typical greater 10 kW. Control and protection  
functions are included to make possible the design of high reliability systems.  
The device consists of two galvanic separated parts. The input chip can be directly connected to a standard 5 V  
DSP or microcontroller with CMOS in/output and the output chip is connected to the high voltage side.  
An effective active Miller clamp function avoids the need of negative gate driving in some applications and allows  
the use of a simple bootstrap supply for the high side driver.  
A rail-to-rail driver output enables the user to provide easy clamping of the IGBTs gate voltage during short circuit  
of the IGBT. So an increase of short circuit current due to the feedback via the Miller capacitance can be avoided.  
Further, a rail-to-rail output reduces power dissipation.  
The device also includes an IGBT desaturation protection with a /FAULT status output.  
A two-level turn-off feature with adjustable delay protects against excessive overvoltage at turn-off in case of  
overcurrent or short circuit condition. The same delay is applied at turn-on to prevent pulse width distortion.  
A READY status output reports if the device is supplied and operates correctly.  
+5V  
+15V  
VCC1  
GND1  
VCC2  
100n  
1µ  
1k  
DESAT  
SGND  
IN+  
CLAMP  
OUT  
10R  
IN+  
TLSET  
GND2  
VEE2  
IN-  
10V  
47p  
220p  
RDY  
FLT  
RST  
RDY  
/FLT  
/RST  
1µ  
-8V  
Figure 4  
Application Example Bipolar Supply  
4.2  
Supply  
The driver 1ED020I12-FT is designed to support two different supply configurations, bipolar supply and unipolar  
supply.  
In bipolar supply the driver is typically supplied with a positive voltage of 15V at VCC2 and a negative voltage of  
-8V at VEE2, refer to Figure 4. Negative supply prevents a dynamic turn on due to the additional charge which  
is generated from IGBT input capacitance times negative supply voltage. If an appropriate negative supply voltage  
is used, connecting CLAMP to IGBT gate is redundant and therefore typically not necessary.  
For unipolar supply configuration the driver is typically supplied with a positive voltage of 15V at VCC2. Erratically  
dynamic turn on of the IGBT could be prevented with active Miller clamp function, so CLAMP output is directly  
connected to IGBT gate, refer to Figure 5.  
Final Data Sheet  
13  
Rev 2.0, 2012-07-31  
 
EiceDRIVER™  
1ED020I12-FT  
Functional DescriptionInternal Protection Features  
+5V  
+15V  
VCC1  
GND1  
VCC2  
1µ  
100n  
1k  
DESAT  
SGND  
IN+  
CLAMP  
OUT  
10R  
IN+  
TLSET  
GND2  
VEE2  
IN-  
10V  
47p  
220p  
RDY  
FLT  
RST  
RDY  
/FLT  
/RST  
Figure 5  
Application Example Unipolar Supply  
4.3  
Internal Protection Features  
4.3.1  
Undervoltage Lockout (UVLO)  
To ensure correct switching of IGBTs the device is equipped with an undervoltage lockout for both chips, refer to  
Figure 13 and Figure 14.  
If the power supply voltage VVCC1 of the input chip drops below VUVLOL1 a turn-off signal is sent to the output chip  
before power-down. The IGBT is switched off and the signals at IN+ and IN- are ignored as long as VVCC1 reaches  
the power-up voltage VUVLOH1  
.
If the power supply voltage VVCC2 of the output chip goes down below VUVLOL2 the IGBT is switched off and signals  
from the input chip are ignored as long as VVCC2 reaches the power-up voltage VUVLOH2. VEE2 is not monitored,  
otherwise negative supply voltage range from 0 V to -12 V would not be possible.  
4.3.2  
READY Status Output  
The READY output at pin /RDY shows the status of three internal protection features.  
UVLO of the input chip  
UVLO of the output chip after a short delay  
Internal signal transmission after a short delay  
It is not necessary to reset the READY signal since its state only depends on the status of the former mentioned  
protection signals.  
4.3.3  
Watchdog Timer  
During normal operation the internal signal transmission is monitored by a watchdog timer. If the transmission fails  
for a given time, the IGBT is switched off and the READY output reports an internal error.  
4.3.4  
Active Shut-Down  
The Active Shut-Down feature ensures a safe IGBT off-state if the output chip is not connected to the power  
supply, IGBT gate is clamped at OUT to VEE2.  
Final Data Sheet  
14  
Rev 2.0, 2012-07-31  
EiceDRIVER™  
1ED020I12-FT  
Functional DescriptionNon-Inverting and Inverting Inputs  
4.4  
Non-Inverting and Inverting Inputs  
There are two possible input modes to control the IGBT. At non-inverting mode IN+ controls the driver output while  
IN- is set to low. At inverting mode IN- controls the driver output while IN+ is set to high, refer to Figure 7. A  
minimum input pulse width is defined to filter occasional glitches.  
4.5  
Driver Output  
The output driver section uses only MOSFETs to provide a rail-to-rail output. This feature permits that tight control  
of gate voltage during on-state and short circuit can be maintained as long as the drivers supply is stable. Due to  
the low internal voltage drop, switching behaviour of the IGBT is predominantly governed by the gate resistor.  
Furthermore, it reduces the power to be dissipated by the driver.  
4.6  
Two-Level Turn-Off  
The Two-Level Turn-OFF introduces a second turn off voltage level at the driver output in between ON- and OFF-  
level, refer to Figure 8. This additional level ensures lower VCE overshoots at turn off by reducing gate emitter  
voltage of the IGBT at short circuits or over current events. The VGE level is adjusting the current of the IGBT at  
the end two level turn off interval, the required timing is depending on stray inductance and over current at  
beginning of two level turn off interval.  
Reference voltage level and hold up time could be adjusted at TLSET pin. The reference voltage is set by the  
required Zener diode connected between pin TLSET and GND2. The holdup time is set by the capacitor connected  
to the same pin TLSET and GND2.  
The hold time can be adjusted during switch on using the whole capacitance connected at pin TLSET including  
capacitor, parasitic wiring capacitance and junction capacitance of Zener diode. When a switch on signal is given  
the IC starts to discharge CTLSET. Discharging CTLSET is stopped after 500 ns. Then Ctlset is charged with an  
internal charge current ITLSET. When the voltage of the capacitor CTLSET exceeds 7 V a second current source starts  
charging CTLSET up to VZDIODE. At the end of this discharge-charge cycle the gate driver is switched on.  
The time between IN initiated switch-on signal (minus an internal propagation delay of approximately 200 ns) and  
switch-on of the gate drive is sampled and stored digitally. It represents the two level turn off set time TTLSET during  
switch-off. Due to digitalization the tpdon time can vary in time steps of 50 ns.  
If switch off is initiated from IN+, IN- or /RST signal, the gate driver is switched off immediately after internal  
propagation delay of approximately 200 ns and VOUT begins to decrease to the second gate voltage level.  
For switch off initiated by DESAT, the gate driver switch off is delayed by desaturation sense to OUT delay,  
afterwards VOUT begins to decrease to the second gate voltage level.  
For reaching second gate voltage level the output voltage VOUT is sensed and compared with the Zener voltage  
V
ZDIODE. When VOUT falls below the reference voltage VZDIODE of the Zener diode the switch off process is  
interrupted and VOUT is adjusted to VZDIODE. OUT is switched to VEE2 after the holdup time has passed.  
The Two-Level Turn-OFF function cannot be disabled.  
Final Data Sheet  
15  
Rev 2.0, 2012-07-31  
EiceDRIVER™  
1ED020I12-FT  
Functional DescriptionMinimal On Time / Off Time  
4.7  
Minimal On Time / Off Time  
The 1ED020I12-FT driver requires minimal on and off time for proper operation in the application. Minimal on time  
must be greater than the adjustable two level plateau time TTLSET, shorter on times will be suppressed by  
generating of the plateau time refer to Figure 10. Due to the short on time, the voltage at TLSET pin does not  
reach the comparator threshold; therefore the driver does not turn on. A similar principle takes place for off time.  
Minimal off time must be greater than TTLSET; shorter off times will be suppressed, which means OUT stays on  
refer to Figure 11. A two level turn off plateau cannot be shortened by the driver. If the driver has entered the turn  
off sequence it cannot switch off due to the fact, that the driver has already entered the shut off mode. But if the  
driver input signal is turned on again, it will leave the lower level after TTLSET time by switching OUT to high, refer  
to Figure 12.  
4.8  
External Protection Features  
4.8.1  
Desaturation Protection  
A desaturation protection ensures the protection of the IGBT at short circuit. When the DESAT voltage goes up  
and reaches 9 V, the output is driven low, refer to Figure 9. Further, the FAULT output is activated. A  
programmable blanking time is used to allow enough time for IGBT saturation. Blanking time is provided by a  
highly precise internal current source and an external capacitor.  
4.8.2  
Active Miller Clamp  
In a half bridge configuration the switched off IGBT tends to dynamically turn on during turn on phase of the  
opposite IGBT. A Miller clamp allows sinking the Miller current across a low impedance path in this high dV/dt  
situation. Therefore in many applications, the use of a negative supply voltage can be avoided.  
During turn-off, the gate voltage is monitored and the clamp output is activated when the gate voltage goes below  
typical 2 V (related to VEE2). The clamp is designed for a Miller current up to 2 A.  
4.8.3  
Short Circuit Clamping  
During short circuit the IGBTs gate voltage tends to rise because of the feedback via the Miller capacitance. An  
additional protection circuit connected to OUT and CLAMP limits this voltage to a value slightly higher than the  
supply voltage. A current of maximum 500 mA for 10 μs may be fed back to the supply through one of this paths.  
If higher currents are expected or a tighter clamping is desired external Schottky diodes may be added.  
4.9  
RESET  
The reset input has two functions.  
Firstly, /RST is in charge of setting back the FAULT output. If /RST is low longer than a given time, /FLT will be  
cleared at the rising edge of /RST, refer to Figure 9; otherwise, it will remain unchanged. Moreover, it works as  
enable/shutdown of the input logic, refer to Figure 7.  
Final Data Sheet  
16  
Rev 2.0, 2012-07-31  
EiceDRIVER™  
1ED020I12-FT  
Electrical ParametersAbsolute Maximum Ratings  
5
Electrical Parameters  
5.1  
Absolute Maximum Ratings  
Note:Absolute maximum ratings are defined as ratings, which when being exceeded may lead to destruction of  
the integrated circuit. Unless otherwise noted all parameters refer to GND1.  
Table 2  
Absolute Maximum Ratings  
Parameter  
Symbol  
Values  
Max.  
Unit  
Note /  
Test Condition  
Min.  
-0.3  
-12  
1)  
Positive power supply output side  
VVCC2  
VVEE2  
Vmax2  
20  
0.3  
28  
V
V
V
1)  
Negative power supply output side  
Maximum power supply voltage output side  
(VVCC2 - VVEE2  
)
Gate driver output  
VOUT  
IOUT  
IOUT  
V
VEE2-0.3 Vmax2+0.3 V  
Gate driver high output maximum current  
2.4  
2.4  
A
A
t = 2 µs  
t = 2 µs  
Gate & Clamp driver low output maximum  
current  
Maximum short circuit clamping time  
tCLP  
10  
μs  
ICLAMP/OUT =  
500 mA  
Positive power supply input side  
VVCC1  
-0.3  
-0.3  
6.5  
6.5  
V
V
Logic input voltages  
(IN+,IN-,RST)  
VLogicIN  
Opendrain Logic output voltage (FLT)  
Opendrain Logic output voltage (RDY)  
Opendrain Logic output current (FLT)  
Opendrain Logic output current (RDY)  
Pin DESAT voltage  
VFLT#  
VRDY  
IFLT#  
-0.3  
-0.3  
6.5  
6.5  
10  
V
V
mA  
mA  
V
IRDY  
10  
1)  
VDESAT  
-0.3  
VVCC2  
+0.3  
3)  
Pin CLAMP voltage  
VCLAMP  
-0.3  
VVCC2  
V
+0.32)  
Input to output isolation voltage (GND2)  
Junction temperature  
VISO  
-1200  
1200  
150  
150  
100  
700  
160  
125  
1.5  
V
TJ  
-40  
-55  
°C  
Storage temperature  
TS  
°C  
Power dissipation, per input part  
Power dissipation, per output part  
Thermal resistance (Input part)  
Thermal resistance (Output chip active)  
ESD Capability  
PD, IN  
PD, OUT  
RTHJA,IN  
RTHJA,OUT  
VESD  
mW  
mW  
K/W  
K/W  
kV  
4) @TA = 25°C  
4) @TA = 25°C  
4) @TA = 25°C  
4) @TA = 25°C  
Human Body  
Model5)  
1) With respect to GND2.  
Final Data Sheet  
17  
Rev 2.0, 2012-07-31  
 
 
EiceDRIVER™  
1ED020I12-FT  
Electrical ParametersOperating Parameters  
2) May be exceeded during short circuit clamping.  
3) With respect to VEE2.  
4) Output IC power dissipation is derated linearly at 10 mW/°C above 62°C. Input IC power dissipation does not require  
derating. See Figure 17 for reference layouts for these thermal data. Thermal performance may change significantly with  
layout and heat dissipation of components in close proximity.  
5) According to EIA/JESD22-A114-B (discharging a 100 pF capacitor through a 1.5 kseries resistor).  
5.2  
Operating Parameters  
Note:Within the operating range the IC operates as described in the functional description. Unless otherwise  
noted all parameters refer to GND1.  
Table 3  
Operating Parameters  
Parameter  
Symbol  
Values  
Max.  
Unit  
Note /  
Test Condition  
Min.  
13  
1)  
Positive power supply output side  
VVCC2  
VVEE2  
Vmax2  
20  
0
V
V
V
1)  
Negative power supply output side  
-12  
Maximum power supply voltage output side  
28  
(VVCC2 - VVEE2  
)
Positive power supply input side  
VVCC1  
4.5  
5.5  
5.5  
V
V
Logic input voltages  
(IN+,IN-,RST)  
VLogicIN  
-0.3  
2)  
Pin CLAMP voltage  
Pin DESAT voltage  
Pin TLSET voltage  
Ambient temperature  
VCLAMP  
VDESAT  
VTLSET  
TA  
V
VEE2-0.3 VVCC2  
V
1)  
-0.3  
-0.3  
-40  
VVCC2  
VVCC2  
105  
V
1)  
V
°C  
kV/μs  
Common mode transient immunity3)  
|DVISO/dt|  
50  
@ 500 V  
1) With respect to GND2.  
2) May be exceeded during short circuit clamping.  
3) The parameter is not subject to production test - verified by design/characterization  
5.3  
Recommended Operating Parameters  
Note:Unless otherwise noted all parameters refer to GND1.  
Table 4  
Recommended Operating Parameters  
Symbol  
Parameter  
Value  
15  
Unit  
V
Note / Test Condition  
1)  
Positive power supply output side  
Negative power supply output side  
VVCC2  
1)  
VVEE2  
VVCC1  
-8  
V
Positive power supply input side  
1) With respect to GND2.  
5
V
Final Data Sheet  
18  
Rev 2.0, 2012-07-31  
 
 
EiceDRIVER™  
1ED020I12-FT  
Electrical ParametersElectrical Characteristics  
5.4  
Electrical Characteristics  
Note:The electrical characteristics include the spread of values in supply voltages, load and junction temperatures  
given below. Typical values represent the median values at TA = 25°C. Unless otherwise noted all voltages  
are given with respect to their respective GND (GND1 for pins 9 to 16, GND2 for pins 1 to 8).  
5.4.1  
Voltage Supply  
Table 5  
Voltage Supply  
Parameter  
Symbol  
Values  
Typ.  
4.1  
Unit  
Note / Test Condition  
Min.  
Max.  
4.3  
UVLO Threshold Input Chip  
VUVLOH1  
VUVLOL1  
VHYS1  
V
V
V
3.5  
0.15  
3.8  
UVLO Hysteresis Input Chip  
(VUVLOH1 - VUVLOL1  
)
UVLO Threshold Output Chip VUVLOH2  
VUVLOL2  
12.0  
11.0  
0.9  
12.6  
V
V
V
10.4  
0.7  
UVLO Hysteresis Output Chip VHYS2  
(VUVLOH1 - VUVLOL1  
)
Quiescent Current Input Chip IQ1  
7
9
mA  
VVCC1 =5 V  
IN+ = High,  
IN- = Low  
=>OUT = High,  
RDY = High,  
/FLT = High  
Quiescent Current Output Chip IQ2  
4.5  
6
mA  
V
V
VCC2 =15 V  
VEE2 =-8 V  
IN+ = High,  
IN- = Low  
=>OUT = High,  
RDY = High,  
/FLT = High  
Final Data Sheet  
19  
Rev 2.0, 2012-07-31  
EiceDRIVER™  
1ED020I12-FT  
Electrical ParametersElectrical Characteristics  
5.4.2  
Logic Input and Output  
Table 6  
Logic Input and Output  
Symbol  
Parameter  
Values  
Typ.  
Unit  
Note /  
Test Condition  
Min.  
Max.  
IN+,IN-, RST Low Input Voltage VIN+L  
VIN-L  
VRSTL#  
IN+,IN-, RST High Input Voltage VIN+H  
VIN-H  
,
,
1.5  
V
,
,
3.5  
V
VRSTH#  
IN-, RST Input Current  
IIN-, IRST#  
-400  
-100  
μA  
V
V
IN- = GND1  
RST# = GND1  
IN+ Input Current  
IIN+  
,
100  
400  
μA  
μA  
V
IN+ = VCC1  
RDY,FLT Pull Up Current  
I
PRDY, IPFLT# -400  
-100  
V
V
RDY = GND1  
FLT# = GND1  
Input Pulse Suppression IN+,  
IN-  
TMININ+  
TMININ-  
,
30  
40  
40  
ns  
ns  
ns  
Input Pulse Suppression RST  
for ENABLE/SHUTDOWN  
TMINRST  
30  
Pulse Width RST  
for Reseting FLT  
TRST  
800  
FLT Low Voltage  
RDY Low Voltage  
VFLTL  
300  
300  
mV  
mV  
I
I
SINK(FLT#) = 5 mA  
SINK(RDY) = 5 mA  
VRDYL  
Final Data Sheet  
20  
Rev 2.0, 2012-07-31  
EiceDRIVER™  
1ED020I12-FT  
Electrical ParametersElectrical Characteristics  
5.4.3  
Gate Driver  
Table 7  
Gate Driver  
Parameter  
Symbol  
Values  
Typ.  
Unit  
Note / Test Condition  
Min.  
Max.  
High Level Output  
Voltage  
VOUTH1  
VOUTH2  
VOUTH3  
VOUTH4  
V
V
V
VCC2-1.2  
V
V
V
V
VCC2-0.8  
VCC2-2.0  
VCC2-5  
V
V
V
V
A
I
I
I
I
OUTH = -20 mA  
OUTH = -200 mA  
OUTH = -1 A  
VCC2-2.5  
VCC2-9  
VCC2-10  
OUTH = -2 A  
High Level Output Peak IOUTH  
Current  
-1.5  
-2.0  
IN+ = High, IN- = Low;  
OUT = High  
Low Level Output  
Voltage  
VOUTL1  
VOUTL2  
VOUTL3  
VOUTL4  
V
V
V
V
VEE2+0.04  
V
V
V
VEE2+0.09  
V
V
V
V
A
I
I
I
I
OUTL = 20 mA  
OUTL = 200 mA  
OUTL = 1 A  
VEE2+0.3  
VEE2+2.1  
VEE2+7  
VEE2+0.85  
VEE2+5.0  
OUTL = 2 A  
Low Level Output Peak IOUTL  
Current  
1.5  
2.0  
IN+ = Low, IN- = Low;  
OUT = Low,  
V
V
VCC2 =15 V,  
VEE2 =-8 V  
5.4.4  
Active Miller Clamp  
Table 8  
Active Miller Clamp  
Symbol  
Parameter  
Values  
Typ.  
Unit  
Note / Test Condition  
Min.  
Max.  
Low Level Clamp  
Voltage  
VCLAMPL1  
VCLAMPL2  
VCLAMPL3  
ICLAMPL  
2
V
V
V
VEE2+0.03  
V
V
V
VEE2 +0.08 V  
I
I
I
OUTL = 20 mA  
OUTL = 200 mA  
OUTL = 1 A  
VEE2+0.3  
VEE2+1.9  
VEE2 +0.8  
VEE2 +4.8  
V
V
A
1)  
Low Level Clamp  
Current  
Clamp Threshold  
Voltage  
VCLAMP  
1.6  
2.1  
2.4  
V
Related to VEE2  
1) The parameter is not subject to production test - verified by design/characterization  
Final Data Sheet  
21  
Rev 2.0, 2012-07-31  
EiceDRIVER™  
1ED020I12-FT  
Electrical ParametersElectrical Characteristics  
5.4.5  
Short Circuit Clamping  
Table 9  
Short Circuit Clamping  
Symbol  
Parameter  
Values  
Typ.  
Unit  
Note / Test Condition  
Min.  
Max.  
Clamping voltage (OUT)  
(VOUT-VVCC2  
VCLPout  
0.8  
1.3  
0.7  
1.3  
V
IN+=High, IN- = Low,  
OUT = High  
)
I
OUT = 500 mA  
(pulse test,  
CLPmax = 10 μs)  
t
Clamping voltage  
(CLAMP) (VVCLAMP-VVCC2  
VCLPclamp  
V
V
IN+ = High, IN- = Low,  
OUT = High  
)
I
CLAMP = 500 mA  
(pulse test,  
CLPmax = 10 μs)  
t
Clamping voltage (CLAMP) VCLPclamp  
1.1  
IN+ = High, IN- = Low,  
OUT = High  
I
CLAMP = 20 mA  
5.4.6  
Dynamic Characteristics  
Dynamic characteristics are measured with VVCC1 = 5 V VCC2 = 15 V and VVEE2 = -8 V.  
Table 10  
Dynamic Characteristics  
Symbol  
Parameter  
Values  
Typ.  
Unit  
Note / Test Condition  
Min.  
Max.  
IN+, IN- input to output  
propagation delay ON and  
OFF  
TPDON  
1.5  
1.75  
-10  
2.0  
μs  
C
C
TLSET = 0, TA = 25°C  
TLSET = 0, TA = 25°C  
IN+, IN- input to output  
propagation delay distortion  
TPDISTO  
TPDONt  
TPDOFFt  
TPDISTOt  
-40  
20  
ns  
ns  
ns  
ns  
(TPDOFF-TPDON  
)
IN+, IN- input to output  
propagation delay ON  
variation due to temp  
200  
230  
25  
1)CTLSET = 0  
1)CTLSET = 0  
1)CTLSET =0  
IN+, IN- input to output  
propagation delay OFF  
variation due to temp  
IN+, IN- input to output  
propagation delay distortion  
variation due to temp  
(TPDOFF-TPDON  
)
Rise Time  
TRISE  
10  
30  
60  
ns  
ns  
C
LOAD = 1 nF,  
VL 10%, VH 90%  
LOAD = 34 nF  
VL 10%, VH 90%  
150  
400  
800  
C
Final Data Sheet  
22  
Rev 2.0, 2012-07-31  
 
EiceDRIVER™  
1ED020I12-FT  
Electrical ParametersElectrical Characteristics  
Table 10  
Dynamic Characteristics (cont’d)  
Parameter  
Symbol  
Min.  
Values  
Typ.  
Unit  
Note / Test Condition  
Max.  
Fall Time  
TFALL  
10  
20  
40  
ns  
ns  
C
LOAD = 1 nF  
VL 10%, VH 90%  
CLOAD = 34 nF  
100  
250  
500  
VL 10%, VH 90%  
1) The parameter is not subject to production test - verified by design/characterization  
5.4.7  
Desaturation Protection  
Table 11  
Desaturation Protection  
Symbol  
Parameter  
Values  
Typ.  
Unit  
Note / Test Condition  
Min.  
Max.  
Blanking Capacitor Charge IDESATC  
Current  
450  
500  
550  
μA  
V
V
V
VCC2 =15 V,  
VEE2 =-8 V  
DESAT = 2 V  
Blanking Capacitor  
Discharge Current  
IDESATD  
11  
15  
mA  
V
V
V
VCC2 =15 V,  
VEE2 =-8 V  
DESAT =6 V  
Desaturation Reference  
Level  
VDESAT  
8.5  
9
9.5  
V
V
VCC2 =15 V  
Desaturation Sense to OUT TDESATOUT  
TLTO  
250  
320  
2.25  
110  
ns  
μs  
mV  
V
OUT =90%  
C
LOAD = 1 nF  
FLT #=10%;  
IFLT #=5 mA  
Desaturation Sense to FLT TDESATFLT  
Low Delay  
V
Desaturation Low Voltage  
VDESATL  
40  
70  
IN+=Low, IN-=Low,  
OUT=Low  
5.4.8  
Active Shut Down  
Table 12  
Active Shut Down  
Parameter  
Symbol  
Values  
Typ.  
Unit  
Note /  
Test Condition  
Min.  
Max.  
1)  
Active Shut Down Voltage  
1) With reference to VEE2  
VACTSD  
2.0  
V
I
V
OUT = -200 mA,  
CC2 open  
Final Data Sheet  
23  
Rev 2.0, 2012-07-31  
EiceDRIVER™  
1ED020I12-FT  
Electrical ParametersElectrical Characteristics  
5.4.9  
Two-level Turn-off  
Table 13  
Two-level Turn-off  
Parameter  
Symbol  
Values  
Typ.  
Unit  
Note /  
Test Condition  
Min.  
Max.  
External reference voltage range VZDIODE  
7.5  
VCC2-0.5  
V
(Zener-Diode)  
Reference Voltage for setting  
two-level delay time  
VTLSET  
ITLSET  
6.6  
7
7.3  
550  
V
Current for setting two-level  
delay time and external  
420  
500  
μA  
V
TLSET = 10 V  
reference voltage (Zener-Diode)  
External Capacitance Range  
CTLSET  
0
220  
pF  
Final Data Sheet  
24  
Rev 2.0, 2012-07-31  
EiceDRIVER™  
1ED020I12-FT  
Timing DiagramsElectrical Characteristics  
6
Timing Diagrams  
All diagrams related to the Two-level switch-off feature  
50%  
IN+  
90%  
10%  
50%  
OUT  
TRISE  
TFALL  
TPDON  
TPDOFF  
Figure 6  
Propagation Delay, Rise and Fall Time  
IN+  
IN-  
/RST  
OUT  
Figure 7  
Principle Switching Behavior  
IN+  
VZDIODE  
VTLSET , typ. 7V  
TLSET  
TADJ1  
TTLSET  
TPD  
VZDIODE  
TPD  
TTLFALL  
OUT  
TPDONADJ  
TTLSET  
Figure 8  
Typical Switching Behavior  
Final Data Sheet  
25  
Rev 2.0, 2012-07-31  
EiceDRIVER™  
1ED020I12-FT  
Timing DiagramsElectrical Characteristics  
IN+  
TPDON  
TTLSET  
TTLSET  
OUT  
TDESATOUT  
TDESATOUT  
VDESAT typ. 9V  
DESAT  
/FLT  
TDESATFLT  
TDESATFLT  
/RST  
>TRSTmin  
Figure 9  
DESAT Switch-OFF Behavior  
IN+  
TLSET  
OUT  
TPD  
TPD  
TTLSET  
TTLSET  
TTLSET  
TPDON  
TPDON  
TPDOFF  
Figure 10 Short Switch ON Pulses  
Final Data Sheet  
26  
Rev 2.0, 2012-07-31  
EiceDRIVER™  
1ED020I12-FT  
Timing DiagramsElectrical Characteristics  
IN+  
TTLSET  
TTLSET  
TTLSET  
TLSET  
TPD  
TPD  
TPDON  
TPDOFF  
TPDON  
TPDOFF  
TPDOFF  
OUT  
Figure 11 Short Switch OFF Pulses  
IN+  
TLSET  
TPD  
TTLSET  
TTLSET  
TTLSET  
TTLSET  
TPD  
TPDON  
TPDOFF  
TPDOFF  
TPDOFF  
TPDON  
OUT  
forced turn off after three  
consecutive on -cycles  
Figure 12 Short Switch OFF Pulses, Ringing Surpression  
Final Data Sheet  
27  
Rev 2.0, 2012-07-31  
EiceDRIVER™  
1ED020I12-FT  
Timing DiagramsElectrical Characteristics  
VUVLOH2  
VCC2  
IN+  
TPDON  
TPDOFF  
OUT  
IDESAT  
RDY  
Figure 13 VCC2 Ramp Up  
VUVLOH2  
VUVLOL2  
VCC2  
TPDD  
TPDD  
TPDD  
IN+  
TTLSET  
TLSET  
Vz  
TPDON  
OUT  
RDY  
/FLT  
Figure 14 VCC2 Ramp Down and VCC2 Drop  
Final Data Sheet  
28  
Rev 2.0, 2012-07-31  
EiceDRIVER™  
1ED020I12-FT  
Timing DiagramsElectrical Characteristics  
5
4
3
2
1
0
0
50  
100  
150  
200  
CTLSET [pF]  
Figure 15 Typical TTLSET Time over CTLSET Capacitance  
Final Data Sheet  
29  
Rev 2.0, 2012-07-31  
EiceDRIVER™  
1ED020I12-FT  
Package OutlinesElectrical Characteristics  
7
Package Outlines  
DOCUMENT NO.  
Z8B00166131  
0
SCALE  
1.0  
0
1.0  
MILLIMETERS  
INCHES  
DIM  
MIN  
-
MAX  
2.64  
0.29  
0.48  
0.32  
10.47  
10.41  
7.59  
MIN  
-
MAX  
0.104  
0.011  
0.019  
0.013  
0.412  
0.410  
0.299  
2mm  
A
A1  
b
c
D
E
E1  
e
N
L
h
0.12  
0.35  
0.23  
10.21  
10.16  
7.42  
1.27 BSC  
16  
0.005  
0.014  
0.009  
0.402  
0.400  
0.292  
EUROPEAN PROJECTION  
0.050 BSC  
16  
ISSUE DATE  
31.07.2012  
0.61  
0.25  
0°  
1.02  
0.41  
8°  
0.024  
0.010  
0°  
0.040  
0.016  
8°  
REVISION  
02  
Figure 16 PG-DSO-16-15 (Plastic (Green) Dual Small Outline Package)  
Final Data Sheet 30  
Rev 2.0, 2012-07-31  
EiceDRIVER™  
1ED020I12-FT  
Application NotesReference Layout for Thermal Data  
8
Application Notes  
8.1  
Reference Layout for Thermal Data  
The PCB layout shown in Figure 17 represents the reference layout used for the thermal characterisation. Pins 9  
and 16 (GND1) and pins 1 and 8 (VEE2) require ground plane connections for achiving maximum power  
dissipation. The 1ED020I12-FT is conceived to dissipate most of the heat generated through this pins.  
Top Layer  
Bottom Layer  
Figure 17 Reference Layout for Thermal Data (Copper thickness 102 μm)  
8.2  
Printed Circuit Board Guidelines  
Following factors should be taken into account for an optimum PCB layout.  
Sufficient spacing should be kept between high voltage isolated side and low voltage side circuits.  
The same minimum distance between two adjacent high-side isolated parts of the PCB should be maintained  
to increase the effective isolation and reduce parasitic coupling.  
In order to ensure low supply ripple and clean switching signals, bypass capacitor trace lengths should be kept  
as short as possible.  
Lowest trace length for VEE2 to GND2 decoupling could be achieved with capacitor closed to pins 1 and 3.  
Final Data Sheet  
31  
Rev 2.0, 2012-07-31  
 
w w w . i n f i n e o n . c o m  
Published by Infineon Technologies AG  

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