首页 > MAX801L-MAX808N

MAX801L-MAX808N

更新时间：2025-07-10 01:49:41
品牌：MAXIM
描述：8-Pin レP Supervisory Circuits with 【1.5eset Accuracy

PDF下载

中文翻译

免费 PCB/SMT

MAX801L-MAX808N 概述

8-Pin レP Supervisory Circuits with 【1.5eset Accuracy 8引脚レP监控电路，带有【 1.5eset精度

MAX801L-MAX808N 数据手册

通过下载MAX801L-MAX808N数据手册来全面了解它。这个PDF文档包含了所有必要的细节，如产品概述、功能特性、引脚定义、引脚排列图等信息。

PDF下载
19-1086; Rev 0; 6/96  
8 -P in µP S u p e rvis o ry Circ u it s  
w it h ±1 .5 % Re s e t Ac c u ra c y  
1,AX08LM/N  
_______________Ge n e ra l De s c rip t io n  
____________________________Fe a t u re s  
The MAX801/MAX808 microprocessor (µP) supervisory  
circuits monitor and control the activities of +5V µPs by  
providing backup-battery switchover, low-line indica-  
tion, and µP reset. Additional features include a watch-  
dog for the MAX801 and CMOS RAM write protection  
for the MAX808.  
♦ Precision Voltage Monitoring, ±1.5% Reset  
Accuracy  
♦ 200ms Power-OK/Reset Time Delay  
♦ RESET Output (MAX808)  
RESET and RESET Outputs (MAX801)  
♦ Watchdog Timer (MAX801)  
The MAX801/MAX808 offer a choice of reset-threshold  
voltage (denoted by suffix letter): 4.675V (L), 4.575V  
(N), and 4.425V (M). These devices are available in  
8-pin DIP and SO packages.  
♦ On-Board Gating of Chip-Enable Signals (MAX808):  
Memory Write-Cycle Completion  
3ns CE Gate Propagation Delay  
♦ 1µA Standby Current  
♦ Power Switching:  
________________________Ap p lic a t io n s  
Computers  
250mA in V  
Mode  
CC  
20mA in Battery-Backup Mode  
Controllers  
♦ MaxCap™/SuperCap™ Compatible  
Intelligent Instruments  
♦ RESET Guaranteed Valid to V  
= 1V  
CC  
♦ Low-Line Threshold 52mV Above Reset  
Threshold  
Critical µP Power Monitoring  
Portable/Battery-Powered Equipment  
Embedded Systems  
MaxCap is a trademark of The Carborundum Corp.  
SuperCap is a trademark of Baknor Industries.  
______________Ord e rin g In fo rm a t io n  
Pin Configurations appear at end of data sheet.  
PART*  
TEMP. RANGE  
0°C to +70°C  
PIN-PACKAGE  
8 Plastic DIP  
8 SO  
MAX801_CPA  
MAX801_CSA  
MAX801_EPA  
MAX801_ESA  
MAX801_MJA  
MAX808_CPA  
MAX808_CSA  
MAX808_EPA  
MAX808_ESA  
MAX808_MJA  
0°C to +70°C  
__________Typ ic a l Op e ra t in g Circ u it  
-40°C to +85°C  
-40°C to +85°C  
-55°C to +125°C  
0°C to +70°C  
8 Plastic DIP  
8 SO  
+5V  
8 CERDIP**  
8 Plastic DIP  
8 SO  
0.1µF  
0.1µF  
0°C to +70°C  
-40°C to +85°C  
-40°C to +85°C  
-55°C to +125°C  
8 Plastic DIP  
8 SO  
OUT  
V
CC  
POWER FOR  
µP  
CMOS RAM POWER  
8 CERDIP**  
NMI  
BATT  
LOWLINE  
RESET  
* These parts offer a choice of reset threshold voltage. From the  
table below, select the suffix corresponding to the desired  
threshold and insert it into the blank to complete the part number.  
**Contact factory for availability and processing to MIL-STD-883.  
0.1µF  
RESET  
µP SYSTEM  
MAX808  
RESET THRESHOLD (V)  
SUFFIX  
FROM I/O SYSTEM OR  
ADDRESS DECODER  
CE IN  
MIN  
4.60  
4.50  
4.35  
TYP  
4.675  
4.575  
4.425  
MAX  
4.75  
4.65  
4.50  
CE OUT  
TO CMOS RAM  
L
N
M
GND  
________________________________________________________________ Maxim Integrated Products  
1
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800  
8 -P in µP S u p e rvis o ry Circ u it s  
w it h ±1 .5 % Re s e t Ac c u ra c y  
ABSOLUTE MAXIMUM RATINGS  
Input Voltage (with respect to GND)  
OUT Continuous............................................................500mA  
All Other Outputs ............................................................50mA  
V
.......................................................................-0.3V to +6V  
CC  
V
BATT  
....................................................................-0.3V to +6V  
Continuous Power Dissipation (T = +70°C)  
A
All Other Pins ........................................-0.3V to (V  
Input Current  
+ 0.3V)  
Plastic DIP (derate 9.09mW/°C above +70°C) ............727mW  
SO (derate 5.88mW/°C above +70°C).........................471mW  
CERDIP (derate 8.00mW/°C above +70°C).................640mW  
Operating Temperature Ranges  
OUT  
V
V
CC  
Peak ..........................................................................1.0A  
Continuous ............................................................500mA  
CC  
I
Peak.....................................................................250mA  
Continuous ............................................................50mA  
MAX801_C_A/MAX808_C_A...............................0°C to +70°C  
MAX801_E_A/MAX808_E_A ............................-40°C to +85°C  
MAX801_MJA/MAX808_MJA.........................-55°C to +125°C  
Storage Temperature Range .............................-65°C to +160°C  
Lead Temperature (soldering, 10sec) .............................+300°C  
BATT  
I
BATT  
GND ................................................................................50mA  
All Other Inputs ...............................................................50mA  
Output Current  
OUT Peak..........................................................................1.0A  
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional  
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to  
absolute maximum rating conditions for extended periods may affect device reliability.  
ELECTRICAL CHARACTERISTICS  
(V = 4.6V to 5.5V for the MAX80_L, V = 4.5V to 5.5V for the MAX80_N, V = 4.35V to 5.5V for the MAX80_M; V = 2.8V;  
BATT  
CC  
CC  
CC  
T
A
= T  
to T  
. Typical values are at V = 5V and T = +25°C, unless otherwise noted.)  
MIN  
MAX  
CC  
A
PARAMETER  
Operating Voltage Range  
, BATT (Note 1)  
SYMBOL  
CONDITIONS  
MIN  
TYP  
MAX  
5.5  
UNITS  
0
X
V
V
CC  
I
= 25mA  
V
CC  
- 0.02  
OUT  
V
= 4.5V  
I
= 250mA, MAX80_C/E  
= 250mA, MAX80_M  
V
- 0.38  
V
CC  
- 0.25  
- 0.12  
V
Mode  
in Normal Operating  
CC  
OUT  
CC  
OUT  
V
I
V
CC  
- 0.45  
- 0.25  
OUT  
V
CC  
= 3V, V  
= 2.8V, I  
= 100mA  
V
CC  
V
CC  
BATT  
OUT  
1,AX08LM/N  
MAX80_C/E  
MAX80_M  
= 100mA  
OUT  
1.0  
1.5  
V
= 4.5V,  
= 250mA  
CC  
V
to OUT  
CC  
I
OUT  
1.8  
2.5  
Ω
V
On-Resistance  
V
CC  
= 3V, I  
= 0V  
1.2  
- 0.16  
V
= 4.5V, I  
= 2.8V, I  
= 2.0V, I  
= 4.5V, I  
= 2.8V, I  
= 2.0V, I  
= 20mA  
V
BATT  
BATT  
OUT  
OUT  
OUT  
OUT  
OUT  
OUT  
V
in Battery-Backup  
OUT  
V
CC  
V
= 10mA  
= 5mA  
V
- 0.25  
- 0.20  
V
BATT  
- 0.12  
- 0.08  
BATT  
BATT  
Mode  
V
V
BATT  
V
BATT  
BATT  
V
= 20mA  
= 10mA  
= 5mA  
8
BATT  
BATT to OUT  
On-Resistance  
V
CC  
= 0V  
V
12  
16  
25  
40  
Ω
BATT  
V
BATT  
Supply Current in Normal  
Operating Mode  
MAX801  
MAX808  
68  
110  
90  
µA  
µA  
48  
(excludes I  
)
OUT  
T
= +25°C  
0.4  
1
A
Supply Current in Battery-  
Backup Mode (excludes  
V
V
BATT  
= 0V,  
CC  
MAX80_C/E  
MAX80_M  
5
T
= 2.8V  
= T  
A
to T  
MIN  
I
) (Note 2)  
OUT  
MAX  
50  
0.1  
1.0  
T
A
= +25°C  
-0.1  
-1.0  
BATT Standby Current  
(Note 3)  
V
≤ V  
+ 0.2V  
= 2.8V  
BATT  
µA  
V
CC  
T
A
= T to T  
MIN MAX  
Power-up  
Power-down  
V
+ 0.05  
BATT  
Battery-Switchover  
Threshold  
V
BATT  
V
BATT  
Battery-Switchover  
Hysteresis  
50  
mV  
2
_______________________________________________________________________________________  
8 -P in µP S u p e rvis o ry Circ u it s  
w it h ±1 .5 % Re s e t Ac c u ra c y  
1,AX08LM/N  
ELECTRICAL CHARACTERISTICS (continued)  
(V = 4.6V to 5.5V for the MAX80_L, V = 4.5V to 5.5V for the MAX80_N, V = 4.35V to 5.5V for the MAX80_M; V = 2.8V;  
BATT  
CC  
CC  
CC  
T
A
= T  
to T  
. Typical values are at V = 5V and T = +25°C, unless otherwise noted.)  
MIN  
MAX  
CC  
A
PARAMETER  
SYMBOL  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
RESET AND LOW-LINE  
MAX80_L  
MAX80_N  
MAX80_M  
4.600  
4.500  
4.350  
4.675  
4.575  
4.425  
13  
4.750  
V
rising  
CC  
Reset Threshold  
V
4.650  
4.500  
V
RST  
and falling  
Reset-Threshold Hysteresis  
mV  
mV  
LOWLINE to RESET  
Threshold Voltage  
V
V
CC  
falling  
30  
52  
70  
LR  
MAX80_L  
MAX80_N  
MAX80_M  
4.73  
4.63  
4.48  
17  
4.81  
4.71  
4.56  
LOWLINE Threshold,  
V
V
LL  
V
CC  
Rising  
t
V
CC  
falling at 1mV/µs  
µs  
µs  
V
CC  
to RESET Delay  
RD  
t
V
CC  
falling at 1mV/µs  
17  
V
CC  
to LOWLINE Delay  
LL  
RESET Active Timeout  
Period  
t
V
rising  
140  
200  
280  
0.3  
ms  
RP  
CC  
I
= 50µA,  
= 0V,  
falling  
SINK  
V
= 1.0V, MAX80_C  
CC  
V
BATT  
V
CC  
= 1.2V, MAX80_E/M  
0.3  
0.4  
V
CC  
V
RESET Output Voltage  
I
= 3.2mA, V = 4.25V  
CC  
0.1  
SINK  
I
= 0.1mA  
V
CC  
- 1.5  
V
CC  
- 0.1  
SOURCE  
Output sink current, V = 4.25V  
CC  
40  
RESET Output  
Short-Circuit Current  
I
mA  
V
SC  
Output source current  
1.6  
I
= 3.2mA  
0.4  
0.4  
SINK  
RESET Output Voltage  
(MAX801)  
I
= 5mA, V = 4.25V  
V
CC  
- 1.5  
- 1.5  
SOURCE  
CC  
Output sink current  
Output source current, V = 4.25V  
55  
15  
RESET Output Short-  
Circuit Current (MAX801)  
I
SC  
mA  
V
CC  
I
= 3.2mA, V = 4.25V  
CC  
SINK  
LOWLINE Output Voltage  
I
= 5mA, V = 4.25V  
V
CC  
SOURCE  
CC  
Output sink current, V = 4.25V  
CC  
40  
20  
LOWLINE Output  
Short-Circuit Current  
I
SC  
mA  
Output source current  
WATCHDOG TIMER (MAX801)  
Watchdog Timeout Period  
t
1.12  
100  
0.75 x V  
1.6  
2.24  
sec  
ns  
WD  
Minimum Watchdog Input  
Pulse Width  
V
= 0.8V, V = 0.75V x V  
IH CC  
IL  
V
IH  
CC  
WDI Threshold Voltage  
(Note 4)  
V
V
0.8  
50  
IL  
RESET deasserted, WDI = 0V  
RESET deasserted, WDI = V  
-50  
-10  
16  
WDI Input Current  
µA  
CC  
_______________________________________________________________________________________  
3
8 -P in µP S u p e rvis o ry Circ u it s  
w it h ±1 .5 % Re s e t Ac c u ra c y  
ELECTRICAL CHARACTERISTICS (continued)  
(V = 4.6V to 5.5V for the MAX80_L, V = 4.5V to 5.5V for the MAX80_N, V = 4.35V to 5.5V for the MAX80_M; V = 2.8V;  
BATT  
CC  
CC  
CC  
T
A
= T  
to T  
. Typical values are at V = 5V and T = +25°C, unless otherwise noted.)  
MIN  
MAX  
CC  
A
PARAMETER  
SYMBOL  
CONDITIONS  
MIN  
TYP  
MAX UNITS  
CHIP-ENABLE GATING (MAX808)  
V
= 4.25V  
±0.00002  
75  
±1  
µA  
CE IN Leakage Current  
CC  
CE IN to CE OUT  
Resistance (Note 5)  
Enabled mode, V = V (max)  
150  
Ω
CC  
RST  
CE OUT Short-Circuit  
Current (RESET Active)  
15  
3
mA  
ns  
V
= 4.25V, CE OUT = 0V  
CC  
V
= 5V, C  
= 50pF,  
LOAD  
CE IN to CE OUT  
Propagation Delay (Note 6)  
CC  
8
50Ω source-impedance driver  
V
= 4.25V, I = 2mA  
3.5  
CC  
OUT  
CE OUT Output Voltage  
High (RESET Active)  
V
V
CC  
= 0V, I  
= 10µA  
V
- 0.1  
V
BATT  
OUT  
BATT  
RESET to CE OUT Delay  
(Note 7)  
18  
µs  
V
CC  
falling, CE IN = 0V  
Note 1: Either V or V  
can go to 0V if the other is greater than 2V.  
CC  
BATT  
Note 2: The supply current drawn by the MAX80_ from the battery (excluding I  
) typically goes to 15µA when (V  
- 0.1V) <  
OUT  
BATT  
V
CC  
< V  
. In most applications, this is a brief period as V falls through this region (see Typical Operating  
BATT CC  
Characteristics).  
Note 3: “+” = battery-discharging current, “-” = battery-charging current.  
Note 4: WDI is internally connected to a voltage divider between V and GND. If unconnected, WDI is typically driven to 1.8V,  
CC  
disabling the watchdog function.  
1,AX08LM/N  
Note 5: The chip-enable resistance is tested with V  
= V / 2 and I  
= 1mA.  
CE IN  
CE IN  
CC  
Note 6: The chip-enable propagation delay is measured from the 50% point at CE IN to the 50% point at CE OUT.  
Note 7: If CE IN goes high, CE OUT goes high immediately and stays high until reset is deasserted and CE IN is low.  
__________________________________________Typ ic a l Op e ra t in g Ch a ra c t e ris t ic s  
(V = 5V, V  
= 2.8V, no load, T = +25°C, unless otherwise noted.)  
A
CC  
BATT  
MAX808  
BATTERY SUPPLY CURRENT vs.  
TEMPERATURE (BATTERY-BACKUP MODE)  
V
CC  
SUPPLY CURRENT vs. TEMPERATURE  
(NORMAL OPERATING MODE)  
CHIP-ENABLE PROPAGATION DELAY  
vs. TEMPERATURE  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0
75  
6
5
4
3
2
1
0
70  
65  
MAX801  
60  
55  
50  
45  
40  
MAX808  
-15  
-60 -40 -20  
0
20 40 60 80 100 120 140  
-55 -35  
5
25 45 65 85 105 125  
-60 -40 -20  
0
20 40 60 80 100 120 140  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
4
_______________________________________________________________________________________  
8 -P in µP S u p e rvis o ry Circ u it s  
w it h ±1 .5 % Re s e t Ac c u ra c y  
1,AX08LM/N  
____________________________Typ ic a l Op e ra t in g Ch a ra c t e ris t ic s (c o n t in u e d )  
(V = 5V, V  
= 2.8V, no load, T = +25°C, unless otherwise noted.)  
BATT A  
CC  
MAX808  
V
CC  
to OUT ON-RESISTANCE  
vs. TEMPERATURE  
BATT to OUT ON-RESISTANCE  
vs. TEMPERATURE  
CHIP-ENABLE PROPAGATION DELAY  
vs. CE OUT LOAD CAPACITANCE  
1.6  
1.5  
1.4  
1.3  
1.2  
30  
8
6
4
V
= 0V  
= 10mA  
CC  
I
= 250mA  
OUT  
50Ω DRIVER  
I
OUT  
25  
20  
15  
10  
5
V
= 2.0V  
BATT  
1.1  
1.0  
V
BATT  
= 2.8V  
= 4.5V  
2
0
0.9  
0.8  
0.7  
V
BATT  
-60 -40 -20  
0
20 40 60 80 100 120 140  
-60 -40 -20  
0
20 40 60 80 100 120 140  
0
50  
(pF)  
100  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
C
LOAD  
RESET THRESHOLD  
vs. TEMPERATURE  
RESET TIMEOUT PERIOD  
vs. TEMPERATURE (V RISING)  
LOWLINE to RESET THRESHOLD  
vs. TEMPERATURE (V FALLING)  
CC  
CC  
4.70  
4.65  
4.60  
4.55  
4.50  
4.45  
4.40  
280  
260  
80  
70  
60  
50  
MAX80_L  
240  
220  
200  
180  
160  
140  
MAX80_N  
40  
30  
20  
10  
0
MAX80_M  
-60 -40 -20  
0
20 40 60 80 100 120 140  
-60 -40 -20  
0
20 40 60 80 100 120 140  
-60 -40 -20  
0
20 40 60 80 100 120 140  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
LOWLINE COMPARATOR PROPAGATION  
RESET COMPARATOR PROPAGATION  
LOWLINE THRESHOLD  
DELAY vs. TEMPERATURE (V FALLING)  
CC  
DELAY vs. TEMPERATURE (V FALLING)  
CC  
vs. TEMPERATURE (V RISING)  
CC  
40  
40  
4.80  
4.75  
4.70  
4.65  
4.60  
4.55  
4.50  
4.45  
4.40  
V
FALLING AT 1mV/µs  
V
CC  
FALLING AT 1mV/µs  
CC  
MAX80_L  
MAX80_N  
35  
30  
25  
35  
30  
25  
20  
15  
20  
15  
MAX80_M  
10  
10  
5
0
5
0
-60 -40 -20  
0
20 40 60 80 100 120 140  
-60 -40 -20  
0
20 40 60 80 100 120 140  
-60 -40 -20  
0
20 40 60 80 100 120 140  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
_______________________________________________________________________________________  
5
8 -P in µP S u p e rvis o ry Circ u it s  
w it h ±1 .5 % Re s e t Ac c u ra c y  
____________________________Typ ic a l Op e ra t in g Ch a ra c t e ris t ic s (c o n t in u e d )  
(V = 5V, V  
= 2.8V, no load, T = +25°C, unless otherwise noted.)  
BATT A  
CC  
BATTERY CURRENT  
vs. INPUT SUPPLY VOLTAGE  
BATT to OUT VOLTAGE vs.  
OUTPUT CURRENT  
16  
1000  
100  
10  
V
CC  
= 0V  
14  
12  
10  
SLOPE = 12Ω  
8
6
4
2
0
2.5  
2.6  
2.7  
2.8  
(V)  
2.9  
3.0  
1
10  
(mA)  
100  
V
I
CC  
OUT  
MAXIMUM TRANSIENT DURATION vs.  
RESET THRESHOLD OVERDRIVE  
V
to OUT VOLTAGE vs.  
CC  
OUTPUT CURRENT  
1000  
1000  
100  
10  
SLOPE = 1.0Ω  
RESET OCCURS  
100  
10  
1
1,AX08LM/N  
1
1
10  
100  
1000  
1
10  
100  
1000  
RESET THRESHOLD OVERDRIVE (mV)  
I
(mA)  
OUT  
______________________________________________________________P in De s c rip t io n  
PIN  
NAME  
FUNCTION  
MAX801  
MAX808  
1
1
V
CC  
Input Supply Voltage, nominally +5V. Bypass with a 0.1µF capacitor to GND.  
Low-Line Comparator Output. This CMOS-logic output goes low when V falls to 52mV  
CC  
2
2
above the reset threshold. Use LOWLINE to generate an NMI, initiating an orderly shut-  
LOWLINE  
down routine when V is falling. LOWLINE swings between V and GND.  
CC  
CC  
Active-Low Reset Output. RESET is triggered and stays low when V is below the reset  
CC  
threshold (or during a watchdog timeout for the MAX801). It remains low 200ms after  
V
rises above the reset threshold (or 200ms after the watchdog timeout occurs).  
3
4
3
4
RESET  
CC  
RESET has a strong pull-down but a relatively weak pull-up, and can be wire-OR con-  
nected to logic gates. Valid for V ≥ 1V. RESET swings between V and GND.  
CC  
CC  
GND  
Ground  
6
_______________________________________________________________________________________  
8 -P in µP S u p e rvis o ry Circ u it s  
w it h ±1 .5 % Re s e t Ac c u ra c y  
1,AX08LM/N  
_________________________________________________P in De s c rip t io n (c o n t in u e d )  
PIN  
NAME  
FUNCTION  
MAX801  
MAX808  
Active-High Reset Output. RESET is the inverse of RESET. It is a CMOS output that  
5
—
RESET  
sources and sinks current. RESET swings between V and GND.  
CC  
Chip-Enable Output. Output to the chip-enable gating circuit. CE OUT is pulled up to  
—
5
CE OUT  
the higher of V or V  
when the chip-enable gate is disabled.  
CC  
BATT  
Watchdog Input. If WDI remains high or low longer than the watchdog timeout period  
(typically 1.6sec), RESET will be asserted for 200ms. Leave unconnected to disable the  
watchdog function.  
6
—
6
WDI  
—
Chip-Enable Input  
CE IN  
Backup-Battery Input. When V falls below the reset threshold and V  
, OUT switch-  
BATT  
CC  
es from V to BATT. V  
MAX801/MAX808 is powered up, provided BATT is bypassed with a 0.1µF capacitor to  
GND. If no battery is used, connect BATT to ground and V to OUT.  
may exceed V . The battery can be removed while the  
CC  
CC  
BATT  
7
8
7
8
BATT  
OUT  
CC  
Output Supply Voltage to CMOS RAM. When V exceeds the reset threshold or V  
,
CC  
BATT  
OUT connects to V . When V falls below the reset threshold and V , OUT con-  
BATT  
CC  
CC  
nects to BATT. Bypass OUT with a 0.1µF capacitor to GND.  
V
CC  
OUT  
BATT  
BATTERY-BACKUP  
COMPARATOR  
MAX801  
MAX808  
LOWLINE  
WDI  
RESET  
COMPARATOR  
MAX801 ONLY  
WATCHDOG  
TRANSITION  
DETECTOR  
LOW-LINE  
COMPARATOR  
RESET (MAX801 ONLY)  
RESET  
STATE  
MACHINE  
OSCILLATOR  
2.275V  
GND  
THE HIGHER  
MAX808 ONLY  
OF V  
CC  
OR V  
BATT  
P
P
CE IN  
CE OUT  
N
Figure 1. Functional Diagram  
_______________________________________________________________________________________  
7
8 -P in µP S u p e rvis o ry Circ u it s  
w it h ±1 .5 % Re s e t Ac c u ra c y  
V
V
V
+ V  
V
RST LL  
RST LR RST  
V
CC  
V
CC  
t
LL  
V
V
LOWLINE  
LOWLINE  
t
RD  
t
RP  
V
RESET  
V
RESET  
t
RD  
V
V
RESET  
(MAX801)  
RESET  
t
RP  
(MAX801)  
V
CE OUT  
t
RCE  
V
BATT  
V
(MAX808)  
CE OUT  
V
BATT  
(MAX808)  
SHOWN FOR V = 0V to 5V, V  
= 2.8V, CE IN = GND  
SHOWN FOR V = 5V to 0V, V  
= 2.8V, CE IN = GND  
CC  
BATT  
CC  
BATT  
Figure 2a. Timing Diagram, V Rising  
CC  
Figure 2b. Timing Diagram, V Falling  
CC  
The RESET output is active low, and is implemented with  
a strong pull-down/relatively weak pull-up structure. It is  
_______________De t a ile d De s c rip t io n  
The MAX801/MAX808 microprocessor (µP) supervisory  
circuits provide power-supply monitoring and backup-  
battery switchover in µP systems. The MAX801 also  
p rovid e s p rog ra m-e xe c ution wa tc hd og func tions  
(Figure 1). Use of BiCMOS technology results in an  
improved, 1.5% reset-threshold precision while keeping  
s up p ly c urre nts typ ic a lly a t 68µA (48µA for the  
MAX808). The MAX801/MAX808 are intended for bat-  
te ry-p owe re d a p p lic a tions tha t re q uire hig h re s e t-  
thre s hold p re c is ion, a llowing a wid e p owe r-s up p ly  
operating range while preventing the system from oper-  
ating below its specified voltage range.  
1,AX08LM/N  
guaranteed to be a logic low for 0V < V < V , pro-  
CC  
RST  
vided V  
is greater than 2V. Without a backup bat-  
BATT  
tery, RESET is guaranteed valid for V ≥ 1V.  
CC  
The RESET output is the inverse of the RESET output; it  
both sources and sinks current and cannot be wire-OR  
connected.  
Lo w -Lin e Co m p a ra t o r  
The low-line comparator monitors V  
with a threshold  
CC  
voltage typically 52mV above the reset threshold, with  
13mV of hysteresis. Use LOWLINE to provide a non-  
maskable interrupt (NMI) to the µP when power begins  
to fall, initiating an orderly software shutdown routine. In  
most battery-operated portable systems, reserve ener-  
gy in the battery provides ample time to complete the  
shutdown routine once the low-line warning is encoun-  
tered and before reset asserts. If the system must con-  
RESET a n d RES ET Ou t p u t s  
The MAX801/MAX808’s RESET output ensures that the  
µP powers up in a known state, and prevents code-  
e xe c ution e rrors during powe r-down a nd brownout  
conditions. It does this by resetting the µP, terminating  
tend with a more rapid V fall time (such as when the  
CC  
program execution when V  
dips below the reset  
CC  
main battery is disconnected, when a DC-DC converter  
shuts down, or when a high-side switch is opened dur-  
threshold. Each time RESET is asserted, it stays low for  
at least the 200ms reset timeout period (set by an inter-  
nal timer) to ensure the µP has adequate time to return  
to an initial state. The internal timer restarts any time  
ing normal operation), use capacitance on the V line  
CC  
to provide time to execute the shutdown routine (Figure  
3). First calculate the worst-case time required for the  
system to perform its shutdown routine. Then, with  
worst-case shutdown time, worst-case load current,  
V
CC  
goes below the reset threshold (V ) before the  
RST  
reset timeout period is completed. The watchdog timer  
on the MAX801 c a n a ls o initia te a re s e t (s e e the  
MAX801 Watchdog Timer section).  
and minimum low-line to reset threshold (V  
),  
LR(min)  
8
_______________________________________________________________________________________  
8 -P in µP S u p e rvis o ry Circ u it s  
w it h ±1 .5 % Re s e t Ac c u ra c y  
1,AX08LM/N  
MAX801  
4.5V to 5.5V  
REGULATOR  
TO µP NMI  
MAX808  
LOWLINE  
V
CC  
P
V
CC  
C
HOLD  
CONTROL  
CIRCUITRY  
OUT  
MAX801  
MAX808  
0.1µF  
BATT  
GND  
C
> I  
x t  
P
P
HOLD LOAD SHDN  
V
LR  
Figure 3. Using LOWLINE to Provide a Power-Fail Warning to  
the µP  
Figure 4. V and BATT to OUT Switch  
CC  
calculate the amount of capacitance required to allow  
the s hutd own routine to c omp le te b e fore re s e t is  
asserted:  
Table 1. Input and Output Status in  
Battery-Backup Mode  
C
= (I  
x t  
SHDN  
) / (V  
)
HOLD  
LOAD  
LR(min)  
PIN  
NAME  
STATUS  
where t  
is the time required for the system to com-  
SHDN  
MAX801 MAX808  
plete the shutdown routine (including the V  
to low-  
CC  
line propagation delay), I  
drained from the capacitor, and V is the low-line to  
is the current being  
LR  
LOAD  
Battery switchover  
comparator monitors V  
CC  
1
1
V
CC  
reset threshold.  
for active switchover.  
2
3
2
3
Logic low  
LOWLINE  
RESET  
Ou t p u t S u p p ly Vo lt a g e  
The output supply (OUT) transfers power from V  
or  
CC  
Logic low  
BATT to the µP, RAM, and other external circuitry. At  
the maximum source current of 250mA, V will typi-  
Ground—0V reference for  
all signals  
OUT  
4
5
4
GND  
cally be 220mV below V . Decouple OUT with a 0.1µF  
CC  
capacitor to ground.  
Logic high; the open-circuit  
voltage is equal to V  
—
RESET  
.
CC  
Ba t t e ry-Ba c k u p Mo d e  
Battery-backup mode preserves the contents of RAM in  
the event of a brownout or power failure. With a backup  
battery installed at BATT, the MAX801/MAX808 automati-  
Logic high. The open-circuit  
output voltage is equal to  
—
5
CE OUT  
V
(MAX808).  
BATT  
cally switches RAM to backup power when V  
falls.  
CC  
WDI is ignored and goes  
high impedance.  
6
—
7
—
6
WDI  
CE IN  
BATT  
Two conditions are required for switchover to battery-  
backup mode: 1) V must be below the reset threshold;  
CC  
High impedance (MAX808)  
2) V must be below V  
. Table 1 lists the status of  
BATT  
CC  
Supply current is 1µA max for  
inputs and outputs during battery-backup mode.  
7
V
BATT  
≤ 2.8V.  
BATT is designed to conduct up to 20mA to OUT dur-  
ing battery backup. The PMOS switch on-resistance is  
approximately 12Ω. Figure 4 shows the two series pass  
e le me nts (b e twe e n the BATT inp ut a nd OUT) tha t  
OUT is connected to BATT  
through two internal PMOS  
switches in series.  
8
8
OUT  
facilitate UL recognition. V  
can exceed V during  
BATT  
CC  
normal operation without causing a reset.  
_______________________________________________________________________________________  
9
8 -P in µP S u p e rvis o ry Circ u it s  
w it h ±1 .5 % Re s e t Ac c u ra c y  
MAX8 0 1 Wa t c h d o g Tim e r  
The watchdog monitors the µP’s activity. If the µP does  
not toggle the watchdog input (WDI) within 1.6sec,  
reset asserts for the reset timeout period. The internal  
1.6sec timer is cleared when reset asserts or when a  
V
CC  
transition (low-to-high or high-to-low) occurs at WDI  
while reset is not asserted. The timer remains cleared  
and does not count as long as reset is asserted. It  
starts counting as soon as reset is released (Figure 5).  
Supply current is typically reduced by 10µA when WDI  
is at a valid logic level. To disable the watchdog func-  
tion, le a ve WDI unc onne c te d . An inte rna l volta g e  
divider sets WDI to about mid-supply, disabling the  
watchdog timer/counter.  
t
RP  
t
RP  
t
WD  
RESET  
WDI  
MAX8 0 8 Ch ip -En a b le Ga t in g  
The MAX808 provides internal gating of chip-enable  
(CE) signals to prevent erroneous data from corrupting  
CMOS RAM in the event of a power failure. During nor-  
mal operation, the CE gate is enabled and passes all  
CE tra ns itions . Whe n re s e t is a s s e rte d , this p a th  
becomes disabled, preventing erroneous data from  
corrupting the CMOS RAM. The MAX808 uses a series  
transmission gate from the chip-enable input (CE IN) to  
the chip-enable output (CE OUT) (Figure 1). The 8ns  
max chip-enable propagation from CE IN to CE OUT  
enables the MAX808 to be used with most µPs.  
Figure 5. Watchdog Timing  
V
CC  
RESET  
THRESHOLD  
CE IN  
CE OUT  
The MAX808 also features write-cycle-completion cir-  
M
18µs  
17µs  
18µs  
17µs  
cuitry. If V  
falls below the reset threshold while the  
CC  
µP is writing to RAM, the MAX808 holds the CE gate  
enabled for 18µs to allow the µP to complete the write  
instruction. If the write cycle has not completed by the  
end of the 18µs period, the CE transmission gate turns  
off and CE OUT goes high. If the µP completes the  
write instruction during the 18µs period, the CE gate  
turns off (high impedance) and CE OUT goes high as  
soon as the µP pulls CE IN high. CE OUT remains high,  
even if CE IN falls low for any reason (Figure 6).  
RESET  
Figure 6. Chip-Enable Timing  
In high-impedance mode, the leakage currents into this  
input are ±1µA max over temperature. In low-imped-  
ance mode, the impedance of CE IN appears as a 75Ω  
resistor in series with the load at CE OUT.  
Chip-Enable Input  
CE IN is high impedance (disabled mode) while reset is  
asserted. During a power-down sequence when V  
CC  
The propagation delay through the CE transmission  
gate depends on both the source impedance of the  
drive to CE IN and the capacitive loading on CE OUT  
(see the Chip-Enable Propagation Delay vs. CE OUT  
Loa d Ca p a c ita nc e g ra p h in the Typ ic a l Op e ra ting  
Characteristics). The CE propagation delay is produc-  
tion tested from the 50% point on CE IN to the 50%  
point on CE OUT using a 50Ω driver and 50pF of load  
c a p a c ita nc e (Fig ure 7). For minimum p rop a g a tion  
delay, minimize the capacitive load at CE OUT and use  
a low-output-impedance driver.  
passes the reset threshold, the CE transmission gate  
disables. CE IN becomes high impedance 18µs after  
reset asserts, provided CE IN is still low. If the µP com-  
pletes the write instruction during the 18µs period, the  
CE gate turns off. CE IN becomes high impedance as  
soon as the µP pulls CE IN high. CE IN remains high  
impedance even if the signal at CE IN falls low (Figure  
6). During a power-up sequence, CE IN remains high  
impedance (regardless of CE IN activity) until reset is  
deasserted following the reset timeout period.  
10 ______________________________________________________________________________________  
8 -P in µP S u p e rvis o ry Circ u it s  
w it h ±1 .5 % Re s e t Ac c u ra c y  
1,AX08LM/N  
V
(max)  
+5V  
RST  
V
CC  
V
1N4148  
0.47F  
CC  
BATT  
OUT  
MAX808  
CE IN  
CE OUT  
MAX801  
MAX808  
50pF C  
LOAD  
50Ω DRIVER  
GND  
GND  
Figure 7. MAX808 CE Gate Test Circuit  
Figure 8. Using the MAX801/MAX808 with a SuperCap  
Chip-Enable Output  
circuit as a backup source (Figure 8). Since V  
can  
BATT  
In enabled mode, CE OUT’s impedance is equivalent to  
75Ω in series with the source driving CE IN. In disabled  
mode, the 75Ω transmission gate is off and CE OUT is  
exceed V while V is above the reset threshold, no  
special precautions are needed when using these µP  
supervisors with a SuperCap.  
CC CC  
a c tive ly p ulle d to the hig he r of V  
or V  
. The  
CC  
BATT  
Ba c k u p -Ba t t e ry Re p la c e m e n t  
source turns off when the transmission gate is enabled.  
The backup battery can be disconnected while V  
is  
CC  
__________Ap p lic a t io n s In fo rm a t io n  
above the reset threshold, provided BATT is bypassed  
with a 0.1µF capacitor to ground. No precautions are  
necessary to avoid spurious reset pulses.  
The MAX801/MAX808 are not short-circuit protected.  
Shorting OUT to ground, other than power-up transients  
such as charging a decoupling capacitor, may destroy  
the device. If long leads connect to the IC’s inputs,  
ensure that these lines are free from ringing and other  
conditions that would forward bias the IC’s protection  
Ne g a t ive -Go in g V  
Tra n s ie n t s  
CC  
While issuing resets to the µP during power-up, power-  
down, and brownout conditions, these supervisors are  
relatively immune to short-duration, negative-going V  
CC  
d iod e s . Byp a s s OUT, V , a nd BATT with 0.1µF  
CC  
transients (glitches). It is usually undesirable to reset  
capacitors to GND.  
the µP when V experiences only small glitches.  
CC  
The MAX801/MAX808 operate in two distinct modes:  
The Typical Operating Characteristics show a graph of  
Ma ximum Tra ns ie nt Dura tion vs . Re s e t Thre s hold  
Overdrive, for which reset pulses are not generated.  
1) Normal Operating Mode, with all circuitry powered  
up. Typical supply current from V  
is 68µA (48µA  
CC  
for the MAX808), while only leakage currents flow  
from the battery.  
The graph was produced using negative-going V  
CC  
p uls e s , s ta rting a t 5V a nd e nd ing b e low the re s e t  
threshold by the magnitude indicated (reset compara-  
tor overdrive). The graph shows the maximum pulse  
2) Battery-Backup Mode, where V  
is below V  
BATT  
CC  
and V . The supply current from the battery is typ-  
RST  
width that a negative-going V transient may typically  
CC  
ically less than 1µA.  
have without causing a reset pulse to be issued. As the  
amplitude of the transient increases (i.e., goes farther  
below the reset threshold), the maximum allowable  
Us in g S u p e rCa p s ™ o r Ma x Ca p s ™  
w it h t h e MAX8 0 1 /MAX8 0 8  
pulse width decreases. Typically, a V  
transient that  
BATT has the same operating voltage range as V , and  
CC  
CC  
goes 40mV below the reset threshold and lasts for 3µs  
or less will not cause a reset pulse to be issued. A  
the battery-switchover threshold voltage is typically  
V
when V is decreasing or V  
+ 0.05V when  
BATT  
CC  
BATT  
0.1µF bypass capacitor mounted close to the V  
pin  
V
CC  
is inc re a s ing . This hys te re s is a llows us e of a  
CC  
provides additional transient immunity.  
SuperCap (e.g., around 0.47F) and a simple charging  
______________________________________________________________________________________ 11  
8 -P in µP S u p e rvis o ry Circ u it s  
w it h ±1 .5 % Re s e t Ac c u ra c y  
Wa t c h d o g S o ft w a re Co n s id e ra t io n s  
To help the watchdog timer keep a closer watch on  
software execution, you can set and reset the watch-  
dog input at different points in the program, rather than  
“pulsing” the watchdog input high-low-high or low-high-  
low. This technique avoids a “stuck” loop, where the  
watchdog timer continues to be reset within the loop,  
keeping the watchdog from timing out.  
START  
SET  
WDI  
LOW  
Figure 9 shows a sample flow diagram where the I/O  
driving the watchdog input is set high at the beginning  
of the program, low at the beginning of every subrou-  
tine or loop, then high again when the program returns  
to the beginning. If the program should “hang” in any  
subroutine, the I/O would be continually set low and the  
watchdog timer would be allowed to time out, causing a  
reset or interrupt to be issued.  
SUBROUTINE  
OR PROGRAM LOOP,  
SET WDI  
HIGH  
RETURN  
END  
Ma x im u m V  
The V fall time is limited by the propagation delay of  
the b a tte ry s witc hove r c omp a ra tor a nd s hould not  
exceed 0.03V/µs. A standard rule for filter capacitance  
on most regulators is around 100µF per Ampere of cur-  
rent. When the power supply is shut off or the main bat-  
Fa ll Tim e  
CC  
CC  
Figure 9. Watchdog Flow Diagram  
tery is disconnected, the associated initial V fall rate  
CC  
is just the inverse, or 1A/100µF = 0.01V/µs.  
___________________Ch ip In fo rm a t io n  
_________________P in Co n fig u ra t io n s  
1,AX08LM/N  
TRANSISTOR COUNT: 922  
TOP VIEW  
1
2
3
4
8
7
6
5
OUT  
V
CC  
BATT  
WDI  
LOWLINE  
RESET  
GND  
MAX801  
RESET  
DIP/SO  
1
2
3
4
8
7
6
5
OUT  
V
CC  
BATT  
CE IN  
CE OUT  
LOWLINE  
RESET  
GND  
MAX808  
DIP/SO  
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are  
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.  
12 __________________Ma x im In t e g ra t e d P ro d u c t s , 1 2 0 S a n Ga b rie l Drive , S u n n yva le , CA 9 4 0 8 6 (4 0 8 ) 7 3 7 -7 6 0 0  
© 1996 Maxim Integrated Products  
Printed USA  
is a registered trademark of Maxim Integrated Products.  

MAX801L-MAX808N 相关器件

型号 制造商 描述 价格 文档
MAX801LCPA MAXIM Interface IC 获取价格
MAX801LCPA+ MAXIM Power Supply Support Circuit, Fixed, 1 Channel, BICMOS, PDIP8, 0.300 INCH, PLASTIC, DIP-8 获取价格
MAX801LCSA MAXIM Interface IC 获取价格
MAX801LCSA+ MAXIM Power Supply Support Circuit, Fixed, 1 Channel, BICMOS, PDSO8, 0.150 INCH, SO-8 获取价格
MAX801LCSA+T MAXIM Power Supply Support Circuit, Fixed, 1 Channel, BICMOS, PDSO8, 0.150 INCH, SO-8 获取价格
MAX801LCSA-T MAXIM 暂无描述 获取价格
MAX801LEPA MAXIM Interface IC 获取价格
MAX801LESA MAXIM Interface IC 获取价格
MAX801LESA+ MAXIM Power Supply Support Circuit, Fixed, 1 Channel, BICMOS, PDSO8, 0.150 INCH, SO-8 获取价格
MAX801LESA+T MAXIM Power Supply Support Circuit, Fixed, 1 Channel, BICMOS, PDSO8, 0.150 INCH, SO-8 获取价格

MAX801L-MAX808N 相关文章

  • 小米 AI 眼镜技术亮点：双芯架构助力智能穿戴跨越发展
    2025-07-11
    32
  • AI 芯片风云：台积电能否超越英伟达成新霸主？
    2025-07-11
    25
  • 锁存型霍尔 IC：原理、应用大揭秘
    2025-07-11
    24
  • HBM 角逐：定制化、混合键合等技术成竞争关键
    2025-07-11
    22

    • 热门型号

  • 1N5930
  • 1N5942B
  • 1N4001
  • MBR3050CT
  • RTA02-8D
  • 4116T
  • 5KP43A/4
  • 1N5260A
  • MC79L05
  • BZX85C30
  • 9510-G
  • W2PE-54WZ-P
  • 1N6063
  • 2SA673
  • 20IMX35
    • Hi,有什么可以帮您？ 在线客服 或 微信扫码咨询
  • 概述
  • 数据手册
    • 2025 ICPDF网 联系我们和版权申明:QQ 272164286