L6235PD中文资料_数据手册_规格书

L6235

DMOS DRIVER FOR

THREE-PHASE BRUSHLESS DC MOTOR

■

OPERATING SUPPLY VOLTAGE FROM 8 TO 52V

■ 5.6A OUTPUT PEAK CURRENT (2.8A DC)

0.3Ω TYP. VALUE @ T = 25 °C

■ R

DS(ON)

j

■ OPERATING FREQUENCY UP TO 100KHz

■ NON DISSIPATIVE OVERCURRENT

DETECTION AND PROTECTION

■ DIAGNOSTIC OUTPUT

PowerDIP24

(20+2+2)

PowerSO36

SO24

(20+2+2)

■

CONSTANT t

PWM CURRENT CONTROLLER

OFF

ORDERING NUMBERS:

L6235PD

■ SLOW DECAY SYNCHR. RECTIFICATION

■ 60° & 120° HALL EFFECT DECODING LOGIC

■ BRAKE FUNCTION

■ TACHO OUTPUT FOR SPEED LOOP

■ CROSS CONDUCTION PROTECTION

■ THERMAL SHUTDOWN

L6235N

L6235D

combines isolated DMOS Power Transistors with

CMOS and bipolar circuits on the same chip.

The device includes all the circuitry needed to drive a

three-phase BLDC motor including: a three-phase

DMOS Bridge, a constant off time PWM Current Con-

troller and the decoding logic for single ended hall

sensors that generates the required sequence for the

power stage.

■ UNDERVOLTAGE LOCKOUT

■ INTEGRATED FAST FREEWEELING DIODES

DESCRIPTION

Available in PowerDIP24 (20+2+2), PowerSO36 and

SO24 (20+2+2) packages, the L6235 features a non-

dissipative overcurrent protection on the high side

Power MOSFETs and thermal shutdown.

The L6235 is a DMOS Fully Integrated Three-Phase

Motor Driver with Overcurrent Protection.

Realized in MultiPower-BCD technology, the device

BLOCK DIAGRAM

V_BOOT

VS_A

VBOOT

VCP

V_BOOT

THERMAL

PROTECTION

CHARGE

PUMP

OCD1

OUT

1

DIAG

10V

OCD1

OCD2

OCD

OCD3

OCD

V_BOOT

EN

BRAKE

FWD/REV

OCD2

OUT

2

GATE

LOGIC

H

3

10V

HALL-EFFECT

SENSORS

DECODING

LOGIC

H

2

1

SENSE_A

VS_B

V_BOOT

TACHO

MONOSTABLE

RCPULSE

TACHO

OCD3

10V

OUT

3

10V

5V

SENSE_B

PWM

VOLTAGE

REGULATOR

+

-

ONE SHOT

MONOSTABLE

MASKING

TIME

VREF

SENSE

COMPARATOR

RCOFF

D99IN1095B

September 2003

1/25

L6235

ABSOLUTE MAXIMUM RATINGS

Symbol

Parameter

Supply Voltage

Test conditions

= V = V

Value

60

Unit

V

S

V

SA

SB

S

V

OD

Differential Voltage between:

VS , OUT , OUT , SENSE

V

= V = V = 60V;

60

V

SA

SB

S

= V

= GND

A

1

2

A

SENSEA

SENSEB

and VS , OUT , SENSE

B

3

V

Bootstrap Peak Voltage

V

SA

= V = V

V + 10

V

BOOT

SB

S

V , V

IN

Logic Inputs Voltage Range

Voltage Range at pin VREF

Voltage Range at pin RCOFF

Voltage Range at pin RCPULSE

-0.3 to 7

-1 to 4

EN

V

REF

V

RCOFF

V

RCPULSE

V

Voltage Range at pins SENSE

A

SENSE

and SENSE

B

I

Pulsed Supply Current (for each

VS and VS pin)

V

= V = V ; T < 1ms

PULSE

7.1

2.8

A

S(peak)

SA

SB

S

A

B

I

DC Supply Current (for each

VS and VS pin)

= V = V

SB S

S

SA

A

B

T

, T

stg OP

Storage and Operating

Temperature Range

-40 to 150

°C

RECOMMENDED OPERATING CONDITION

Symbol Parameter

Test Conditions

= V = V

MIN

MAX

52

Unit

V

S

Supply Voltage

V

12

SA

SB

S

V

OD

Differential Voltage between:

V

= V = V ;

52

V

SB

S

VS , OUT , OUT , SENSE and

= V

A

1

2

A

SENSEA

SENSEB

VS , OUT , SENSE

B

3

V

REF

Voltage Range at pin VREF

-0.1

5

V

Voltage Range at pins SENSE

(pulsed t < t )

-6

-1

6

1

V

SENSE

A

W

rr

and SENSE

(DC)

= V = V

S

B

I

DC Output Current

V

2.8

125

100

A

OUT

SA

SB

T

J

Operating Junction Temperature

Switching Frequency

-25

°C

f

KHz

SW

2/25

L6235

THERMAL DATA

Symbol

Description

PDIP24

SO24

PowerSO36

Unit

°C/W

R

Maximum Thermal Resistance Junction-Pins

Maximum Thermal Resistance Junction-Case

18

14

th(j-pins)

th(j-case)

th(j-amb)1

R

1

-

(1)

R

43

-

51

-

MaximumThermal Resistance Junction-Ambient

Maximum Thermal Resistance Junction-Ambient

MaximumThermal Resistance Junction-Ambient

Maximum Thermal Resistance Junction-Ambient

(2)

(3)

(4)

35

15

62

°C/W

th(j-amb)1

th(j-amb)2

-

58

77

2

(1) Mounted on a multi-layer FR4 PCB with a dissipating copper surface on the bottom side of 6 cm (with a thickness of 35 µm).

2

(2) Mounted on a multi-layer FR4 PCB with a dissipating copper surface on the top side of 6 cm (with a thickness of 35 µm).

2

(3) Mounted on a multi-layer FR4 PCB with a dissipating copper surface on the top side of 6 cm (with a thickness of 35 µm),

16 via holes and a ground layer.

(4) Mounted on a multi-layer FR4 PCB without any heat-sinking surface on the board.

PIN CONNECTIONS (Top view)

GND

N.C.

VS_A

1

GND

N.C.

VS_B

36

35

34

33

32

31

30

29

28

27

26

25

24

23

22

21

20

19

2

H

1

24

23

22

21

20

19

18

17

16

15

14

13

H

3

1

3

4

DIAG

SENSE_A

RCOFF

2

OUT

2

5

OUT

3

VCP

OUT

VS_A

N.C.

VCP

6

N.C.

4

2

7

VBOOT

BRAKE

VREF

EN

OUT

5

1

H

2

8

GND

6

GND

VS_B

H

3

9

7

H

1

10

11

12

13

14

15

16

17

18

TACHO

RCPULSE

SENSE_B

FWD/REV

EN

8

DIAG

SENSE_A

RCOFF

N.C.

FWD/REV

SENSE_B

RCPULSE

N.C.

9

OUT

3

10

11

12

VBOOT

BRAKE

VREF

OUT

1

TACHO

N.C.

GND

D01IN1194A

N.C.

GND

D01IN1195A

(5)

PowerDIP24/SO24

PowerSO36

(5) The slug is internally connected to pins 1, 18, 19 and 36 (GND pins).

3/25

L6235

PIN DESCRIPTION

PACKAGE

SO24/

PowerDIP24

PowerSO36

Name

Type

Function

PIN #

10

1

2

H

1

Sensor Input Single Ended Hall Effect Sensor Input 1.

11

DIAG

Open Drain Overcurrent Detection and Thermal Protection pin. An

Output

internal open drain transistor pulls to GND when an

overcurrent on one of the High Side MOSFETs is

detected or during Thermal Protection.

3

4

5

12

13

15

SENSE

Power Supply Half Bridge 1 and Half Bridge 2 Source Pin. This pin

A

must be connected together with pin SENSE to

B

Power Ground through a sensing power resistor.

RCOFF

RC Pin

RC Network Pin. A parallel RC network connected

between this pin and ground sets the Current

Controller OFF-Time.

OUT

Power Output Output 1

1

6, 7,

1, 18,

GND

GND Ground terminals. On PowerDIP24 and SO24

18, 19

19, 36

packages, these pins are also used for heat

dissipation toward the PCB. On PowerSO36 package

the slug is connected on these pins.

8

9

22

24

TACHO

Open Drain Frequency-to-Voltage open drain output. Every pulse

Output

from pin H is shaped as a fixed and adjustable length

1

pulse.

RCPULSE

RC Pin

RC Network Pin. A parallel RC network connected

between this pin and ground sets the duration of the

Monostable Pulse used for the Frequency-to-Voltage

converter.

10

11

12

25

26

27

SENSE

Power Supply Half Bridge 3 Source Pin. This pin must be connected

B

together with pin SENSE to Power Ground through a

A

sensing power resistor. At this pin also the Inverting

Input of the Sense Comparator is connected.

FWD/REV

EN

Logic Input

Selects the direction of the rotation. HIGH logic level

sets Forward Operation, whereas LOW logic level sets

Reverse Operation.

If not used, it has to be connected to GND or +5V..

Chip Enable. LOW logic level switches OFF all Power

MOSFETs.

If not used, it has to be connected to +5V.

13

14

28

29

VREF

Logic Input

Current Controller Reference Voltage.

Do not leave this pin open or connect to GND.

BRAKE

Brake Input pin. LOW logic level switches ON all High

Side Power MOSFETs, implementing the Brake

Function.

If not used, it has to be connected to +5V.

15

30

VBOOT

Supply Voltage Bootstrap Voltage needed for driving the upper Power

MOSFETs.

16

17

32

33

OUT

Power Output Output 3.

3

VS

Power Supply Half Bridge 3 Power Supply Voltage. It must be

B

connected to the supply voltage together with pin VS .

A

4/25

L6235

PIN DESCRIPTION (continued)

PACKAGE

SO24/

PowerSO36

PowerDIP24

Name

Type

Function

PIN #

20

4

VS

Power Supply Half Bridge 1 and Half Bridge 2 Power Supply Voltage.

It must be connected to the supply voltage together

A

with pin VS .

B

21

22

23

24

5

7

8

9

OUT

Power Output Output 2.

Output Charge Pump Oscillator Output.

2

VCP

H

Sensor Input Single Ended Hall Effect Sensor Input 2.

Sensor Input Single Ended Hall Effect Sensor Input 3.

2

3

H

ELECTRICAL CHARACTERISTICS

(V = 48V , T

S

= 25 °C , unless otherwise specified)

amb

Symbol

Parameter

Test Conditions

Min

6.6

5.6

Typ

7

Max

7.4

6.4

10

Unit

V

Turn ON threshold

Sth(ON)

V

Turn OFF threshold

Quiescent Supply Current

6

V

Sth(OFF)

I

All Bridges OFF;

5

mA

S

(6)

Tj = -25 to 125°C

T

Thermal Shutdown Temperature

165

°C

J(OFF)

Output DMOS Transistors

R

High-Side Switch ON Resistance

Low-Side Switch ON Resistance

Leakage Current

T = 25 °C

0.34

0.53

0.4

Ω

DS(ON)

j

(6)

0.59

T =125 °C

j

T = 25 °C

j

0.28

0.47

0.34

0.53

Ω

T =125 °C

j

I

EN = Low; OUT = V

2

mA

DSS

CC

EN = Low; OUT = GND

-0.15

Source Drain Diodes

V

Forward ON Voltage

I

= 2.8A, EN = LOW

1.15

300

200

1.3

V

SD

t

Reverse Recovery Time

Forward Recovery Time

I = 2.8A

f

ns

rr

t

fr

Logic Input (H1, H2, H3, EN, FWD/REV, BRAKE)

V

Low level logic input voltage

High level logic input voltage

Low level logic input current

High level logic input current

Turn-ON Input Threshold

-0.3

2

0.8

7

V

IL

IH

IL

V

I

GND Logic Input Voltage

7V Logic Input Voltage

-10

µA

V

I

10

IH

V

1.8

1.3

0.5

2.0

th(ON)

V

Turn-OFF Input Threshold

Input Thresholds Hysteresys

0.8

V

th(OFF)

V

0.25

V

thHYS

5/25

L6235

ELECTRICAL CHARACTERISTICS (continued)

(V = 48V , T

S

= 25 °C , unless otherwise specified)

amb

Symbol

Parameter

Test Conditions

Min

Typ

Max

Unit

Switching Characteristics

(7)

t

I

= 2.8 A, Resistive Load

110

300

250

550

400

800

2

ns

µs

D(on)EN

D(off)EN

LOAD

Enable to out turn-ON delay time

Enable to out turn-OFF delay time

(7)

t

Other Logic Inputs to Output Turn-

ON delay Time

D(on)IN

D(off)IN

t

Other Logic Inputs to out Turn-OFF

delay Time

I

= 2.8 A, Resistive Load

2

µs

LOAD

(7)

t

I

= 2.8 A, Resistive Load

40

250

ns

RISE

FALL

LOAD

Output Rise Time

(7)

LOAD

Output Fall Time

t

Dead Time

0.5

1

µs

DT

(6)

f

Charge Pump Frequency

0.6

1

MHz

CP

Tj = -25 to 125°C

PWM Comparator and Monostable

I

Source current at pin RC

V

= 2.5 V

RCOFF

3.5

5.5

±5

mA

mV

RCOFF

OFF

V

Offset Voltage on Sense

Comparator

V

ref

= 0.5 V

OFFSET

(8)

t

V

ref

= 0.5 V

500

1

ns

µs

prop

Turn OFF Propagation delay

t

Internal Blanking Time on Sense

Comparator

blank

t

Minimum on Time

1.5

13

2

µs

µA

ON(min)

t

PWM RecirculationTime

R

= 20kΩ ; C

=1nF

OFF

= 100kΩ ; C

=1nF

61

OFF

I

Input Bias Current at pin VREF

10

BIAS

Tacho Monostable

I

Source Current at pin RCPULSE

Monostable of Time

V

= 2.5V

3.5

4.0

5.5

12

mA

µs

Ω

RCPULSE

t

R

= 20kΩ ; C

=1nF

PULSE

PUL

R

= 100kΩ ; C

=1nF

60

PUL

(6)

R

Open Drain ON Resistance

40

60

TACHO

Over Current Detection & Protection

I

Supply Overcurrent Protection

Threshold

5.6

7.1

60

A

SOVER

T = -25 to 125°C

J

R

OPDR

Open Drain ON Resistance

I

= 4mA

40

1

Ω

DIAG

I

OCD high level leakage current

V

DIAG

= 5V

µA

ns

OH

(9)

t

I

= 4mA; C

< 100pF

200

OCD(ON)

OCD(OFF)

DIAG

OCD Turn-ON Delay Time

(9)

t

I

100

ns

DIAG

OCD Turn-OFF Delay Time

(6) Tested at 25°C in a restricted range and guaranteed by characterization.

(7) See Fig. 1.

(8) Measured applying a voltage of 1V to pin SENSE and a voltage drop from 2V to 0V to pin VREF.

(9) See Fig. 2.

6/25

L6235

Figure 1. Switching Characteristic Definition

EN

V_th(ON)

V_th(OFF)

t

I_OUT

90%

10%

t

D01IN1316

t_FALL

t_RISE

t_D(OFF)EN

t_D(ON)EN

Figure 2. Overcurrent Detection Timing Definition

I

OUT

I

SOVER

ON

BRIDGE

OFF

V

DIAG

90%

10%

D02IN1387

t

OCD(OFF)

OCD(ON)

7/25

L6235

CIRCUIT DESCRIPTION

LOGIC INPUTS

Pins FWD/REV, BRAKE, EN, H , H and H are TTL/

CMOS and µC compatible logic inputs. The internal

structure is shown in Figure 4. Typical value for turn-

POWER STAGES and CHARGE PUMP

1

2

3

The L6235 integrates a Three-Phase Bridge, which

consists of 6 Power MOSFETs connected as shown

on the Block Diagram. Each Power MOS has an

ON and turn-OFF thresholds are respectively V

th(ON)

R

= 0.3Ω (typical value @25°C) with intrinsic

DS(ON)

= 1.8V and V

= 1.3V.

th(OFF)

fast freewheeling diode. Switching patterns are gen-

erated by the PWM Current Controller and the Hall

Effect Sensor Decoding Logic (see relative para-

graphs). Cross conduction protection is implemented

Pin EN (enable) may be used to implement Overcurrent

and Thermal protection by connecting it to the open col-

lector DIAG output If the protection and an external dis-

able function are both desired, the appropriate

connection must be implemented. When the external

signal is from an open collector output, the circuit in Fig-

ure 5 can be used . For external circuits that are push

pull outputs the circuit in Figure 6 could be used. The re-

by using a dead time (t = 1µs typical value) set by

DT

internal timing circuit between the turn off and turn on

of two Power MOSFETs in one leg of a bridge.

Pins VS and VS MUST be connected together to

A

B

the supply voltage (V ).

S

sistor R should be chosen in the range from 2.2K

Ω

to

EN

Using N-Channel Power MOS for the upper transis-

tors in the bridge requires a gate drive voltage above

the power supply voltage. The Bootstrapped Supply

180K

Ω. Recommended values for R and C are re-

EN

spectively 100K

Ω

and 5.6nF. More information for se-

lecting the values can be found in the Overcurrent

Protection section.

(V ) is obtained through an internal oscillator and

BOOT

few external components to realize a charge pump

circuit as shown in Figure 3. The oscillator output (pin

VCP) is a square wave at 600KHz (typically) with 10V

amplitude. Recommended values/part numbers for

the charge pump circuit are shown in Table1.

Figure 4. Logic Input Internal Structure

5V

Table 1. Charge Pump External Component

Values.

ESD

PROTECTION

C

R

D

220nF

BOOT

10nF

P

1

2

D01IN1329

100Ω

1N4148

Figure 5. Pin EN Open Collector Driving

DIAG

5V

Figure 3. Charge Pump Circuit

5V

R_EN

OPEN

COLLECTOR

OUTPUT

V_S

EN

C_EN

ESD

PROTECTION

D1

D2

C_BOOT

D02IN1378

R_P

C_P

Figure 6. Pin EN Push-Pull Driving

DIAG

D01IN1328

VCP

VBOOT

VS_AVS_B

5V

R_EN

PUSH-PULL

EN

OUTPUT

C_EN

ESD

PROTECTION

D02IN1379

8/25

L6235

PWM CURRENT CONTROL

The L6235 includes a constant off time PWM Current Controller. The current control circuit senses the bridge

current by sensing the voltage drop across an external sense resistor connected between the source of the

three lower power MOS transistors and ground, as shown in Figure 7. As the current in the motor increases the

voltage across the sense resistor increases proportionally. When the voltage drop across the sense resistor be-

comes greater than the voltage at the reference input pin VREF the sense comparator triggers the monostable

switching the bridge off. The power MOS remain off for the time set by the monostable and the motor current

recirculates around the upper half of the bridge in Slow Decay Mode as described in the next section. When the

monostable times out, the bridge will again turn on. Since the internal dead time, used to prevent cross conduc-

tion in the bridge, delays the turn on of the power MOS, the effective Off Time t

time plus the dead time.

is the sum of the monostable

OFF

Figure 8 shows the typical operating waveforms of the output current, the voltage drop across the sensing re-

sistor, the pin RC voltage and the status of the bridge. More details regarding the Synchronous Rectification and

the output stage configuration are included in the next section.

Immediately after the Power MOS turn on, a high peak current flows through the sense resistor due to the re-

verse recovery of the freewheeling diodes. The L6235 provides a 1µs Blanking Time t

that inhibits the

BLANK

comparator output so that the current spike cannot prematurely retrigger the monostable.

Figure 7. PWM Current Controller Simplified Schematic

VS

VS_B

VS_A

BLANKING TIME

TO GATE

LOGIC

MONOSTABLE

1µs

FROM THE

LOW-SIDE

GATE DRIVERS

5mA

MONOSTABLE

SET

BLANKER

S

R

OUT

2

3

1

Q

(0)

(1)

DRIVERS

+

DRIVERS

+

-

DEAD TIME

DRIVERS

+

5V

DEAD TIME

2.5V

+

-

SENSE

COMPARATOR

RCOFF

R_OFF

SENSE

A

VREF

B

C_OFF

R

SENSE

D02IN1380

9/25

L6235

Figure 8. Output Current Regulation Waveforms

I

OUT

V

REF

R

SENSE

t

OFF

ON

1µs t

BLANK

V

BLANK

SENSE

V

REF

Slow Decay

0

t

V

RCRISE

RC

5V

2.5V

t

RCFALL

1µs t

DT

ON

SYNCHRONOUS RECTIFICATION

D02IN1351

OFF

B

C

D

A

B

C

D

Figure 9 shows the magnitude of the Off Time t

culated from the equations:

versus C

and R

values. It can be approximately cal-

OFF

t

= 0.6 · R

· C

RCFALL

OFF OFF

= t

+ t = 0.6 · R

· C + t

OFF DT

OFF

RCFALL

DT

OFF

where R

and C

are the external component values and t is the internally generated Dead Time with:

OFF DT

OFF

20KΩ ≤

0.47nF

= 1µs (typical value)

R

≤

100K

≤ 100nF

OFF

Ω

OFF

≤

C

t

DT

Therefore:

t

= 6.6µs

OFF(MIN)

= 6ms

OFF(MAX)

These values allow a sufficient range of t

to implement the drive circuit for most motors.

OFF

The capacitor value chosen for C

also affects the Rise Time t

of the voltage at the pin RCOFF. The

OFF

RCRISE

Rise Time t

will only be an issue if the capacitor is not completely charged before the next time the

RCRISE

monostable is triggered. Therefore, the On Time t , which depends by motors and supply parameters, has to

ON

be bigger than t

for allowing a good current regulation by the PWM stage. Furthermore, the On Time t

RCRISE

ON

can not be smaller than the minimum on time t

.

ON(MIN)

t

_ON> t_ON(MIN)= 1.5µs (typ. value)

_ON> t_RCRISE– t_DT

t

= 600 · C

OFF

RCRISE

10/25

L6235

Figure 10 shows the lower limit for the On Time t

for having a good PWM current regulation capacity. It has

ON

to be said that t is always bigger than t

because the device imposes this condition, but it can be smaller

ON

ON(MIN)

than t

- t . In this last case the device continues to work but the Off Time t

is not more constant.

RCRISE DT

OFF

So, small C

value gives more flexibility for the applications (allows smaller On Time and, therefore, higher

OFF

switching frequency), but, the smaller is the value for C

performance.

, the more influential will be the noises on the circuit

OFF

Figure 9. t

versus C

and R

.

OFF

4

.

1 10

Ω

= 100k

R_off

3

.

1 10

Ω

= 47k

R_off

Ω

= 20k

R_off

100

10

1

0.1

1

10

100

Coff [nF]

Figure 10. Area where t can vary maintaining the PWM regulation.

ON

100

10

µ

1.5 s (typ. value)

1

0.1

1

10

100

Coff [nF]

11/25

L6235

SLOW DECAY MODE

Figure 11 shows the operation of the bridge in the Slow Decay mode during the Off Time. At any time only two

legs of the three-phase bridge are active, therefore only the two active legs of the bridge are shown in the figure

and the third leg will be off. At the start of the Off Time, the lower power MOS is switched off and the current

recirculates around the upper half of the bridge. Since the voltage across the coil is low, the current decays slow-

ly. After the Dead Time the upper power MOS is operated in the synchronous rectification mode reducing the

impendence of the freewheeling diode and the related conducting losses. When the monostable times out, up-

per MOS that was operating the synchronous mode turns off and the lower power MOS is turned on again after

some delay set by the Dead Time to prevent cross conduction.

Figure 11. Slow Decay Mode Output Stage Configurations

A) ON TIME

B) 1µs DEAD TIME

C) SYNCHRONOUS

RECTIFICATION

D) 1µs DEAD TIME

D01IN1336

DECODING LOGIC

The Decoding Logic section is a combinatory logic that provides the appropriate driving of the three-phase

bridge outputs according to the signals coming from the three Hall Sensors that detect rotor position in a 3-

phase BLDC motor. This novel combinatory logic discriminates between the actual sensor positions for sensors

spaced at 60, 120, 240 and 300 electrical degrees. This decoding method allows the implementation of a uni-

versal IC without dedicating pins to select the sensor configuration.

There are eight possible input combinations for three sensor inputs. Six combinations are valid for rotor posi-

tions with 120 electrical degrees sensor phasing (see Figure 12, positions 1, 2, 3a, 4, 5 and 6a) and six combi-

nations are valid for rotor positions with 60 electrical degrees phasing (see Figure 14, positions 1, 2, 3b, 4, 5

and 6b). Four of them are in common (1, 2, 4 and 5) whereas there are two combinations used only in 120 elec-

trical degrees sensor phasing (3a and 6a) and two combinations used only in 60 electrical degrees sensor phas-

ing (3b and 6b).

The decoder can drive motors with different sensor configuration simply by following the Table 2. For any input

configuration (H , H and H ) there is one output configuration (OUT , OUT and OUT ). The output configura-

1

2

3

1

2

3

tion 3a is the same than 3b and analogously output configuration 6a is the same than 6b.

The sequence of the Hall codes for 300 electrical degrees phasing is the reverse of 60 and the sequence of the

Hall codes for 240 phasing is the reverse of 120. So, by decoding the 60 and the 120 codes it is possible to drive

the motor with all the four conventions by changing the direction set.

12/25

L6235

Table 2. 60 and 120 Electrical Degree Decoding Logic in Forward Direction.

Hall 120°

Hall 60°

1

2

3a

-

3b

4

5

6a

-

6b

H

1

H

2

H

3

H

L

H

L

H

L

H

L

H

L

OUT

Vs

High Z

Vs

GND

Vs

GND

Vs

GND

High Z

Vs

High Z

GND

Vs

1

2

3

High Z

GND

1->3

GND

High Z

1->2

GND

High Z

1->2

GND

2->3

High Z

2->1

High Z

2->1

Phasing

3->1

3->2

Figure 12. 120° Hall Sensor Sequence.

H₁

H₃

H₂H₃

H₂

1

2

3a

4

5

6a

= H

= L

Figure 13. 60° Hall Sensor Sequence.

H₁

H₂

H₃

1

2

3b

4

5

6b

= H

= L

13/25

L6235

TACHO

A tachometer function consists of a monostable, with constant off time (t ), whose input is one Hall Effect

PULSE

signal (H ). It allows developing an easy speed control loop by using an external op amp, as shown in Figure

1

14. For component values refer to Application Information section.

The monostable output drives an open drain output pin (TACHO). At each rising edge of the Hall Effect Sensors

H , the monostable is triggered and the MOSFET connected to pin TACHO is turned off for a constant time

1

t

(see Figure 15). The off time t

can be set using the external RC network (R

, C ) connected

PUL PUL

PULSE

to the pin RCPULSE. Figure 16 gives the relation between t

and C

, R . We have approximately:

PUL PUL

PULSE

t

= 0.6 · R

· C

PUL PUL

PULSE

where C

should be chosen in the range 1nF … 100nF and R

in the range 20KΩ … 100KΩ.

PUL

By connecting the tachometer pin to an external pull-up resistor, the output signal average value V is propor-

M

tional to the frequency of the Hall Effect signal and, therefore, to the motor speed. This realizes a simple Fre-

quency-to-Voltage Converter. An op amp, configured as an integrator, filters the signal and compares it with a

reference voltage V , which sets the speed of the motor.

REF

t_PULSE

-----------------

T

V_M

=

V _DD

Figure 14. Tacho Operation Waveforms.

H₁

H₂

H₃

V_TACHO

V_M

V_DD

t_PULSE

T

14/25

L6235

Figure 15. Tachometer Speed Control Loop.

H₁

RCPULSE

TACHO

MONOSTABLE

V_DD

R_PUL

C_PUL

R_DD

R₃

TACHO

C₁

R₄

VREF

C_REF1

R₁

V_REF

C_REF2

R₂

Figure 16. t

versus C

and R

.

PUL

PULSE

PUL

4

.

1 10

Ω

= 100k

R_PUL

Ω

= 47k

R_PUL

3

.

1 10

Ω

= 20k

R_PUL

100

10

1

10

Cpul [nF]

100

15/25

L6235

NON-DISSIPATIVE OVERCURRENT DETECTION and PROTECTION

The L6235 integrates an Overcurrent Detection Circuit (OCD) for full protection. This circuit provides Output-to-

Output and Output-to-Ground short circuit protection as well. With this internal over current detection, the exter-

nal current sense resistor normally used and its associated power dissipation are eliminated. Figure 17 shows

a simplified schematic for the overcurrent detection circuit.

To implement the over current detection, a sensing element that delivers a small but precise fraction of the out-

put current is implemented with each High Side power MOS. Since this current is a small fraction of the output

current there is very little additional power dissipation. This current is compared with an internal reference cur-

rent I

. When the output current reaches the detection threshold (typically I

= 5.6A) the OCD compar-

REF

SOVER

ator signals a fault condition. When a fault condition is detected, an internal open drain MOS with a pull down

capability of 4mA connected to pin DIAG is turned on.

The pin DIAG can be used to signal the fault condition to a µC or to shut down the Three-Phase Bridge simply

by connecting it to pin EN and adding an external R-C (see R , C ).

EN EN

Figure 17. Overcurrent Protection Simplified Schematic

OUT₁VS_AOUT₂

OUT₃VS_B

HIGH SIDE DMOS

I₁

HIGH SIDE DMOS

I₂

HIGH SIDE DMOS

I₃

POWER SENSE

1 cell

TO GATE

POWER SENSE

1 cell

POWER DMOS

n cells

POWER DMOS

n cells

POWER DMOS

n cells

1 cell

µC or LOGIC

+

LOGIC

V_DD

I₁/ n

I₂/ n

OCD

COMPARATOR

R_EN

C_EN

EN

I₁+I₂/ n

I_REF

INTERNAL

OPEN-DRAIN

DIAG

R_DS(ON)

40Ω TYP.

OVER TEMPERATURE

I₃/ n

I_REF

D02IN1381

Figure 18 shows the Overcurrent Detetection operation. The Disable Time t

before recovering normal

DISABLE

operation can be easily programmed by means of the accurate thresholds of the logic inputs. It is affected

whether by C and R values and its magnitude is reported in Figure 19. The Delay Time t before turn-

EN

DELAY

ing off the bridge when an overcurrent has been detected depends only by C value. Its magnitude is reported

EN

in Figure 20.

C

EN

is also used for providing immunity to pin EN against fast transient noises. Therefore the value of C

EN

should be chosen as big as possible according to the maximum tolerable Delay Time and the R value should

EN

be chosen according to the desired Disable Time.

The resistor R should be chosen in the range from 2.2K

Ω

to 180K

Ω. Recommended values for R and C

EN EN

EN

are respectively 100K

Ω and 5.6nF that allow obtaining 200µs Disable Time.

16/25

L6235

Figure 18. Overcurrent Protection Waveforms

I_OUT

I_SOVER

V_EN=V_DIAG

V_DD

V_th(ON)

V_th(OFF)

V_EN(LOW)

ON

OCD

OFF

ON

t_DELAY

t_DISABLE

BRIDGE

OFF

t_OCD(ON)t_EN(FALL)

t_OCD(OFF)

t_EN(RISE)

t_D(ON)EN

t_D(OFF)EN

D02IN1383

Figure 19. t

versus C and R

.

EN

DISABLE

EN

Ω

R _{E N}= 10 0 k

R _{E N}

=

22 0 k

3

.

Ω

R _EN

=

47 k

33 k

1

1 0

Ω

R _EN

=

10 k

1 0 0

1 0

1

1 0

1 0 0

C _{E N}[n F ]

Figure 20. t

versus C

.

EN

DELAY

10

1

0.1

1

10

100

Cen [nF]

17/25

L6235

APPLICATION INFORMATION

A typical application using L6235 is shown in Figure 21. Typical component values for the application are shown

in Table 3. A high quality ceramic capacitor (C ) in the range of 100nF to 200nF should be placed between the

2

power pins VS and VS and ground near the L6235 to improve the high frequency filtering on the power supply

A

B

and reduce high frequency transients generated by the switching. The capacitor (C ) connected from the EN

EN

input to ground sets the shut down time when an over current is detected (see Overcurrent Protection). The two

current sensing inputs (SENSE and SENSE ) should be connected to the sensing resistor R with a trace

A

B

SENSE

length as short as possible in the layout. The sense resistor should be non-inductive resistor to minimize the di/

dt transients across the resistor. To increase noise immunity, unused logic pins are best connected to 5V (High

Logic Level) or GND (Low Logic Level) (see pin description). It is recommended to keep Power Ground and

Signal Ground separated on PCB.

Table 3. Component Values for Typical Application.

C

100µF

100nF

220nF

1nF

R

5K6Ω

1K8Ω

4K7Ω

1MΩ

1

2

3

1

2

3

4

C

BOOT

C

OFF

R

1KΩ

DD

C

10nF

100KΩ

100Ω

0.3Ω

PUL

EN

C

33nF

R

P

REF1

REF2

100nF

5.6nF

10nF

R

SENSE

C

R

33KΩ

47KΩ

10KΩ

EN

OFF

C

P

PUL

D

1N4148

R

H1

, R , R

H3

1

2

H2

D

Figure 21. Typical Application

R₁

VS_A

VS_B

VREF

C_REF1

+

V_REF

C_REF2

+

20

17

13

-

V_S

8-52V_DC

C₁

C₂

R₂

C₃

POWER

GROUND

-

D₁

C_P

R_P

VCP

22

DIAG

EN

D₂

2

R₄

C_BOOT

R_EN

C_EN

VBOOT

SENSE_A

SENSE_B

15

3

12

ENABLE

SIGNAL

GROUND

R_SENSE

R₃

11

14

FWD/REV

BRAKE

10

FWD/REV

BRAKE

THREE-PHASE MOTOR

OUT

1

2

3

5

HALL

M

21

16

SENSOR

8

4

9

+5V

R_H1

TACHO

C_OFF

R_DD

H

1

2

3

1

R_H2

R_H3

5V

23

24

RCOFF

R_OFF

C_PUL

18

19

6

RCPULSE

7

R_PUL

GND

D02IN1357

18/25

L6235

OUTPUT CURRENT CAPABILITY AND IC POWER DISSIPATION

In Figure 22 is shown the approximate relation between the output current and the IC power dissipation using

PWM current control.

For a given output current the power dissipated by the IC can be easily evaluated, in order to establish which

package should be used and how large must be the on-board copper dissipating area to guarantee a safe op-

erating junction temperature (125°C maximum).

Figure 22. IC Power Dissipation versus Output Power.

I₁

I_OUT

10

I₂

I_OUT

8

6

4

2

0

P_D[W]

I₃

I_OUT

Test Conditions:

Supply Voltage = 24 V

No PWM

f_SW= 30 kHz (slow decay)

0

0.5

1

1.5

2

2.5

3

I_OUT[A]

THERMAL MANAGEMENT

In most applications the power dissipation in the IC is the main factor that sets the maximum current that can

be delivered by the device in a safe operating condition. Selecting the appropriate package and heatsinking con-

figuration for the application is required to maintain the IC within the allowed operating temperature range for

the application. Figures 23, 24 and 25 show the Junction-to-Ambient Thermal Resistance values for the

PowerSO36, PowerDIP24 and SO24 packages.

For instance, using a PowerSO package with copper slug soldered on a 1.5mm copper thickness FR4 board

2

with 6cm dissipating footprint (copper thickness of 35

µ

m), the R

is about 35°C/W. Figure 26 shows

th(j-amb)

mounting methods for this package. Using a multi-layer board with vias to a ground plane, thermal impedance

can be reduced down to 15°C/W.

Figure 23. PowerSO36 Junction-Ambient thermal resistance versus on-board copper area.

ºC / W

43

38

33

W ithout Ground Layer

28

W ith Ground Layer

W ith Ground Layer+16 via

H oles

23

On-Board Copper Area

18

13

1

2

3

4

5

6

7

8

9

10 11 12 13

sq. cm

19/25

L6235

Figure 24. PowerDIP24 Junction-Ambient thermal resistance versus on-board copper area.

ºC / W

On-Board Copper Area

49

48

Copper Are a is on Bottom

S ide

47

46

Copper Are a is on To p Side

45

44

43

42

41

40

39

1

2

3

4

5

6

7

8

9

10 11 12

sq. cm

Figure 25. SO24 Junction-Ambient thermal resistance versus on-board copper area.

ºC / W

On-Board Copper Area

68

66

64

62

60

C o pp er Are a is on Top Sid e

58

56

54

52

50

48

1

2

3

4

5

6

7

8

9

10 11 12

sq. cm

Figure 26. Mounting the PowerSO Package.

Slug soldered

to PCB with

dissipating area

Slug soldered

Slug soldered to PCB with

dissipating area plus ground layer

contacted through via holes

to PCB with

dissipating area

plus ground layer

20/25

L6235

Figure 27. Typical Quiescent Current vs.

Supply Voltage

Figure 30. Typical High-Side R

Supply Voltage

vs.

DS(ON)

Iq [mA]

5.6

Ω

[ ]

R_DS(ON)

f

= 1kHz

T = 25°C

j

0.380

0.376

0.372

0.368

0.364

0.360

0.356

0.352

0.348

0.344

0.340

0.336

sw

T = 85°C

j

5.4

5.2

5.0

4.8

4.6

T = 25°C

j

T = 125°C

j

0

10

20

30

40

50

60

0

5

10

15

20

25

30

V_S[V]

Figure 28. Normalized Typical Quiescent

Current vs. Switching Frequency

Figure 31. Normalized R

vs.Junction

DS(ON)

Temperature (typical value)

Iq / (Iq @ 1 kHz)

1.7

R_DS(ON)/ (R_DS(ON)@ 25 °C)

1.8

1.6

1.4

1.2

1.0

0.8

1.6

1.5

1.4

1.3

1.2

1.1

1.0

0.9

0

20

40

60

80

100

120

140

0

20

40

60

80

100

Tj [°C]

f_SW[kHz]

Figure 29. Typical Low-Side R

Voltage

vs. Supply

Figure 32. Typical Drain-Source Diode Forward

ON Characteristic

DS(ON)

Ω

[ ]

R_DS(ON)

0.300

I_SD[A]

3.0

T = 25°C

j

0.296

0.292

0.288

0.284

0.280

0.276

2.5

2.0

1.5

1.0

0.5

0.0

T = 25°C

j

700

800

900

1000

V_SD[mV]

1100

1200

1300

0

5

10

15

_S[V]

20

25

30

V

21/25

L6235

mm

inch

DIM.

MIN. TYP. MAX. MIN. TYP. MAX.

OUTLINE AND

MECHANICAL DATA

A

a1

a2

a3

b

3.60

0.141

0.012

0.130

0.004

0.015

0.012

0.630

0.385

0.570

0.10

0.30 0.004

3.30

0

0.10

0

0.22

0.23

0.38 0.008

0.32 0.009

16.00 0.622

9.80 0.370

14.50 0.547

c

D (1) 15.80

D1

E

9.40

13.90

e

0.65

0.0256

0.435

e3

11.05

E1 (1) 10.90

E2

11.10 0.429

2.90

0.437

0.114

0.244

0.126

0.004

0.626

0.043

E3

E4

G

H

5.80

2.90

0

6.20 0.228

3.20 0.114

0.10

0

15.50

15.90 0.610

1.10

h

L

0.80

1.10 0.031

10°(max.)

8 °(max.)

N

S

PowerSO36

(1): "D" and "E1" do not include mold flash or protrusions

- Mold flash or protrusions shall not exceed 0.15mm (0.006 inch)

- Critical dimensions are "a3", "E" and "G".

N

a2

A

c

a1

e

A

DETAIL B

lead

E

DETAIL A

e3

H

DETAIL A

D

slug

a3

BOTTOM VIEW

36

19

E3

B

E1

E2

D1

DETAIL B

0.35

Gage Plane

- C -

SEATING PLANE

1

8

S

L

G

C

M

b

0.12

A B

PSO36MEC

h x 45˚

(COPLANARITY)

22/25

L6235

mm

MIN. TYP. MAX. MIN. TYP. MAX.

4.320 0.170

inch

DIM.

OUTLINE AND

MECHANICAL DATA

A

A1

A2

B

0.380

0.015

3.300

0.130

0.410 0.460 0.510 0.016 0.018 0.020

1.400 1.520 1.650 0.055 0.060 0.065

0.200 0.250 0.300 0.008 0.010 0.012

31.62 31.75 31.88 1.245 1.250 1.255

B1

c

D

E

7.620

8.260 0.300

0.325

e

2.54

0.100

E1

6.350 6.600 6.860 0.250 0.260 0.270

0.300

7.620

e1

L

3.180

3.430 0.125

0.135

Powerdip 24

M

0˚ min, 15˚ max.

E1

A2

A

A1

L

B

B1

e

e1

D

24

1

13

12

c

M

SDIP24L

23/25

L6235

mm

inch

DIM.

OUTLINE AND

MECHANICAL DATA

MIN.

2.35

0.10

0.33

0.23

15.20

TYP. MAX. MIN.

2.65 0.093

0.30 0.004

0.51 0.013

0.32 0.009

15.60 0.598

TYP. MAX.

0.104

A

A1

B

0.012

0.200

Weight: 0.60gr

C

0.013

(1)

0.614

D

E

e

7.40

7.60 0.291

1.27

0.299

0.050

H

10.0

0.25

0.40

10.65 0.394

0;75 0.010

1.27 0.016

0˚ (min.), 8˚ (max.)

0.10

0.419

h

0.030

L

0.050

k

ddd

0.004

SO24

(1) “D” dimension does not include mold flash, protusions or gate

burrs. Mold flash, protusions or gate burrs shall not exceed

0.15mm per side.

0070769 C

24/25

L6235

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences

of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted

by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject

to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not

authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.

The ST logo is a registered trademark of STMicroelectronics.

All other names are the property of their respective owners

STMicroelectronics GROUP OF COMPANIES

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25/25

型号	制造商	描述	价格	文档
L6235PD013TR	STMICROELECTRONICS	DMOS驱动器，用于三相无刷DC电机	获取价格
L6235Q	STMICROELECTRONICS	DMOS驱动器，用于三相无刷DC电机	获取价格
L6236	ETC	Industrial Control IC	获取价格
L6237	ETC		获取价格
L6238	STMICROELECTRONICS	SENSORLESS SPINDLE MOTOR CONTROLLER	获取价格
L6238S	STMICROELECTRONICS	12V SENSORLESS SPINDLE MOTOR CONTROLLER	获取价格
L6238S013TR	STMICROELECTRONICS	BRUSHLESS DC MOTOR CONTROLLER, 5A, PQCC44, PLASTIC, LCC-44	获取价格
L6238SQA	STMICROELECTRONICS	12V SENSORLESS SPINDLE MOTOR CONTROLLER	获取价格
L6238SQT	STMICROELECTRONICS	12V SENSORLESS SPINDLE MOTOR CONTROLLER	获取价格
L6239	ETC		获取价格

L6235PD

L6235PD 概述

L6235PD 数据手册

L6235PD CAD模型

原理图符号

PCB 封装图

3D模型

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