概述
规格参数
数据手册SI9130CG-T1 概述
Pin-Programmable Dual Controller?Portable PCs 引脚可编程双路控制器，便携式电脑 开关式稳压器或控制器
SI9130CG-T1 规格参数
| 是否无铅： | 含铅 | 是否Rohs认证： | 不符合 |
| 生命周期： | Active | 零件包装代码： | SSOP |
| 包装说明： | SSOP, SSOP28,.3 | 针数： | 28 |
| Reach Compliance Code： | unknown | ECCN代码： | EAR99 |
| HTS代码： | 8542.39.00.01 | 风险等级： | 5.18 |
| Is Samacsys： | N | 模拟集成电路 - 其他类型： | DUAL SWITCHING CONTROLLER |
| 控制模式： | CURRENT-MODE | 控制技术： | PULSE WIDTH MODULATION |
| 最大输入电压： | 30 V | 最小输入电压： | 5.5 V |
| 标称输入电压： | 15 V | JESD-30 代码： | R-PDSO-G28 |
| JESD-609代码： | e0 | 长度： | 10.2 mm |
| 功能数量： | 1 | 端子数量： | 28 |
| 最高工作温度： | 70 °C | 最低工作温度： | |
| 封装主体材料： | PLASTIC/EPOXY | 封装代码： | SSOP |
| 封装等效代码： | SSOP28,.3 | 封装形状： | RECTANGULAR |
| 封装形式： | SMALL OUTLINE, SHRINK PITCH | 峰值回流温度（摄氏度）： | 240 |
| 认证状态： | Not Qualified | 座面最大高度： | 2 mm |
| 子类别： | Switching Regulator or Controllers | 表面贴装： | YES |
| 切换器配置： | PUSH-PULL | 最大切换频率： | 330 kHz |
| 技术： | BICMOS | 温度等级： | COMMERCIAL |
| 端子面层： | Tin/Lead (Sn/Pb) | 端子形式： | GULL WING |
| 端子节距： | 0.65 mm | 端子位置： | DUAL |
| 处于峰值回流温度下的最长时间： | 30 | 宽度： | 5.3 mm |
| Base Number Matches： | 1 |
SI9130CG-T1 数据手册
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PDF下载Si9130
Vishay Siliconix
Pin-Programmable Dual Controller—Portable PCs
FEATURES
D Fixed 5-V and Programmable 3.3-V, 3.45 V, or 3.6 V Step-Down
Converters
D Less than 500-mA Quiescent Current per Converter
D 25-mA Shutdown Current
D 5.5-V to 30-V Operating Range
DESCRIPTION
The Si9130 Pin-programmable Dual Controller for Portable
PCs is a pin-programmable version of the Si786 dual-output
power supply controller for notebook computers. The Buck
controllers provide 5 V and a pin-programmable output delivering
3.3 V, 3.45 V, or 3.6 V.
A complete power conversion and management system can
be implemented with the Si9130 Pin-programmable Dual
Controller for Portable PCs, an inexpensive linear regulator,
the Si9140 SMP Controller for High Performance Processor
Power Supplies, five Si4410 n-channel TrenchFETr Power
MOSFETs, one Si4435 p-channel TrenchFET Power
MOSFET, and two Si9712 PC Card (PCMCIA) Interface
Switches.
The circuit is a system level integration of two step-down
controllers and micropower 5-V and 3.3-V linear regulators.
The controllers perform high efficiency conversion of the
battery pack energy (typically 12 V) or the output of an ac to dc
wall converter (typically 18-V to 24-V dc) to 5-V and 3.3-V
system supply voltages. The micropower linear regulator can
be used to keep power management and back-up circuitry
alive during the shutdown of the step-down converters.
The Si9130 is available in both standard and lead (Pb)-free
28-pin SSOP packages and specified to operate over the
commercial (0_C to 70_C) and extended commercial (−10_C
to 90_C) temperature ranges. See Ordering Information for
corresponding part numbers.
FUNCTIONAL BLOCK DIAGRAM
5.5 V to 30 V
3.3 V
mP
Power
Memory
Section
Si9130
5 V
SHUTDOWN
Peripherals
5-V ON/OFF
3.3-V ON/OFF
SYNC
Document Number: 70190
S-40805—Rev. F, 26-Apr-04
www.vishay.com
1
Si9130
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS
V+ to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V t0 36 V
REF, V Short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Momentary
L
REF Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
PGND to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . "2 V
V
L
Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
V
L
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to 7 V
Continuous Power Dissipation (T = 70_C)a
BST , BST to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to 36 V
A
3
5
b
28-Pin SSOP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 762 mW
LX to BST . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -7 V to 0.3 V
3
3
Operating Temperature Range:
LX to BST . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -7 V to 0.3 V
5
5
Si9130CG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to 70_C
Inputs/Outputs to GND
(3.45ADJ, 3.6ADJ, SHDN, ON , REF, SS , CS . FB , SYNC, CS , FB , SS ,
Si9130LG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −10_ to 90_C .
5
5
5
5
3
3
3
Lead Temperature (soldering, 10 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . 300_C
ON ) -0.3 V, (V + 0.3 V)
3)
L
DL , DL to PGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V, (V + 0.3 V)
3
5
L
Notes
DH to LX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V (BST + 0.3 )
3
3
3
a. Device mounted with all leads soldered or welded to PC board.
DH to LX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V (BST + 0.3 )
b. Derate 9.52 mW/_C above 70_C.
5
5
5
Exposure to Absolute Maximum rating conditions for extended periods may affect device reliability. Stresses beyond those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied.
SPECIFICATIONS
LIMITS
Specific Test Conditions
V+ = 15 V, I = I
= 0 mA, SHDN = ON = ON = 5 V
VL
REF
3
5
A
B
A
PARAMETER
MIN
TYP
MAX
UNIT
Other Digital Input Levels 0 V or 5 V, T = T
to T
A
MIN
MAX
3.3-V and 5-V Step-Down Controllers
Input Supply Range
5.5
30
0 mV < (CS -FB ) < 70 mV, 6 V < V + < 30 V
5
5
FB Output Voltage
4.80
3.17
3.32
5.08
3.35
3.50
5.20
3.46
3.60
5
(includes load and line regulation)
3.6ADJ = 3.45ADJ = OPEN
0 mV < (CS -FB ) <
3
3
V
70 mV
3.6ADJ = OPEN
3.45ADJ = GND
FB Output Voltage
3
6 V < V + < 30 V
(includes load and
line regulation)
3.6ADJ = GND
3.46
3.65
3.75
3.45ADJ = OPEN
Load Regulation
Line Regulation
Either Controller (CS_ to FB_ = 0 to 70 mV)
Either Controller (V+ = 6 V to 30 V)
2.5
0.03
100
4.0
%
%/V
mV
mA
Current-Limit Voltage
CS -FB or CS -FB
5
80
2.5
2
120
6.5
3
3
5
SS /SS Source Current
3
5
SS /SS Fault Sink Current
mA
3
5
Internal Regulator and Reference
ON = ON = 0 V, 5.5 V < V+ < 30 V
5
3
V
V
Output Voltage
4.5
5.5
L
L
0 mA < I < 25 mA
L
Fault Lockout Voltage
Falling Edge, Hysteresis = 1%
3.6
4.2
4.2
4.7
3.36
3.2
75
V
V /FB Switchover Voltage
L
Rising Edge of FB , Hysteresis = 1%
5
5
c
REF Output Voltage
No External Load
3.24
2.4
REF Fault Lockout Voltage
REF Load Regulation
Falling Edge
d
0 mA < I < 5 mA
30
mV
L
Document Number: 70190
S-40805—Rev. F, 26-Apr-04
www.vishay.com
2
Si9130
Vishay Siliconix
SPECIFICATIONS
LIMITS
TYP
Specific Test Conditions
V+ = 15 V, I = I
= 0 mA, SHDN = ON = ON = 5 V
VL
REF
3
5
to T
A
B
A
PARAMETER
MIN
MAX
UNIT
Other Digital Input Levels 0 V or 5 V, T = T
A
MIN
MAX
Internal Regulator and Reference (Cont’d)
V+ Shutdown Current
V+ Standby Current
SHDN = ON = ON = 0 V, V+ = 30 V
25
70
40
3
5
mA
ON = ON = 0 V, V+ = 30 V
110
3
5
Quiescent Power Consumption
(both PWM controllers on)
FB = CS = 5.25 V
5 5
5.5
30
8.6
60
mW
FB = CS = 3.5 V
3
3
V+ Off Current
FB = CS = 5.25 V, V Switched Over to FB
mA
5
5
L
5
Oscillator and Inputs/Outputs
SYNC = 3.3 V
270
170
200
200
300
200
330
230
Oscillator Frequency
kHz
ns
SYNC = 0 V, 5 V
SYNC High Pulse Width
SYNC Low Pulse Width
SYNC Rise/Fall Time
Oscillator SYNC Range
Not Tested
200
350
240
89
kHz
%
SYNC = 3.3 V
92
95
Maximum Duty Cycle
Input Low Voltage
SYNC = 0 V, 5 V
92
SHDN, ON , ON SYNC
0.8
3
5
SHDN, ON , ON
3
2.4
V
5
Input High Voltage
Input Current
SYNC
V
L
- 0.5 V
SHDN, ON , ON
V = 0 V, 5 V
IN
"1
mA
3
5
DL /DL Sink/Source Current
V = 2 V
OUT
1
1
3
5
A
DH /DH Sink/Source Current
BST - LX = BST - LX = 4.5 V, V = 2 V
OUT
3
5
3
3
5
5
DL /DL On-Resistance
High or Low
High or Low
7
7
3
5
W
DH /DH On-Resistance
3
5
BST - LX = BST - LX = 4.5 V
3
3
5
5
Notes
a. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum.
b. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
c. The main switching outputs track the reference voltage. Loading the reference reduces the main outputs slightly according to the closed-loop gain (AV ) and
CL
the reference voltage load-regulation error. AV for the 3.3-V supply is unity gain. AV for the 5-V supply is 1.54.
CL
CL
d. Since the reference uses V as its supply, its V+ line regulation error is insignificant.
L
Document Number: 70190
S-40805—Rev. F, 26-Apr-04
www.vishay.com
3
Si9130
Vishay Siliconix
TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)
Efficiency vs. 5-V Output Current, 200 kHz
Efficiency vs. 5-V Output Current, 300 kHz
100
90
80
70
60
50
100
90
80
70
60
50
V
IN
= 6 V
V
IN
= 6 V
V
IN
= 15 V
V
IN
= 15 V
V
IN
= 30 V
V
IN
= 30 V
SYNC = 0 V, 3.3 V Off
3.3 V Off
0.001
0.01
0.1
1
10
0.001
0.01
0.1
5-V Output Current (A)
1
10
5-V Output Current (A)
Efficiency vs. 3.3-V Output Current, 200 kHz
Efficiency vs. 3.3-V Output Current, 300 kHz
100
90
80
70
60
50
100
90
80
70
60
50
V
IN
= 6 V
V
IN
= 6 V
V
IN
= 15 V
V
IN
= 15 V
V
IN
= 30 V
V
IN
= 30 V
SYNC = 0 V, 5 V On
5 V On
0.001
0.01
0.1
3.3-V Output Current (A)
1
10
0.001
0.01
0.1
1
10
3.3-V Output Current (A)
Quiescent Supply Current vs. Supply Voltage
Standby Supply Current vs. Supply Voltage
0.5
0.4
0.3
0.2
0.1
0.0
30
25
20
15
10
5
ON = ON = High
ON = ON = 0 V
3
5
3
5
0
0
6
12
18
24
30
0
6
12
18
24
30
Supply Voltage (V)
Supply Voltage (V)
Document Number: 70190
S-40805—Rev. F, 26-Apr-04
www.vishay.com
4
Si9130
Vishay Siliconix
TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)
Minimum V to V
Differential
IN
OUT
vs. 5-V Output Current
Shutdown Supply Current vs. Supply Voltage
1.0
100
75
50
25
0
5-V Output
Still Regulating
SHDN = 0 V
0.8
0.6
0.4
0.2
0.0
300 kHz
200 kHz
0
6
12
18
24
30
0.001
0.01
0.1
5-V Output Current (A)
1
10
Supply Voltage (V)
Switching Frequency vs. Load Current
1000.0
SYNC = REF (300 kHz)
ON = ON = 5 V
3
5
100.0
10.0
1.0
5 V, V = 30 V
IN
5 V, V = 7.5 V
IN
3.3 V, V = 7.5 V
IN
0.1
0.1
1
10
100
1000
Load Current (mA)
t
LX 10 V/div
5-V Output
50 mV/div
I
= 100 mA
5-V Output Current = 1 A
Load
V
IN
= 10 V
V
IN
= 16 V
Document Number: 70190
S-40805—Rev. F, 26-Apr-04
www.vishay.com
5
Si9130
Vishay Siliconix
TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)
RREN
RRENT
t
put
IN
= 15 V
V
= 15 V
V
IN
t
t
16 V
10 V
LOAD
LOAD
I
= 2 A
I
= 2 A
put
ut
16 V
10 V
LOAD
LOAD
I
= 2 A
I
= 2 A
Document Number: 70190
S-40805—Rev. F, 26-Apr-04
www.vishay.com
6
Si9130
Vishay Siliconix
PIN CONFIGURATION AND DESCRIPTION
CS
FB
3
1
2
28
27
26
25
24
23
22
21
20
19
18
17
16
15
3
SS
3
DH
LX
3
Ordering Information
ON
3
3
3
Standard
Part Number
Lead (Pb)-Free
Part Number
Temperature
NC
NC
BST
3
4
Range
VOUT
DL
V+
5
3
NC
6
Si9130CG
0 to 70_C
3.6ADJ
3.45ADJ
GND
V
L
7
Si9130CG-T1
Si9130LG
Si9130CG-T1—E3
Si9130LG-T1—E3
5 V and 3.3 V
3.45 V or 3.6 V
SSOP-28
FB
5
8
−10 to 90_C
PGND
9
Si9130LG-T1
REF
DL
5
10
11
12
13
14
SYNC
SHDN
BST
5
Demo Board
Temperature Range
Board Type
LX
5
ON
5
DH
5
Si9130DB
0 to 70_C
Surface Mount
SS
5
CS
5
Top View
Pin
Symbol
Description
1
2
CS
Current-sense input for 3.3-V Buck controller—this pins over current threshold is 100 mV with respect to FB .
3
3
SS
3
Soft-start input for 3.3 V. Connect capacitor from SS to GND.
3
3
ON
ON/OFF logic input disables the 3.3-V Buck controller. Connect directly to V for automatic turn-on.
L
3
4
NC
Not internally connected.
5
NC
NC
Not internally connected.
6
Not internally connected.
7
3.6ADJ
3.45ADJ
GND
Control input to select 3.6-V output. See Voltage Selection Table for input and output combinations.
Control input to select 3.45-V output. See Voltage Selection Table for input and output combinations.
Analog ground.
8
9
10
REF
3.3-V reference output. Supplies external loads up to 5 mA.
Oscillator control/synchronization input. Connect capacitor to GND, 1-mF/mA output or 0.22 mF minimum. For external clock
synchronization, a rising edge starts a new cycle to start. To use internal 200-kHz oscillator, connect to VL or GND. For 300-kHz
oscillator, connect to REF.
11
12
SYNC
SHDN
Shutdown logic input, active low. Connect to V for automatic turn-on. The 5-V V supply will not be disabled in shutdown allowing
L
L
connection to SHDN.
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
ON
5
ON/OFF logic input disables the 5-V Buck Controller. Connect to V for automatic turn-on.
L
SS
5
Soft-start control input for 5-V Buck controller. Connect capacitor from SS to GND.
5
CS
5
Current-sense input for 5-V Buck controller—this pins over current threshold is 100 mV referenced to FB .
3
DH
Gate-drive output for the 5-V supply high-side n-channel MOSFET.
Inductor connection for the 5-V supply.
5
LX
5
BST
Boost capacitor connection for the 5-V supply.
Gate-drive output for the 5-V supply rectifying n-channel MOSFET.
Power Ground.
5
DL
5
PGND
FB
Feedback input for the 5-V Buck controller.
5
V
L
5-V logic supply voltage for internal circuitry—able to source 5-mA external loads. V remains on with valid voltage at V+.
L
V+
DL
Supply voltage input.
Gate-drive output for the 3.3-V supply rectifying n-channel MOSFET.
Boost capacitor connection for the 3.3-V supply.
Inductor connection for the 3.3-V supply.
3
BST
3
LX
3
DH
Gate-drive output for the 3.3-V supply high-side n-channel MOSFET.
Feedback input for the 3.3-V Buck controller.
3
3
FB
Document Number: 70190
S-40805—Rev. F, 26-Apr-04
www.vishay.com
7
Si9130
Vishay Siliconix
Voltage Selection Table
Input
Output
3.45ADJ
OPEN
3.6ADJ
OPEN
OPEN
GND
FB3
3.3 V
3.45 V
3.6 V
GND
OPEN
DESCRIPTION OF OPERATION
The Si9130 is a dual step-down converter, which takes a 5.5-V
to 30-V input and supplies power via two PWM controllers (see
Figure 1). These 5-V and 3.3-V supplies run on an optional
300-kHz or 200-kHz internal oscillator, or an external sync
signal. Amount of output current is limited by external
components, but can deliver greater than 6 A on either supply.
As well as these two main Buck controllers, additional loads
can be driven from two micropower linear regulators, one 5 V
(VL) and the other 3.3 V (REF)—see Figure 2. These supplies
are each rated to deliver 5 mA. If the linear regulator circuits fall
out of regulation, both Buck controllers are shut down.
3.3-V PWM Voltage Selection
(Pins 3.45ADJ, 3.6ADJ)
The voltage at this output can be selected to 3.3 V, 3.45 V or
3.6 V, depending on the configuration of pins 3.45ADJ and
3.6ADJ. Leaving both pins open results in 3.3V nominal
output. Grounding pin 3.45ADJ while leaving 3.6ADJ open
delivers 3.45-V nominal output. Grounding 3.6 ADJ while
leaving 3.45ADJ open sets a 3.6-V nominal output.
INPUT
5.5 V to 30 V
C1
22 mF
C10
22 mF
100 W
D2A
1N4148
D2B
1N4148
0.1 mF
+5 V at 5 mA
Si9130
4.7 mF
C4
0.1 mF
C5
0.1 mF
23
22
18
16
17
V
V+
L
25
27
26
BST
BST
3
5
N1
N3
N2
N3
DH
DH
5
3
R1
25 mW
L1
L2
R2
25 mW
10 mH
10 mH
LX
3
LX
5
+5 V at 3 A
+3.3 V at 3 A
D1
D1FS4
D1
D1FS4
24
19
C7
150 mF
C6
330 mF
DL
DL
CS
3
5
1
28
2
15
21
14
CS
3
5
5
C12
150 mF
(Note 1)
(Note 1)
FB
SS
FB
SS
3
C9
0.01 mF
C8
0.01 mF
3
5
3
ON
8
7
+3.3 V ON/OFF
+5 V ON/OFF
SHUTDOWN
3
5
3.45-V Voltage Adjust
3.6-V Voltage Adjust
3.45ADJ
3.6ADJ
13
12
11
9
ON
SHDN
SYNC
GND
OSC SYNC
10
20
REF
PGND
+3.3 V at 5 mA
C3
1 mF
Note 1: Use short, Kelvin-connected PC board
traces placed very close to one another.
FIGURE 1. Si9130 Application Circuit
Document Number: 70190
S-40805—Rev. F, 26-Apr-04
www.vishay.com
8
Si9130
Vishay Siliconix
3.3-V Switching Supply
at power-on are avoided, and power-supplies can be
sequenced with different turn-on delay times by selecting the
correct capacitor value.
The 3.3-V supply is regulated by a current-mode PWM
controller in conjunction with several externals: two n-channel
MOSFETs, a rectifier, an inductor and output capacitors (see
Figure 1). The gate drive supplied by DH3 needs to be greater
than VL , so it is provided by the bootstrap circuit consisting of
a 100-nF capacitor and diode connected to BST3.
5-V Switching Supply
The 5-V supply is regulated by a current-mode PWM controller
which is nearly the same as the 3.3-V output. The dropout
voltage across the 5-V supply, as shown in the schematic in
Figure 1, is 400 mV (typ) at 2 A. If the voltage at V+ falls, nearing
5 V, the 5-V supply will lower as well, until the VL linear regulator
output falls below the 4-V undervoltage lockout threshold.
Below this threshold, the 5-V controller is shut off.
A low-side switching MOSFET connected to DL3 increases
efficiency by reducing the voltage across the rectifier diode. A
low value sense resistor in series with the inductor sets the
maximum current limit, to disallow current overloads at
power-on or in short-circuit situations.
The soft-start feature on the Si9130 is capacitor
programmable; pin SS3 functions as a constant current source
to the external capacitor connected to GND. Excess currents
The frequency of both PWM controllers is set at 300 kHz when
the SYNC pin is tied to REF. Connecting SYNC to either GND
or VL sets the frequency at 200 kHz.
FB
+5-V LDO
3
V+
Linear
CS
3
Regulator
BST
3.3-V
PWM
Controller
(See Figure 3)
3
V
L
DH
3
3.45ADJ
3.6ADJ
REF
+3.3-V
Reference
ON
LX
3
DL
3
ON
SS
3
4.5 V
SHDN
PGND
ON
4 V
3
FB
5
CS
5
2.8 V
5-V
PWM
Controller
(See Figure 3)
BST
5
DH
STANDBY
300 kHz/200 kHz
Oscillator
5
SYNC
ON
LX
5
DL
5
ON
SS
5
ON
5
FIGURE 2. Si9130 Block Diagram
Document Number: 70190
S-40805—Rev. F, 26-Apr-04
www.vishay.com
9
Si9130
Vishay Siliconix
CS_
FB_
1X
REF,
3.3 V
(or Internal
5-V Reference)
60 kHz
LPF
Summing
Comparator
BST_
DH_
LX_
R
S
Q
Level
Shift
OSC
Slope
Comp
25 mV
Minimum Current
(Pulse-Skipping Mode)
V
L
Current
Limit
4 mA
Shoot-
Through
Control
0 mV to
100 mV
SS_
ON_
30R
3.3 V
1R
Synchronous
Rectifier Control
V
L
R
Q
S
Level
Shift
DL_
PGND
FIGURE 3. Si9130 Controller Block Diagram
3.3-V and 5-V Switching Controllers
The main PWM comparator is an open loop device which is
comprised of three comparators summing four signals: the
feedback voltage error signal, current sense signal,
slope-compensation ramp and voltage reference as shown in
Figure 3. This method of control comes closer to the ideal of
maintaining the output voltage on a cycle-by-cycle basis.
When the load demands high current levels, the controller is in
full PWM mode. Every cycle from the oscillator asserts the
output latch and drives the gate of the high-side MOSFET for
a period determined by the duty cycle (approximately
Each PWM controller on the Si9130 is identical with the exception
of the preset output voltages. The controllers only share three
functional blocks (see Figure 3): the oscillator, the voltage
reference (REF) and the 5-V logic supply (VL). The 3.3-V and 5-V
controllers are independently enabled with pins ON3 and ON5,
respectively. The PWMs are a direct-summing type, without the
typical integrating error amplifier along with the phase shift which
is a side effect of this type of topology. Feedback compensation
is not needed, as long as the output capacitance and its ESR
requirements are met, according to the Design Considerations
section of this data sheet.
VOUT/VIN 100%) and the frequency.
Document Number: 70190
S-40805—Rev. F, 26-Apr-04
www.vishay.com
10
Si9130
Vishay Siliconix
The high-side switch turns off, setting the synchronous rectifier
latch and 60 ns later, the rectifier MOSFET turns on. The low-side
switch stays on until the start of the next clock cycle in continuous
mode, or until the inductor current becomes positive again, in
discontinuous mode. In over-current situations, where the
inductor current is greater than the 100-mV current-limit threshold,
the high-side latch is reset and the high-side gate drive is shut off.
Shoot-through current is the result when both the high-side and
rectifying MOSFETs are turned on at the same time.
Break-before-make timing internal to the Si9130 manages this
potential problem. During the time when neither MOSFET is on,
the Schottky is conducting, so that the body diode in the low-side
MOSFET is not forced to conduct.
Synchronous rectification is always active when the Si9130 is
powered-up, regardless of the operational mode.
During low-current load requirements, the inductor current will not
deliver the 25-mV minimum current threshold. The Minimum
Current comparator signals the PWM to enter pulse-skipping
mode when the threshold has not been reached. pulse-skipping
mode skips pulses to reduce switching losses, the losses which
decrease efficiency the most at light load. Entering this mode
causes the minimum current comparator to reset the high-side
latch at the beginning of each oscillator cycle.
Gate-Driver Boost
The high-side n-channel drive is supplied by a flying-capacitor
boost circuit (see Figure 4). The capacitor takes a charge from
VL and then is connected from gate to source of the high-side
MOSFET to provide gate enhancement. At power-up, the
low-side MOSFET pulls LX_ down to GND and charges the
BST_ capacitor connected to 5 V. During the second half of the
oscillator cycle, the controller drives the gate of the high-side
MOSFET by internally connecting node BST_ to DH_. This
supplies a voltage 5 V higher than the battery voltage to the gate
of the high-side MOSFET.
Soft-Start
To slowly bring up the 3.3-V and 5-V supplies, connect capacitors
from SS3 and SS5 to GND. Asserting ON3 or ON5 starts a 4-A
constant current source to charge these capacitors to 4 V. As the
voltage on these pins ramps up, so does the current limit
comparator threshold, to increase the duty cycle of the MOSFETs
to their maximum level. If ON3 or ON5 are left low, the respective
capacitor is discharged to GND. Leaving the SS3 or SS5 pins
open will cause either controller to reach the terminal over-current
level within 10 ms.
Oscillations on the gates of the high-side MOSFET in
discontinuous mode are a natural occurrence caused by the LC
network formed by the inductor and stray capacitance at the LX_
pins. The negative side of the BST_ capacitor is connected to the
LX_ node, so ringing at the inductor is translated through to the
gate drive.
Soft start helps prevent current spikes at turn-on and allows
separate supplies to be delayed using external programmability.
BATTERY
INPUT
Synchronous Rectifiers
Synchronous rectification replaces the Schottky rectifier with a
MOSFET, which can be controlled to increase the efficiency of the
circuit.
V
L
V
L
BST_
DH_
When the high-side MOSFET is switched off, the inductor will try
to maintain its current flow, inverting the inductor’s polarity. The
path of current then becomes the circuit made of the Schottky
diode, inductor and load, which will charge the output capacitor.
The diode has a 0.5-V forward voltage drop, which contributes a
significant amount of power loss, decreasing efficiency. A
low-side switch is placed in parallel with the Schottky diode and
is turned on just after the diode begins to conduct. Because the
Level
Translator
LX_
PWM
V
L
DL_
rDS(ON) of the MOSFET is low, the I*R voltage drop will not be as
large as the diode, which increases efficiency.
The low-side rectifier is shut off when the inductor current drops
to zero.
FIGURE 4. Boost Supply for Gate Drivers
Document Number: 70190
S-40805—Rev. F, 26-Apr-04
www.vishay.com
11
Si9130
Vishay Siliconix
OPERATIONAL MODES
PWM Mode
The SYNC pin can be driven with an external CMOS level signal
with frequency from 240 kHz and 350 kHz to synchronize to the
internal oscillator. Tying SYNC to either VL or GND sets the
frequency to 200 kHz and to REF sets the frequency to 300 kHz.
The 3.3-V and 5-V Buck controllers operate in continuous-current
PWM mode when the load demands more than approximately
25% of the maximum current (see typical curves). The duty cycle
can be approximated as Duty_Cycle = VOUT/VIN.
Operation at 300 kHz is typically used to minimize output passive
component sizes. Slower switching speeds of 200 kHz may be
needed for lower input voltages.
In this mode, the inductor current is continuous; in the first half of
the cycle, the current slopes up when the high-side MOSFET
conducts and then, in the second half, slopes back down when
the inductor is providing energy to the output capacitor and load.
As current enters the inductor in the first half-cycle, it is also
continuing through to the load; hence, the load is receiving
continuous current from the inductor. By using this method, output
ripple is minimized and smaller form-factor inductors can be used.
The output capacitor’s ESR has the largest effect on output ripple.
It is typically under 50mV; the worst case condition is under light
load with higher input battery voltage.
Internal VL and REF
A 5-V linear regulator supplies power to the internal logic circuitry.
The regulator is available for external use from pin VL , able to
source 5 mA. A 4.7-mF capacitor should be connected between
VL and GND. To increase efficiency, when the 5-V switching
supply has voltage greater than 4.5 V, VL is internally switched
over to the output of the 5-V switching supply and the linear
regulator is turned off.
Pulse-Skipping Mode
When the load requires less than 25% of its maximum, the
Si9130 enters a mode which drives the gate for one clock cycle
and skips the majority of the remaining cycles. Pulse-skipping
mode cuts down on the switching losses, the dominant power
consumer at low current levels.
The 5-V linear regulator provides power to the internal 3.3-V
bandgap reference (REF). The 3.3-V reference can supply 5 mA
to an external load, connected to pin REF. Between REF and
GND connect a capacitor, 0.22 mF plus 1 mF per mA of load
current. The switching outputs will vary with the reference;
therefore, placing a load on the REF pin will cause the main
outputs to decrease slightly, within the specified regulation
tolerance.
In the region between pulse-skipping mode and PWM mode, the
controller may transition between the two modes, delivering
spurts of pulses. This may cause the current waveform to look
irregular, but will not overly affect the ripple voltage. Even in this
transitioning mode efficiency will stay high.
VL and REF supplies stay on as long as V+ is greater than 4.5
V, even if the switching supplies are not enabled. This feature is
necessary when using the micropower regulators to keep
memory alive during shutdown.
Current Limit
The current through an external resistor, is constantly monitored
to protect against over-current. A low value resistor is placed in
series with the inductor. The voltage across it is measured by
connecting it between CS_ and FB_. If this voltage is larger than
100 mV, the high-side MOSFET drive is shut down. Eliminating
over-currents protects the MOSFET, the load and the power
source. Typical values for the sense resistors with a 3-A load will
be 25 mW.
Both linear regulators can be connected to their respective
switching supply outputs. For example, REF would be tied to the
output of the 3.3 V and VL to 5 V. This will keep the main supplies
up in standby mode, provided that each load current in shutdown
is not larger than 5 mA.
Fault Protection
Oscillator and SYNC
The 3.3-V and 5-V switching controllers are shut down when one
of the linear regulators drops below 85% of its nominal value; that
is, shut down will occur when VL < 4.0 V or REF < 2.8 V.
There are two ways to set the Si9130 oscillator frequency: by
using an external SYNC signal, or using the internal oscillator.
Document Number: 70190
S-40805—Rev. F, 26-Apr-04
www.vishay.com
12
Si9130
Vishay Siliconix
DESIGN CONSIDERATIONS
Inductor Design
VREF
CF
u ǒ
ǒ
Ǔ
Ǔ
VOUT RCS (2)(p)(GPWP)
and,
Three specifications are required for inductor design: inductance
(L), peak inductor current (ILPEAK), and coil resistance (RL). The
equation for computing inductance is:
ǒ
Ǔ
Ǔ
ǒ
VOUT RCS
ESRCF t
VREF
ǒV ǓǒV
OUTǓ
IN(MAX)–V
Where:
C
= Output filter capacitance (F)
OUT
F
L + ǒ
Ǔ( )ǒ Ǔ(
VIN(MAX) f IOUT LIR
V
V
= Reference voltage, 3.3 V;
= Output voltage, 3.3 V or 5 V;
= Sense resistor (W);
REF
OUT
CS
)
R
GBWP = Gain-bandwidth product, 60 kHz;
ESR = Output filter capacitor ESR (W).
Where:
V
= Output voltage (3.3 V or 5 V);
OUT
CF
V
= Maximum input voltage (V);
IN(MAX)
f = Switching frequency, normally
300 kHz;
I
= Maximum dc load current (A);
OUT
Both minimum capacitance and maximum ESR requirements
must be met. In order to get the low ESR, a capacitance value two
to three times greater than the required minimum may be
necessary.
LIR = Ratio of inductor pea-to-peak ac current to
average dc load current, typically 0.3.
The equation for output ripple in continuous current mode is:
1
ǒ
)Ǔ
VOUT(RPL) + ILPP(MAX)
ESRCF )
When LIR is higher, smaller inductance values are acceptable, at
the expense of increased ripple and higher losses.
(
2 f CF
The equations for capacitive and resistive components of the
ripple in pulse-skipping mode are:
The peak inductor current (ILPEAK) is equal to the steady-state
load current (IOUT) plus one half of the peak-to-peak ac current
(ILPP). Typically, a designer will select the ac inductor current to be
30% of the steady-state current, which gives ILPEAK equal to 1.15
VOUT(RPL)(C) +
–4
ǒ
Ǔ
(4) 10 (L)
1
1
ǒ
ǓVolts
)
2
VOUT VIN–VOUT
ǒ
Ǔǒ
Ǔ
RCS CF
times IOUT
.
ǒ
Ǔ
(0.02) ESRCF
RCS
VOUT(RPL)(R) +
Volts
The equation for computing peak inductor current is:
ǒVOUT
Ǔ
ǒVIN(MAX) OUTǓ
–V
The total ripple, V
as follows:
, can be approximated
OUT(RPL)
I
+ I
)
LPEAK
OUT
(2)(f)(L)ǒVIN(MAX)Ǔ
if
then
otherwise,
V
V
V
V
(R) < 0.5 V
(C),
OUT(RPL)
OUT(RPL)
OUT(RPL)
OUT(RPL)
OUT(RPL)
= V
= V
(R).
(C),
OUT(RPL)
OUT(RPL)
(C) +
Lower Voltage Input
OUTPUT CAPACITORS
The application circuit shown here can be easily modified to work
with 5.5-V to 12-V input voltages. Oscillation frequency should be
set at 200 kHz and increase the output capacitance to 660 mF on
the 5-V output to maintain stable performance up to 2 A of load
current. Operation on the 3.3-V supply will not be affected by this
reduced input voltage.
The output capacitors determine loop stability and ripple voltage
at the output. In order to maintain stability, minimum capacitance
and maximum ESR requirements must be met according to the
following equations:
Document Number: 70190
S-40805—Rev. F, 26-Apr-04
www.vishay.com
13
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