SI9135LG

更新时间:2024-11-07 07:53:44
品牌:VISHAY
描述:SMBus Multi-Output Power-Supply Controller

SI9135LG 概述

SMBus Multi-Output Power-Supply Controller SMBus的多路输出电源控制器 电源管理电路

SI9135LG 规格参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Transferred零件包装代码:SSOP
包装说明:SSOP, SSOP28,.25针数:28
Reach Compliance Code:unknown风险等级:5.32
Is Samacsys:NJESD-30 代码:R-PDSO-G28
JESD-609代码:e0端子数量:28
最高工作温度:90 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:SSOP
封装等效代码:SSOP28,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, SHRINK PITCH电源:15 V
认证状态:Not Qualified子类别:Power Management Circuits
标称供电电压 (Vsup):15 V表面贴装:YES
温度等级:OTHER端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:0.635 mm
端子位置:DUALBase Number Matches:1

SI9135LG 数据手册

通过下载SI9135LG数据手册来全面了解它。这个PDF文档包含了所有必要的细节,如产品概述、功能特性、引脚定义、引脚排列图等信息。

PDF下载
Si9135  
New Product  
Vishay Siliconix  
Si9135  
SMBus Multi-Output Power-Supply Controller  
FEATURES  
• Up to 95% Efficiency  
• High Efficiency Pulse Skipping Mode Operation at Light  
Load  
• Only Three Inductors Required*No Transformer  
• LITTLE FOOT® Optimized Output Drivers  
• Internal Soft-Start  
• Synchronizable  
• Minimal External Control Components  
• 28-Pin SSOP Package  
• 3% Total Regulation (Each Controller)  
• 5.5-V to 30-V Input Voltage Range  
• 3.3-V, 5-V, and 12-V Outputs  
• 200-kHz/300-kHz Low-Noise Frequency Operation  
• Precision 3.3-V Reference Output  
• 30 mA Linear Regulator Output  
• SMBUS Interface  
DESCRIPTION  
The Si9135 is a current-mode PWM and PSM converter  
controller, with two synchronous buck converters (3.3 V and  
5 V) and a flyback (non-isolated buck-boost) converter (12 V).  
Designed for portable devices, it offers a total five power  
outputs (three tightly regulated dc/dc converter outputs, a  
precision 3.3-V reference and a 5-V LDO output). It requires  
minimum external components and is capable of achieving  
conversion efficiencies approaching 95%.  
Along with the SMBUS interface, the Si9135 provides  
programmable output selection capability.  
The Si9135 is available in a 28-pin SSOP package and  
specified to operate over the extended commercial (0°C to  
90°C) temperature range.  
FUNCTIONAL BLOCK DIAGRAM  
FaxBack 408-970-5600, request 70817  
S-60752—Rev. B, 05-Apr-99  
www.siliconix.com  
1
Si9135  
Vishay Siliconix  
New Product  
ABSOLUTE MAXIMUM RATINGS  
V
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to +36 V  
DH3 to LX , DH5 to LX ,  
3 5  
IN  
DHFY to LXFY . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to (BSTX +0.3 V)  
P
to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±2 V  
GND  
a
Continuous Power Dissipation (T = 90°C)  
A
V to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.3 to +6.5 V  
L
b
28-Pin SSOP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 572 mW  
BST , BST , BSTFY to GND . . . . . . . . . . . . . . . . . . . -0.3 V to +36 V  
3
5
Operating Temperature Range. . . . . . . . . . . . . . . . . . . . . 0°C to 90°C  
Storage Temperature Range . . . . . . . . . . . . . . . . . . . .-40°C to 125°C  
Lead Temperature (Soldering, 10 Sec.). . . . . . . . . . . . . . . . . . . 300°C  
V Short to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous  
L
LX to BST ; LX to BST ; LXFY to BST . . . . . . . . . . . -6.5 V to 0.3 V  
3
3
5
5
Inputs/Outputs to GND  
(SYNC, CS , CS , CSP, CSN) . . . . . . . . . . . . . . -0.3 V to (V +0.3 V)  
3
5
L
Notes  
SDA, SCL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to +5.5 V  
DL3, DL5, DLFY to PGND . . . . . . . . . . . . . . . . . -0.3 V to (V +0.3 V)  
a. Device mounted with all leads soldered or welded to PC board.  
b. Derate 9.52 mW/°C above 90°C.  
L
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional  
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute  
maximum rating conditions for extended periods may affect device reliability.  
SPECIFICATIONS  
Test Conditions  
Limits  
Typb  
V
= 15 V , I = I  
= 0 mA  
IN  
VL  
REF  
Parameter  
Mina  
Maxa  
Unit  
T = 0°C to 90°C, All Converters ON  
A
3.3-V Buck Controller  
Total Regulation (Line, Load, and  
Temperature)  
V
= 6 to 30 V, 0 < V  
- V < 90 mV  
FB3  
3.23  
3.33  
3.43  
V
IN  
CS3  
Line Regulation  
Load Regulation  
Current Limit  
V
= 6 to 30 V  
±0.5  
±0.5  
160  
IN  
%
0 < V  
- V  
< 90 mV  
FB3  
CS3  
V
- V  
90  
125  
50  
mV  
kHz  
°
CS3  
FB3  
Bandwidth  
L = 10 µH, C = 330 µF  
= 20 mΩ  
Phase Margin  
R
65  
SENSE  
5-V Buck Controller  
Total Regulation (Line, Load, and  
Temperature)  
V
= 6 to 30 V, 0 < V  
- V < 90 mV  
FB5  
4.88  
90  
5.03  
5.18  
V
IN  
CS5  
Line Regulation  
Load Regulation  
Current Limit  
V
= 6 to 30 V  
±0.5  
±0.5  
160  
IN  
%
0 < V  
- V  
< 90 mV  
FB5  
CS5  
V
- V  
125  
50  
mV  
kHz  
°
CS5  
FB5  
Bandwidth  
L = 10 µH, C = 330 µF  
= 20 mΩ  
Phase Margin  
R
65  
SENSE  
12-V Flyback Controller  
Total Regulation (Line, Load, and  
Temperature)  
V
= 6 to 30 V, 0 < V  
- V < 300 mV  
CSN  
11.4  
330  
12.0  
12.6  
V
IN  
CSP  
Line Regulation  
Load Regulation  
Current Limit  
V
= 6 to 30 V  
±0.5  
±0.5  
500  
IN  
%
0 < V  
- V  
< 300 mV  
FBN  
CSP  
V
- V  
410  
10  
mV  
kHz  
°
CSP  
CSN  
Bandwidth  
L = 10 µH, C = 100 µF  
= 100 m, C = 120 pF  
Phase Margin  
Internal Regulator  
R
65  
SENSE  
comp  
V Output  
All Converters OFF, V >5.5 V, 0 <I <30 mA  
4.7  
3.6  
5.5  
4.2  
L
IN  
L
V
V Fault Lockout Voltage  
L
V Fault Lockout Hysteresis  
75  
75  
mV  
V
L
V /FB5 Switchover Voltage  
4.2  
4.7  
L
V /FB5 Switchover Hysteresis  
mV  
L
S-60752—Rev. B, 05-Apr-99  
2
FaxBack 408-970-5600, request 70817  
www.siliconix.com  
 
 
Si9135  
New Product  
Vishay Siliconix  
SPECIFICATIONS  
Test Conditions  
Limits  
V
= 15 V , I = I  
= 0 mA  
IN  
VL  
REF  
Parameter  
Mina  
Typb  
Maxa  
Unit  
T = 0°C to 90°C, All Converters ON  
A
Reference  
REF Output  
No External Load  
0 to 1 mA  
3.24  
3.30  
30  
3.36  
75  
V
REF Load Regulation  
Supply Current  
Supply Current–Shutdown  
Supply Current–Operation  
Oscillator  
mV  
All Converters OFF, No Load  
35  
60  
µA  
All Converters ON, No Load, F  
= 200 kHz  
1100  
1800  
OCS  
SYNC tied to REF  
270  
180  
200  
200  
300  
200  
330  
220  
Oscillator Frequency  
kHz  
SYNC tied to GND or V  
L
SYNC High-Pulse Width  
SYNC Low-Pulse Width  
SYNC Rise/Fall Range  
nsec  
200  
0.8  
SYNC V  
SYNC V  
IL  
V
kHz  
%
V - 0.5  
IH  
L
Oscillator SYNC Range  
250  
92  
400  
SYNC tied to GND or V  
SYNC tied to REF  
95  
92  
L
Maximum Duty Cycle  
89  
Outputs  
Gate Driver Sink/Source Current (Buck)  
Gate Driver On-Resistance (Buck)  
DL3, DH3, DL5, DH5 Forced to 2 V  
High or Low  
1
2
A
7
Gate Driver Sink/Source Current  
(Flyback)  
DHFY, DLFY Forced to 2 V  
High or Low  
0.2  
A
Gate Driver On-Resistance (Flyback)  
15  
SCL, SDA  
V
V
0.6  
IL  
V
1.4  
IH  
Notes  
a. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum.  
b. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.  
FaxBack 408-970-5600, request 70817  
S-60752—Rev. B, 05-Apr-99  
www.siliconix.com  
3
Si9135  
Vishay Siliconix  
New Product  
PIN CONFIGURATION  
ORDERING INFORMATION  
Temperature  
Range  
Part Number  
VOUT  
Si9135LG  
0 to 90°C  
3.3 V, 5 V, 12 V  
PIN DESCRIPTION  
Pin Number  
Symbol  
Description  
1
CS  
Current sense input for 3.3-V buck.  
Feedback for flyback.  
3
2
FBFY  
BSTFY  
DHFY  
LXFY  
DLFY  
CSP  
3
Boost capacitor connection for flyback converter.  
Gate-drive output for flyback high-side MOSFET.  
Inductor connection for flyback converter.  
Gate-drive output for flyback low-side MOSFET.  
Current sense positive input for flyback converter.  
Current sense negative input for flyback converter.  
Analog ground.  
4
5
6
7
8
CSN  
9
GND  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
COMP  
REF  
Flyback compensation connection, if required.  
3.3-V internal reference.  
SYNC  
SCL  
Oscillator synchronization inputs.  
SMBUS clock line.  
SDA  
SMBUS data line.  
CS  
Current sense input for 5-V buck controller.  
Inductor connection for buck 5-V.  
5
DH5  
LX  
Gate-drive output for 5-V buck high-side MOSFET.  
Boost capacitor connection for 5-V buck converter.  
Gate-drive output for 5-V buck low-side MOSFET.  
Power ground.  
5
BST  
5
DL5  
PGND  
FB  
Feedback for 5-V buck.  
5
V
5-V logic supply voltage for internal circuitry.  
Input voltage  
L
V
IN  
DL3  
BST  
Gate-drive output for 3.3-V buck low-side MOSFET.  
Boost capacitor connection for 3.3-V buck converter.  
Inductor connection for 3.3-V buck low-side MOSFET.  
Gate-drive output for 3.3-V buck high-side MOSFET.  
Feedback for 3.3-V buck.  
3
LX  
3
DH3  
FB  
3
S-60752—Rev. B, 05-Apr-99  
4
FaxBack 408-970-5600, request 70817  
www.siliconix.com  
Si9135  
New Product  
Vishay Siliconix  
TYPICAL CHARACTERISTICS (25°C UNLESS OTHERWISE NOTED)  
FaxBack 408-970-5600, request 70817  
S-60752—Rev. B, 05-Apr-99  
www.siliconix.com  
5
Si9135  
Vishay Siliconix  
New Product  
TYPICAL WAVEFORMS  
S-60752—Rev. B, 05-Apr-99  
6
FaxBack 408-970-5600, request 70817  
www.siliconix.com  
Si9135  
New Product  
Vishay Siliconix  
TYPICAL WAVEFORMS  
FaxBack 408-970-5600, request 70817  
S-60752—Rev. B, 05-Apr-99  
www.siliconix.com  
7
Si9135  
Vishay Siliconix  
New Product  
STANDARD APPLICATION CIRCUIT  
FIGURE 1.  
S-60752—Rev. B, 05-Apr-99  
8
FaxBack 408-970-5600, request 70817  
www.siliconix.com  
Si9135  
New Product  
Vishay Siliconix  
SMBUS Specification  
are high. The output stages of devices connected to the bus  
must have an open drain or open collector in order to perform  
the wired AND function. Data on the SMBus can be  
transferred at a clock rate up to 100 kHz. Si9135 is a slave  
with SMBus address of 0110000.  
SMBus: The System Management Bus is a two-wire interface  
through which simple power related chips can communicate  
with the rest of the system. It uses I2C as its backbone. Both  
SDA and SCL are bidirectional lines, connected to a positive  
voltage via a pull-up resistor. When the bus is free, both lines  
SMBUS TRUTH TABLE  
State  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
Shutdown  
Buck3 On  
Buck5 On  
Flyback On  
0
1
0
0
1
1
0
1
0
0
1
0
1
0
1
1
0
0
0
1
0
1
1
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Buck3, Buck5 On  
Buck3, Flyback On  
Buck5, Flyback on  
All On  
Notes  
a. Positive logic level is used  
b. X: don’t care  
SMBUS ELECTRICAL SPECIFICATION (Test Conditions: V+ = 5.5 to 30 V, TA = O°C)  
Symbol  
Parameter  
Min  
Max  
Units  
V
V
V
Data, Clock Input Low Voltage  
-0.5  
1.4  
0.6  
5.5  
0.4  
±1  
IL  
Data, Clock Input High Voltage  
Data, Clock Output Low Voltage  
Input Leakage  
V
IH  
OL  
I
µA  
LEAK  
SMBUS AC SPECIFICATIONS  
Symbol  
Parameter  
Min  
Max  
Units  
F
T
T
T
T
T
T
T
SMBus Operation Frequency  
10  
4.7  
300  
250  
4.7  
4.0  
100  
kHz  
µs  
SMB  
BUF  
HD  
Bus free time between Stop and Start  
Data Hold Time  
ns  
µs  
ns  
Data Setup Time  
SU  
Clock Low Period  
LOW  
HIGH  
F
Clock High Period  
50  
300  
Clock/Data Fall Time  
Clock/Data Rise Time  
1000  
R
FaxBack 408-970-5600, request 70817  
S-60752—Rev. B, 05-Apr-99  
www.siliconix.com  
9
Si9135  
Vishay Siliconix  
New Product  
TIMING DIAGRAMS  
FIGURE 2. Start-Up Timing Sequence  
S-60752—Rev. B, 05-Apr-99  
10  
FaxBack 408-970-5600, request 70817  
www.siliconix.com  
Si9135  
New Product  
Vishay Siliconix  
DETAILED FUNCTIONAL BLOCK DIAGRAM  
FIGURE 3. Buck Block Diagram  
FIGURE 4. PWM Flyback Block Diagram  
FaxBack 408-970-5600, request 70817  
S-60752—Rev. B, 05-Apr-99  
www.siliconix.com  
11  
Si9135  
Vishay Siliconix  
New Product  
DETAILED FUNCTIONAL BLOCK DIAGRAM  
FIGURE 5. Complete Si9135 Block Diagram  
DESCRIPTION OF OPERATION  
Start-up Sequence  
mode supplies, one at 3.3 V and one at 5 V, one FLYBACK  
12-V PWM switch-mode supply, one precision 3.3-V reference  
and one 5-V Low Drop Out linear regulator output. Switch-  
mode supply output current capabilities depend on external  
components (can exceed 10 A). With typical application  
shown on the application diagram, the two BUCK converters  
deliver 4 A and the FLYBACK converters deliver 0.25 A. The  
recommended load current for precision 3.3-V reference  
output is less than 1 mA, the recommended load current for  
5-V LDO output current is less than 30 mA. In order to  
maximize the power efficiency, when the 5-V BUCK converter  
supply is above 4.5 V, the BUCK converter’s output is internal  
connected to LDO output.  
Si9135 is normally controlled by its SMBus interface after VIN  
is applied. Initially, if there is no incoming SMBus control  
command, it comes up in its default power on sequence, first  
the LDO 5 V will come up within its tolerance, and then the  
precision 3.3-V reference will come up. Immediately  
afterwards, the oscillator will begin and 3.3-V BUCK converter  
will turn on and then 5-V BUCK converter and at last 12-V  
FLYBACK converter. If Si9135 receives any SMBus controlling  
command after LDO 5 V is established, the designated  
converters will be allowed to turn on or off independently  
depending on the command received. In the event of all three  
converters are turned off, the oscillator will be turned off, the  
total system would only draw 35-µA supply current.  
Buck Converter Operation  
Each converter can soft-start separately. The integrated  
internal soft-start circuitry for each converter gradually  
increases the inductor maximum peak current during soft-  
start period (approximately 4 msec), preventing excessive  
currents being drawn from the input during startup. The soft-  
start is controlled by initial default start up sequence or  
incoming SMBus command.  
The 3.3-V and 5-V buck converters are both current-mode  
PWM and PSM (during light load operation) regulators using  
high-side bootstrap n-channel and low-side n-channel  
MOSFETs. At light load conditions, the converters switch at a  
lower frequency than the clock frequency, seen like some  
clock pulses between the actual switching are skipped, this  
operating condition is defined as pulse-skipping. The  
operation of the converter(s) switching at clock frequency is  
defined as normal operation.  
Si9135 converters a 5.5-V to 30-V input voltage to five  
outputs, two BUCK (step-down) high current, PWM, switch-  
S-60752—Rev. B, 05-Apr-99  
12  
FaxBack 408-970-5600, request 70817  
www.siliconix.com  
Si9135  
New Product  
Vishay Siliconix  
Normal Operation: Buck Converters  
Normal Operation: Flyback Converter  
In normal operation, the buck converter high-side MOSFET is  
turned on with a delay (known as break-before-make time -  
tBBM), after the rising edge of the clock. After a certain on  
time, the high-side MOSFET is turned off and then after a  
delay (tBBM), the low-side MOSFET is turned on until the next  
rising edge of the clock, or the inductor current reaches zero.  
The tBBM (approximately 25 ns to 60 ns), has been optimized  
to guarantee the efficiency is not adversely affected at the  
high switching frequency and a specified minimum to account  
for variations of possible MOSFET gate capacitances.  
In normal operation mode, the two MOSFETs are turned on at  
the rising edge of the clock, and then turned off. The on time  
is controlled internally to provide excellent load, line, and  
temperature regulation. The flyback converter has load, line  
and temperature regulation well within 0.5%.  
Pulse Skipping: Flyback Converter  
Under the light load conditions, similar to the buck converter,  
the flyback converter will enter pulse skipping mode. The  
MOSFETs will be turned on until the inductor current  
increases to such a level that the voltage across the pin CSP  
and pin CSN reaches 100 mV, or the on time reaches the  
maximum duty cycle. After the MOSFETs are turned off, the  
inductor current will conduct through two diodes until it  
reaches zero. At this point, the flyback converter output will  
rise slightly above the regulation level, and the converter will  
stay idle for one or several clock cycle(s) until the output falls  
back slightly below the regulation level. The switching losses  
are reduced by skipping pulses and so the efficiency during  
light load is preserved.  
During the normal operation, the high-side MOSFET switch  
on-time is controlled internally to provide excellent line and  
load regulation over temperature. Both buck converters  
should have load, line, regulation to within 0.5% tolerance.  
Pulse Skipping: Buck Converters  
When the buck converter switching frequency is less than the  
internal clock frequency, its operation mode is defined as  
pulse skipping mode. During this mode, the high-side  
MOSFET is turned on until VCS-VFB reaches 20 mV, or the on  
time reaches its maximum duty ratio. After the high-side  
MOSFET is turned off, the low-side MOSFET is turned on  
after the tBBM delay, which will remain on until the inductor  
current reaches zero. The output voltage will rise slightly  
above the regulation voltage after this sequence, causing the  
controller to stay idle for the next one, or several clock cycles.  
When the output voltage falls slightly below the regulation  
level, the high-side MOSFET will be turned on again at the  
next clock cycle. With the converter remaining idle during  
some clock cycles, the switching losses are reduced in order  
to preserve conversion efficiency during the light output  
current condition.  
Current Limit: Flyback Converter  
Similar to the buck converter; when the voltage across pin  
CSP and pin CSN exceeds 410-mV typical, the two  
MOSFETs will be turned off regardless of the input and  
output conditions.  
SMBus Commands  
After completion of startup, Si9135’s converters can be  
individually or as a group commanded on or off using a code  
word on the SMBus, as detailed in the SMBus Truth Table.  
The command sequence is:  
A. Receive a start bit, which is a falling edge on the  
SDA line while the SCL line is high.  
B. Receive a one-byte address, which for Si9135 is  
01100000.  
C. Send an acknowledge bit.  
D. Receive a one-byte command.  
E. Send an acknowledge bit.  
F. Receive a stop bit, which is a rising edge on the SDA  
line while the SCL line is high.  
Current Limit: Buck Converters  
When the buck converter inductor current is too high, the  
voltage across pin CS3(5) and pin FB3(5) exceeds  
approximately 120 mV, the high-side MOSFET would be  
turned off instantaneously regardless of the input, or output  
condition. The Si9135 features clock cycle by clock cycle  
current limiting capability.  
Flyback Converter Operation  
This is a total of 20 bits, which at the maximum clock  
frequency of 100 kHz translates into 200 µsec before any  
change in the status of Si9135 ban be accomplished.  
Designed mainly for PCMCIA or EEPROM programming, the  
Si9135 has a 12-V output non-isolated buck boost converter,  
called for brevity a flyback. It consists of two n-channel  
MOSFET switches that are turned on and off in phase, and  
two diodes. Similar to the buck converter, during the light load  
conditions, the flyback converter will switch at a frequency  
lower than the internal clock frequency, which can be defined  
as pulse skipping mode (PSM); otherwise, it is operating in  
normal PWM mode.  
If Si9135 receives a command to turn on (respectively, off) a  
converter that is already on (respectively, off) it shall not  
falsely command the converter off (respectively, on).  
Si9135 must be able to receive a stop command at any time  
during a command sequence. If Si9135 receives a stop  
command during a command sequence, it must not change  
the state of any converter, and must be ready to receive the  
next command sequence.  
FaxBack 408-970-5600, request 70817  
S-60752—Rev. B, 05-Apr-99  
www.siliconix.com  
13  
Si9135  
Vishay Siliconix  
New Product  
Grounding  
efficiency. The converters are current mode control, with a  
bandwidth substantially higher than the LC tank dominant  
pole frequency of the output filter. To ensure stability, the  
minimum capacitance and maximum ESR values are:  
There are two separate grounds on the Si9135, analog signal  
ground (GND) and power ground (PGND). The purpose of  
two separate grounds is to prevent the high currents on the  
power devices (both external and internal) from interfering  
with the analog signals. The internal components of Si9135  
have their grounds tied (internally) together. These two  
grounds are then tied together (externally) at a single point, to  
ensure Si9135 noise immunity.  
VREF  
V
OUT × RCS  
-------------------------------  
ESR ≤  
-------------------------------------------------------------  
2π × VOUT × RCS × BW  
CLOAD  
VREF  
Where VREF = 3.3 V, VOUT is the output voltage (5 V or 3.3 V),  
Rcs is the current sensing resistor in ohms and BW = 50 khz  
This separation of grounds should be maintained in the  
external circuitry, with the power ground of all power devices  
being returned directly to the input capacitors, and the small  
signal ground being returned to the GND pin of Si9135.  
With the components specified in the application circuit  
(L = 10 µH, RCS = 0.02 , COUT = 330 µF, ESR approximately  
0.1 ), the converter should have  
a bandwidth at  
approximately 50 kHz, with minimum phase margin of 65°,  
and dc gain above 50 dB.  
ON/OFF Function  
Logic-low shuts off the appropriate section by disabling the  
gate drive stage. High-side and low-side gate drivers are  
turned off when ON/OFF pins are logic-low. Logic-high  
enables the DH and DL pins.  
Other Outputs  
The Si9135 also provides a 3.3-V reference which can be  
external loaded up to 1 mA, as well as, a 5-V LDO output  
which can be loaded 30 mA, or even more depending on the  
system application. When the 5-V buck converter is turned on,  
the 5-V LDO output is shorted with the 5-V buck converter  
output, so its loading capability is substantially increased. For  
stability, the 3.3-V reference output requires a 1-µF capacitor,  
and 5-V LDO output requires a 4.7-µF capacitor.  
Stability  
Buck Converters  
In order to simplify designs, the Si9135 requires no specified  
external components except load capacitors for stability  
control. Meanwhile, it achieves excellent regulation and  
S-60752—Rev. B, 05-Apr-99  
14  
FaxBack 408-970-5600, request 70817  
www.siliconix.com  

SI9135LG 相关器件

型号 制造商 描述 价格 文档
SI9135LG-E3 VISHAY TRIPLE PWM BUCK CNTR (5V,3.3V,12V)SM-LEA - Tape and Reel 获取价格
SI9135LG-T1 VISHAY SMBus Multi-Output Power-Supply Controller 获取价格
SI9135LG-T1-E3 VISHAY SMBus Multi-Output Power-Supply Controller 获取价格
SI9135_11 VISHAY SMBus Multi-Output Power-Supply Controller 获取价格
SI9136 VISHAY Multi-Output Power-Supply Controller 获取价格
SI9136DB VISHAY Multi-Output Power-Supply Controller 获取价格
SI9136LG VISHAY Multi-Output Power-Supply Controller 获取价格
SI9136LG-E3 VISHAY MULTIOUTPUT POWERSUPPLY CONTROLLER - Tape and Reel 获取价格
SI9136_11 VISHAY Multi-Output Power-Supply Controller 获取价格
SI9137 VISHAY Multi-Output, Sequence Selectable Power-Supply Controller for Mobile Applications 获取价格

SI9135LG 相关文章

  • 强制中企出售股权,英国半导体领域渐成中企投资禁区
    2024-11-08
    17
  • 台积电拟对大陆AI公司禁运7nm及以下工艺,引发业界关注
    2024-11-08
    14
  • 锐成芯微推出基于8nm工艺的PVT Sensor IP,引领芯片技术创新
    2024-11-08
    12
  • 苹果与富士康接洽,商讨在中国台湾生产AI服务器
    2024-11-08
    11