SI9130_11

更新时间:2024-11-30 10:19:17
品牌:VISHAY
描述:Pin-Programmable Dual Controller - Portable PCs

SI9130_11 概述

Pin-Programmable Dual Controller - Portable PCs 引脚可编程双控制器 - 便携式电脑

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Not recommended for new designs, please refer to Si786  
Si9130  
Vishay Siliconix  
Pin-Programmable Dual Controller - Portable PCs  
FEATURES  
Fixed 5 V and Programmable 3.3 V, 3.45 V, or  
3.6 V Step-Down Converters  
Less than 500 µA Quiescent Current per Converter  
25 µA Shutdown Current  
5.5 V to 30 V Operating Range  
DESCRIPTION  
The Si9130 Pin-programmable Dual Controller for Portable  
PCs is a pin-programmable version of the Si786 dual-output  
power supply controller for notebook computers. The Buck  
controllers provide 5 V and a pin-programmable output  
delivering 3.3 V, 3.45 V, or 3.6 V.  
MOSFETs, one Si4435 P-Channel TrenchFET Power  
MOSFET, and two Si9712 PC Card (PCMCIA) Interface  
Switches.  
The Si9130 is available in both standard and lead (Pb)-free  
28-pin SSOP packages and specified to operate over the  
commercial (0 °C to 70 °C) and extended commercial  
(- 10 °C to 90 °C) temperature ranges. See Ordering  
Information for corresponding part numbers.  
The circuit is a system level integration of two step-down  
controllers and micropower 5 V and 3.3 V linear regulators.  
The controllers perform high efficiency conversion of the  
battery pack energy (typically 12 V) or the output of an ac to  
dc wall converter (typically 18 V to 24 V dc) to 5 V and 3.3 V  
system supply voltages. The micropower linear regulator can  
be used to keep power management and back-up circuitry  
alive during the shutdown of the step-down converters.  
A complete power conversion and management system can  
be implemented with the Si9130 Pin-programmable Dual  
Controller for Portable PCs, an inexpensive linear regulator,  
the Si9140 SMP Controller for High Performance Processor  
®
Power Supplies, five Si4410 N-Channel TrenchFET Power  
FUNCTIONAL BLOCK DIAGRAM  
5.5 V to 30 V  
3.3 V  
µP  
Power  
Memory  
Section  
Si9130  
5 V  
SHUTDOWN  
Peripherals  
5 V ON/OFF  
3.3 V ON/OFF  
SYNC  
Document Number: 70190  
S11-0975-Rev. G, 16-May-11  
www.vishay.com  
1
This document is subject to change without notice.  
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000  
Si9130  
Vishay Siliconix  
ABSOLUTE MAXIMUM RATINGS  
Parameter  
V+ to GND  
PGND to GND  
VL to GND  
Limit  
- 0.3 to 36  
2
Unit  
- 0.3 to 7  
BST3, BST5 to GND  
LX3 to BST3  
- 0.3 to 36  
- 7 to 0.3  
- 7 to 0.3  
LX5 to BST5  
V
Inputs/Outputs to GND (3.45 ADJ, 3.6 ADJ, SHDN, ON5, REF, SS5, CS5, FB5,  
SYNC, CS3, FB3, SS3, ON3)  
- 0.3, (VL + 0.3)  
DL3, DL5 to PGND  
DH3 to LX3  
- 0.3, (VL + 0.3)  
- 0.3 (BST3 + 0.3)  
- 0.3 (BST5 + 0.3)  
DH5 to LX5  
REF, VL Short to GND  
Momentary  
REF Current  
VL Current  
20  
50  
mA  
Continuous Power Dissipation (TA = 70 °C)a  
28-Pin SSOPb  
Si9130CG  
762  
mW  
0 to 70  
- 10 to 90  
300  
Operating Temperature Range:  
Si9130LG  
°C  
Lead Temperature (soldering, 10 sec)  
Notes:  
a. Device Mounted with all leads soldered or welded to PC board.  
b. Derate 9.52 mW/°C above 70 °C.  
Exposure to Absolute Maximum rating conditions for extended periods may affect device reliability. Stresses above Absolute Maximum rating may cause permanent  
damage. Functional operation at conditions other than the operating conditions specified is not implied. Only one Absolute Maximum rating should be applied at any  
one time.  
SPECIFICATIONS  
Specific Test Conditions  
V+ = 15 V, IVL = IREF = 0 mA, SHDN = ON3 = ON5 = 5 V  
Limits  
Typ.b  
Parameter  
Unit  
Min.a  
Max.a  
Other Digital Input Levels 0 V or 5 V, TA = TMIN to TMAX  
3.3 V and 5 V Step-Down Controllers  
Input Supply Range  
5.5  
30  
0 mV < (CS5 - FB5) < 70 mV, 6 V < V + < 30 V  
(includes load and line regulation)  
FB5 Output Voltage  
4.80  
3.17  
3.32  
5.08  
3.35  
3.50  
5.20  
3.46  
3.60  
3.6 ADJ = 3.45 ADJ = OPEN  
V
0 mV < (CS3 - FB3) < 70 mV  
6 V < V + < 30 V  
(includes load and line regulation)  
3.6 ADJ = OPEN  
3.45 ADJ = GND  
FB3 Output Voltage  
3.6 ADJ = GND  
3.45 ADJ = OPEN  
3.46  
3.65  
3.75  
Load Regulation  
Either Controller (CS_ to FB_ = 0 to 70 mV)  
2.5  
0.03  
100  
%
Line Regulation  
Either Controller (V+ = 6 to 30)  
CS3 - FB3 or CS5 - FB5  
%/V  
mV  
Current-Limit Voltage  
SS3/SS5 Source Current  
80  
2.5  
2
120  
6.5  
4.0  
µA  
SS3/SS5 Fault Sink Current  
mA  
Internal Regulator and Reference  
ON5 = ON3 = 0, 5.5 < V+ < 30  
0 mA < IL < 25 mA  
VL Output Voltage  
4.5  
3.6  
5.5  
4.2  
V
VL Fault Lockout Voltage  
Falling Edge, Hysteresis = 1 %  
www.vishay.com  
2
Document Number: 70190  
S11-0975-Rev. G, 16-May-11  
This document is subject to change without notice.  
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000  
Si9130  
Vishay Siliconix  
SPECIFICATIONS  
Specific Test Conditions  
V+ = 15 V, IVL = IREF = 0 mA, SHDN = ON3 = ON5 = 5 V  
Limits  
Unit  
Parameter  
Min.a  
Typ.b  
Max.a  
Other Digital Input Levels 0 V or 5 V, TA = TMIN to TMAX  
Internal Regulator and Reference  
VL/FB5 Switchover Voltage  
Rising Edge of FB5, Hysteresis = 1 %  
4.2  
3.24  
2.4  
4.7  
3.36  
3.2  
75  
No External Loadc  
Falling Edge  
0 mA < IL < 5 mAd  
V
REF Output Voltage  
REF Fault Lockout Voltage  
REF Load Regulation  
30  
25  
70  
mV  
µA  
SHDN = ON3 = ON5 = 0 V, V+ = 30 V  
ON3 = ON5 = 0 V, V+ = 30 V  
V+ Shutdown Current  
V+ Standby Current  
40  
110  
FB5 = CS5 = 5.25 V  
FB3 = CS3 = 3.5 V  
Quiescent Power Consumption  
(both PWM controllers on)  
5.5  
30  
8.6  
60  
mV  
µA  
FB5 = CS5 = 5.25 V, VL Switched Over to FB5  
V+ Off Current  
Oscillator and Inputs/Outputs  
SYNC = 3.3 V  
270  
170  
200  
200  
300  
200  
330  
230  
Oscillator Frequency  
kHz  
ns  
SYNC = 0 V, 5 V  
SYNC High Pulse Width  
SYNC Low Pulse Width  
SYNC Rise/Fall Time  
Oscillator SYNC Range  
Not Tested  
200  
350  
240  
89  
kHz  
%
SYNC = 3.3 V  
SYNC = 0 V, 5 V  
92  
95  
Maximum Duty Cycle  
Input Low Voltage  
92  
SHDN, ON3, ON5 SYNC  
0.8  
1
SHDN, ON3, ON5  
2.4  
V
Input High Voltage  
VL - 0.5  
SYNC  
SHDN, ON3, ON5, VIN = 0 V, 5 V  
VOUT = 2 V  
Input Current  
µA  
A
DL3/DL5 Sink/Source Current  
DH3/DH5 Sink/Source Current  
DL3/DL5 On-Resistance  
1
1
BST3 - LX3 = BST5 - LX5 = 4.5 V, VOUT = 2 V  
High or Low  
7
7
High or Low  
BST3 - LX3 = BST5 - LX5 = 4.5 V  
DH3/DH5 On-Resistance  
Notes:  
a. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum.  
b. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.  
c. The main switching outputs track the reference voltage. Loading the reference reduces the main outputs slightly according to the closed-loop  
gain (AVCL) and the reference voltage load-regulation error. AVCL for the 3.3 V supply is unity gain. AVCL for the 5 V supply is 1.54.  
d. Since the reference uses VL as its supply, its V+ line regulation error is insignificant.  
Document Number: 70190  
S11-0975-Rev. G, 16-May-11  
www.vishay.com  
3
This document is subject to change without notice.  
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000  
Si9130  
Vishay Siliconix  
TYPICAL CHARACTERISTICS (25 °C unless noted)  
100  
90  
80  
70  
60  
50  
100  
V = 6 V  
IN  
V
IN  
= 6 V  
90  
80  
70  
60  
50  
V
IN  
= 15 V  
V
= 15 V  
IN  
V
IN  
= 30 V  
V
IN  
= 30 V  
3.3 V Off  
SYNC = 0 V, 3.3 V Off  
0.001  
0.01  
0.1  
5 V Output Current (A)  
Efficiency vs. 5 V Output Current, 300 kHz  
1
10  
0.001  
0.01  
0.1  
1
10  
10  
30  
5 V Output Current (A)  
Efficiency vs. 5 V Output Current, 200 kHz  
100  
90  
80  
70  
60  
50  
100  
90  
80  
70  
60  
50  
V
= 6 V  
IN  
V
= 6 V  
IN  
V
IN  
= 15 V  
V
IN  
= 15 V  
V
IN  
= 30 V  
V
= 30 V  
IN  
5 V On  
SYNC = 0 V, 5 V On  
0.001  
0.01  
0.1  
1
10  
0.001  
0.01  
0.1  
3.3 V Output Current (A)  
1
3.3 V Output Current (A)  
Efficiency vs. 3.3 V Output Current, 300 kHz  
Efficiency vs. 3.3 V Output Current, 200 kHz  
0.5  
0.4  
0.3  
0.2  
0.1  
0.0  
30  
25  
20  
15  
10  
5
ON = ON = 0 V  
ON = ON = High  
3
5
3
5
0
0
6
12  
18  
24  
30  
0
6
12  
18  
24  
Supply Voltage (V)  
Standby Supply Current vs. Supply Voltage  
Supply Voltage (V)  
Quiescent Supply Current vs. Supply Voltage  
www.vishay.com  
4
Document Number: 70190  
S11-0975-Rev. G, 16-May-11  
This document is subject to change without notice.  
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000  
Si9130  
Vishay Siliconix  
TYPICAL CHARACTERISTICS (25 °C unless noted)  
1.0  
0.8  
0.6  
0.4  
0.2  
0.0  
100  
5 V Output  
Still Regulating  
SHDN = 0 V  
75  
300 kHz  
50  
25  
0
200 kHz  
0
6
12  
18  
24  
30  
0.001  
0.01  
0.1  
5 V Output Current (A)  
1
10  
Supply Voltage (V)  
Shutdown Supply Current vs. Supply Voltage  
Minimum VIN to VOUT Differential  
vs. 5 V Output Current  
1000.0  
SYNC = REF (300 kHz)  
ON = ON = 5 V  
3
5
100.0  
10.0  
1.0  
5 V, V = 30 V  
IN  
5 V, V = 7.5 V  
IN  
3.3 V, V = 7.5 V  
IN  
0.1  
0.1  
1
10  
100  
1000  
Load Current (mA)  
Switching Frequency vs. Load Current  
5 V Output  
50 mV/div  
LX 10 V/div  
2 V/div  
5 V Output  
50 mV/div  
200 µS/div  
= 100 mA  
5 V Output Current = 1 A  
= 16 V  
I
Load  
V
IN  
= 10 V  
V
IN  
Pulse-Width Modulation Mode Waveforms  
Pulse-Skipping Waveforms  
Document Number: 70190  
S11-0975-Rev. G, 16-May-11  
www.vishay.com  
5
This document is subject to change without notice.  
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000  
Si9130  
Vishay Siliconix  
TYPICAL CHARACTERISTICS (25 °C unless noted)  
3 A  
3 A  
LOAD CURRENT  
LOAD CURRENT  
0 A  
0 A  
5 V Output  
50 mV/div  
3.3 V Output  
50 mV/div  
200 µS/div  
IN  
200 µS/div  
= 15 V  
V
= 15 V  
V
IN  
5 V Load-Transient Response  
3.3 V Load-Transient Response  
5 V Output  
50 mV/div  
5 V Output  
50 mV/div  
V
, 10 to 16 V  
V
, 16 to 10 V  
IN  
2 V/div  
IN  
2 V/div  
20 µS/div  
LOAD  
20 µS/div  
LOAD  
I
= 2 A  
I
= 2 A  
5 V Line-Transient Response, Rising  
5 V Line-Transient Response, Falling  
3.3 V Output  
50 mV/div  
3.3 V Output  
50 mV/div  
V , 16 to 10 V  
IN  
2 V/div  
V
, 10 to 16 V  
IN  
2 V/div  
20 µS/div  
LOAD  
20 µS/div  
LOAD  
I
= 2 A  
I
= 2 A  
3.3 V Line-Transient Response, Rising  
3.3 V Line-Transient Response, Falling  
www.vishay.com  
6
Document Number: 70190  
S11-0975-Rev. G, 16-May-11  
This document is subject to change without notice.  
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000  
Si9130  
Vishay Siliconix  
PIN CONFIGURATION AND DESCRIPTION  
CS  
FB  
3
1
2
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
3
ORDERING INFORMATION  
SS  
3
DH  
LX  
3
Standard  
Lead (Pb)-free Temperature  
VOUT  
ON  
Part Number  
Part Number  
Range  
3
3
3
Si9130CG  
NC  
NC  
BST  
3
4
0 to 70 °C  
Si9130CG-T1 Si9130CG-T1-E3  
Si9130LG  
5 V and 3.3 V  
3.45 V or 3.6 V  
DL  
V+  
5
3
NC  
6
- 10 to 90 °C  
Si9130LG-T1 Si9130LG-T1-E3  
3.6ADJ  
3.45ADJ  
GND  
V
L
7
SSOP-28  
FB  
5
8
PGND  
9
Demo Board  
Temperature Range  
0 to 70 °C  
Board Type  
REF  
DL  
5
10  
11  
12  
13  
14  
Si9130DB  
Surface Mount  
SYNC  
SHDN  
BST  
5
LX  
5
ON  
5
DH  
5
SS  
5
CS  
5
Top View  
PIN DESCRIPTION  
Pin  
Symbol  
CS3  
SS3  
ON3  
NC  
Description  
1
Current-sense input for 3.3 V Buck controller - this pins over current threshold is 100 mV with respect to FB3.  
Soft-start input for 3.3 V. Connect capacitor from SS3 to GND.  
ON/OFF logic input disables the 3.3 V Buck controller. Connect directly to VL for automatic turn-on.  
Not internally connected.  
2
3
4
5
NC  
Not internally connected.  
6
NC  
Not internally connected.  
7
3.6 ADJ Control input to select 3.6 V output. See Voltage Selection Table for input and output combinations.  
3.45 ADJ Control input to select 3.45 V output. See Voltage Selection Table for input and output combinations.  
8
9
GND  
REF  
Analog ground.  
10  
3.3 V reference output. Supplies external loads up to 5 mA.  
Oscillator control/synchronization input. Connect capacitor to GND, 1 µF/mA output or 0.22 µF minimum. For external  
clock synchronization, a rising edge starts a new cycle to start. To use internal 200 kHz oscillator, connect to VL or GND.  
For 300 kHz oscillator, connect to REF.  
11  
SYNC  
Shutdown logic input, active low. Connect to VL for automatic turn-on. The 5 V VL supply will not be disabled in shutdown  
allowing connection to SHDN.  
12  
SHDN  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
ON5  
SS5  
CS5  
DH5  
LX5  
ON/OFF logic input disables the 5 V Buck Controller. Connect to VL for automatic turn-on.  
Soft-start control input for 5 V Buck controller. Connect capacitor from SS5 to GND.  
Current-sense input for 5 V Buck controller - this pins over current threshold is 100 mV referenced to FB3.  
Gate-drive output for the 5 V supply high-side N-Channel MOSFET.  
Inductor connection for the 5 V supply.  
BST5  
DL5  
PGND  
FB5  
VL  
Boost capacitor connection for the 5 V supply.  
Gate-drive output for the 5 V supply rectifying N-Channel MOSFET.  
Power Ground.  
Feedback input for the 5 V Buck controller.  
5 V logic supply voltage for internal circuitry - able to source 5 mA external loads. VL remains on with valid voltage at V+.  
Supply voltage input.  
V+  
DL3  
Gate-drive output for the 3.3 V supply rectifying N-Channel MOSFET.  
BST3  
LX3  
Boost capacitor connection for the 3.3 V supply.  
Inductor connection for the 3.3 V supply.  
DH3  
FB3  
Gate-drive output for the 3.3 V supply high-side N-Channel MOSFET.  
Feedback input for the 3.3 V Buck controller.  
Document Number: 70190  
S11-0975-Rev. G, 16-May-11  
www.vishay.com  
7
This document is subject to change without notice.  
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000  
Si9130  
Vishay Siliconix  
VOLTAGE SELECTION TABLE  
Input  
Output  
FB3  
3.45 ADJ  
OPEN  
GND  
3.6 ADJ  
OPEN  
OPEN  
GND  
3.3 V  
3.45 V  
3.6 V  
OPEN  
DESCRIPTION OF OPERATION  
The Si9130 is a dual step-down converter, which takes a  
5.5 V to 30 V input and supplies power via two PWM  
controllers (see Figure 1). These 5 V and 3.3 V supplies run  
on an optional 300 kHz or 200 kHz internal oscillator, or an  
external sync signal. Amount of output current is limited by  
external components, but can deliver greater than 6 A on  
either supply. As well as these two main Buck controllers,  
additional loads can be driven from two micropower linear  
regulators, one 5 V (VL) and the other 3.3 V (REF) - see  
Figure 2. These supplies are each rated to deliver 5 mA. If  
the linear regulator circuits fall out of regulation, both Buck  
controllers are shut down.  
3.3 V PWM Voltage Selection  
(Pins 3.45 ADJ, 3.6 ADJ)  
The voltage at this output can be selected to 3.3 V, 3.45 V or  
3.6 V, depending on the configuration of pins 3.45 ADJ and  
3.6 ADJ. Leaving both pins open results in 3.3V nominal  
output. Grounding pin 3.45 ADJ while leaving 3.6 ADJ open  
delivers 3.45 V nominal output. Grounding 3.6 ADJ while  
leaving 3.45 ADJ open sets a 3.6 V nominal output.  
INPUT  
5.5 V to 30 V  
C1  
22 µF  
C10  
22 µF  
100  
D2A  
1N4148  
D2B  
1N4148  
0.1 µF  
+ 5 V at 5 mA  
Si9130  
4.7 µF  
C4  
0.1 µF  
C5  
0.1 µF  
23  
22  
18  
16  
17  
V
V+  
L
25  
27  
26  
BST  
BST  
3
5
N1  
N3  
N2  
N3  
DH  
DH  
5
3
R1  
25 mΩ  
L1  
10  
L2  
R2  
25 mΩ  
H
10 µH  
LX  
3
LX  
5
+ 5 V at 3 A  
+ 3.3 V at 3 A  
D1  
D1FS4  
D1  
D1FS4  
24  
19  
C7  
150 µF  
C6  
330 µF  
DL  
DL  
CS  
3
5
1
28  
2
15  
21  
14  
CS  
3
5
5
C12  
150 µF  
(Note 1)  
(Note 1)  
FB  
SS  
FB  
SS  
3
C9  
F
C8  
0.01 µF  
3
5
0.01  
3
ON  
8
7
+ 3.3 V ON/OFF  
+ 5 V ON/OFF  
SHUTDOWN  
3
5
3.45 V Voltage Adjust  
3.6 V Voltage Adjust  
3.45ADJ  
3.6ADJ  
13  
12  
11  
9
ON  
SHDN  
SYNC  
GND  
OSC SYNC  
10  
20  
REF  
PGND  
+ 3.3 V at 5 mA  
C3  
1 µF  
Note 1: Use short, Kelvin-connected PC board  
traces placed very close to one another.  
Figure 1. Si9130 Application Circuit  
www.vishay.com  
8
Document Number: 70190  
S11-0975-Rev. G, 16-May-11  
This document is subject to change without notice.  
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000  
Si9130  
Vishay Siliconix  
3.3 V Switching Supply  
currents at power-on are avoided, and power-supplies can  
be sequenced with different turn-on delay times by selecting  
the correct capacitor value.  
The 3.3 V supply is regulated by a current-mode PWM  
controller in conjunction with several externals: two  
N-Channel MOSFETs, a rectifier, an inductor and output  
capacitors (see Figure 1). The gate drive supplied by DH3  
needs to be greater than VL , so it is provided by the  
bootstrap circuit consisting of a 100 nF capacitor and diode  
connected to BST3.  
5 V Switching Supply  
The 5 V supply is regulated by a current-mode PWM  
controller which is nearly the same as the 3.3 V output. The  
dropout voltage across the 5 V supply, as shown in the  
schematic in Figure 1, is 400 mV (typ) at 2 A. If the voltage  
at V+ falls, nearing 5 V, the 5 V supply will lower as well, until  
the VL linear regulator output falls below the 4 V  
undervoltage lockout threshold. Below this threshold, the 5 V  
controller is shut off.  
A low-side switching MOSFET connected to DL3 increases  
efficiency by reducing the voltage across the rectifier diode.  
A low value sense resistor in series with the inductor sets the  
maximum current limit, to disallow current overloads at  
power-on or in short-circuit situations.  
The soft-start feature on the Si9130 is capacitor  
programmable; pin SS3 functions as a constant current  
source to the external capacitor connected to GND. Excess  
The frequency of both PWM controllers is set at 300 kHz  
when the SYNC pin is tied to REF. Connecting SYNC to  
either GND or VL sets the frequency at 200 kHz.  
FB  
+ 5 V LDO  
3
V+  
Linear  
CS  
3
Regulator  
BST  
3.3 V  
PWM  
Controller  
3
V
L
DH  
3
3.45ADJ  
3.6ADJ  
REF  
(See Figure 3)  
+ 3.3 V  
Reference  
ON  
LX  
3
DL  
3
ON  
SS  
3
4.5 V  
SHDN  
PGND  
ON  
4 V  
3
FB  
5
CS  
5
2.8 V  
5 V  
PWM  
Controller  
BST  
5
DH  
STANDBY  
300 kHz/200 kHz  
Oscillator  
5
SYNC  
ON  
(See Figure 3)  
LX  
5
DL  
5
ON  
SS  
5
ON  
5
Figure 2. Si9130 Block Diagram  
Document Number: 70190  
S11-0975-Rev. G, 16-May-11  
www.vishay.com  
9
This document is subject to change without notice.  
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000  
Si9130  
Vishay Siliconix  
CS_  
FB_  
1X  
REF,  
3.3 V  
(or Internal  
60 kHz  
LPF  
5 V Reference)  
Summing  
Comparator  
BST_  
DH_  
LX_  
R
S
Q
Level  
Shift  
OSC  
Slope  
Comp  
25 mV  
Minimum Current  
(Pulse-Skipping Mode)  
V
L
Current  
Limit  
4 µA  
Shoot-  
Through  
Control  
0 mV to  
100 mV  
SS_  
ON_  
30R  
3.3 V  
1R  
Synchronous  
Rectifier Control  
V
L
R
Q
S
Level  
Shift  
DL_  
PGND  
Figure 3. Si9130 Controller Block Diagram  
3.3 V and 5 V Switching Controllers  
The main PWM comparator is an open loop device which is  
comprised of three comparators summing four signals: the  
feedback voltage error signal, current sense signal, slope-  
compensation ramp and voltage reference as shown in  
Figure 3. This method of control comes closer to the ideal of  
maintaining the output voltage on a cycle-by-cycle basis.  
When the load demands high current levels, the controller is  
in full PWM mode. Every cycle from the oscillator asserts the  
output latch and drives the gate of the high-side MOSFET for  
a period determined by the duty cycle (approximately  
VOUT/VIN x 100 %) and the frequency.  
Each PWM controller on the Si9130 is identical with the  
exception of the preset output voltages. The controllers only  
share three functional blocks (see Figure 3): the oscillator,  
the voltage reference (REF) and the 5 V logic supply (VL).  
The 3.3 V and 5 V controllers are independently enabled with  
pins ON3 and ON5, respectively. The PWMs are a direct-  
summing type, without the typical integrating error amplifier  
along with the phase shift which is a side effect of this type of  
topology. Feedback compensation is not needed, as long as  
the output capacitance and its ESR requirements are met,  
according to the Design Considerations section of this data  
sheet.  
The high-side switch turns off, setting the synchronous  
rectifier latch and 60 ns later, the rectifier MOSFET turns on.  
The low-side switch stays on until the start of the next clock  
www.vishay.com  
10  
Document Number: 70190  
S11-0975-Rev. G, 16-May-11  
This document is subject to change without notice.  
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000  
Si9130  
Vishay Siliconix  
cycle in continuous mode, or until the inductor current  
becomes positive again, in discontinuous mode. In over-  
current situations, where the inductor current is greater than  
the 100 mV current-limit threshold, the high-side latch is  
reset and the high-side gate drive is shut off.  
Synchronous rectification is always active when the Si9130  
is powered-up, regardless of the operational mode.  
Gate-Driver Boost  
During low-current load requirements, the inductor current  
will not deliver the 25 mV minimum current threshold. The  
Minimum Current comparator signals the PWM to enter  
pulse-skipping mode when the threshold has not been  
reached. pulse-skipping mode skips pulses to reduce  
switching losses, the losses which decrease efficiency the  
most at light load. Entering this mode causes the minimum  
current comparator to reset the high-side latch at the  
beginning of each oscillator cycle.  
The high-side N-Channel drive is supplied by a flying-  
capacitor boost circuit (see Figure 4). The capacitor takes a  
charge from VL and then is connected from gate to source of  
the high-side MOSFET to provide gate enhancement. At  
power-up, the low-side MOSFET pulls LX_ down to GND  
and charges the BST_ capacitor connected to 5 V. During  
the second half of the oscillator cycle, the controller drives  
the gate of the high-side MOSFET by internally connecting  
node BST_ to DH_. This supplies a voltage 5 V higher than  
the battery voltage to the gate of the high-side MOSFET.  
Soft-Start  
Oscillations on the gates of the high-side MOSFET in  
discontinuous mode are a natural occurrence caused by the  
LC network formed by the inductor and stray capacitance at  
the LX_ pins. The negative side of the BST_ capacitor is  
connected to the LX_ node, so ringing at the inductor is  
translated through to the gate drive.  
To slowly bring up the 3.3 V and 5 V supplies, connect  
capacitors from SS3 and SS5 to GND. Asserting ON3 or ON5  
starts a 4 A constant current source to charge these  
capacitors to 4 V. As the voltage on these pins ramps up, so  
does the current limit comparator threshold, to increase the  
duty cycle of the MOSFETs to their maximum level. If ON3 or  
ON5 are left low, the respective capacitor is discharged to  
GND. Leaving the SS3 or SS5 pins open will cause either  
controller to reach the terminal over-current level within  
10 µs.  
BATTERY  
INPUT  
Soft start helps prevent current spikes at turn-on and allows  
separate supplies to be delayed using external  
programmability.  
V
L
V
L
BST_  
DH_  
Synchronous Rectifiers  
Level  
Translator  
Synchronous rectification replaces the Schottky rectifier with  
a MOSFET, which can be controlled to increase the  
efficiency of the circuit.  
LX_  
PWM  
When the high-side MOSFET is switched off, the inductor will  
try to maintain its current flow, inverting the inductor’s  
polarity. The path of current then becomes the circuit made  
of the Schottky diode, inductor and load, which will charge  
the output capacitor. The diode has a 0.5 V forward voltage  
drop, which contributes a significant amount of power loss,  
decreasing efficiency. A low-side switch is placed in parallel  
with the Schottky diode and is turned on just after the diode  
begins to conduct. Because the rDS(ON) of the MOSFET is  
low, the I*R voltage drop will not be as large as the diode,  
which increases efficiency.  
V
L
DL_  
Figure 4. Boost Supply for Gate Drivers  
The low-side rectifier is shut off when the inductor current  
drops to zero.  
Shoot-through current is the result when both the high-side  
and rectifying MOSFETs are turned on at the same time.  
Break-before-make timing internal to the Si9130 manages  
this potential problem. During the time when neither  
MOSFET is on, the Schottky is conducting, so that the body  
diode in the low-side MOSFET is not forced to conduct.  
Document Number: 70190  
S11-0975-Rev. G, 16-May-11  
www.vishay.com  
11  
This document is subject to change without notice.  
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000  
Si9130  
Vishay Siliconix  
OPERATIONAL MODES  
PWM Mode  
The SYNC pin can be driven with an external CMOS level  
signal with frequency from 240 kHz and 350 kHz to  
synchronize to the internal oscillator. Tying SYNC to either  
VL or GND sets the frequency to 200 kHz and to REF sets  
the frequency to 300 kHz.  
The 3.3 V and 5 V Buck controllers operate in continuous-  
current PWM mode when the load demands more than  
approximately 25 % of the maximum current (see typical  
curves). The duty cycle can be approximated as Duty_Cycle  
= VOUT/VIN.  
Operation at 300 kHz is typically used to minimize output  
passive component sizes. Slower switching speeds of  
200 kHz may be needed for lower input voltages.  
In this mode, the inductor current is continuous; in the first  
half of the cycle, the current slopes up when the high-side  
MOSFET conducts and then, in the second half, slopes back  
down when the inductor is providing energy to the output  
capacitor and load. As current enters the inductor in the first  
half-cycle, it is also continuing through to the load; hence, the  
load is receiving continuous current from the inductor. By  
using this method, output ripple is minimized and smaller  
form-factor inductors can be used. The output capacitor’s  
ESR has the largest effect on output ripple. It is typically  
under 50 mV; the worst case condition is under light load with  
higher input battery voltage.  
Internal VL and REF  
A 5 V linear regulator supplies power to the internal logic  
circuitry. The regulator is available for external use from pin  
VL, able to source 5 mA. A 4.7 µF capacitor should be  
connected between VL and GND. To increase efficiency,  
when the 5 V switching supply has voltage greater than  
4.5 V, VL is internally switched over to the output of the 5 V  
switching supply and the linear regulator is turned off.  
The 5 V linear regulator provides power to the internal 3.3 V  
bandgap reference (REF). The 3.3 V reference can supply  
5 mA to an external load, connected to pin REF. Between  
REF and GND connect a capacitor, 0.22 µF plus 1 µF per mA  
of load current. The switching outputs will vary with the  
reference; therefore, placing a load on the REF pin will cause  
the main outputs to decrease slightly, within the specified  
regulation tolerance.  
Pulse-Skipping Mode  
When the load requires less than 25 % of its maximum, the  
Si9130 enters a mode which drives the gate for one clock  
cycle and skips the majority of the remaining cycles. Pulse-  
skipping mode cuts down on the switching losses, the  
dominant power consumer at low current levels.  
VL and REF supplies stay on as long as V+ is greater than  
4.5 V, even if the switching supplies are not enabled. This  
feature is necessary when using the micropower regulators  
to keep memory alive during shutdown.  
In the region between pulse-skipping mode and PWM mode,  
the controller may transition between the two modes,  
delivering spurts of pulses. This may cause the current  
waveform to look irregular, but will not overly affect the ripple  
voltage. Even in this transitioning mode efficiency will stay  
high.  
Both linear regulators can be connected to their respective  
switching supply outputs. For example, REF would be tied to  
the output of the 3.3 V and VL to 5 V. This will keep the main  
supplies up in standby mode, provided that each load current  
in shutdown is not larger than 5 mA.  
Current Limit  
Fault Protection  
The current through an external resistor, is constantly  
monitored to protect against over-current. A low value  
resistor is placed in series with the inductor. The voltage  
across it is measured by connecting it between CS_ and  
FB_. If this voltage is larger than 100 mV, the high-side  
MOSFET drive is shut down. Eliminating over-currents  
protects the MOSFET, the load and the power source.  
Typical values for the sense resistors with a 3 A load will be  
25 m.  
The 3.3 V and 5 V switching controllers are shut down when  
one of the linear regulators drops below 85 % of its nominal  
value;  
that  
is,  
shut  
down  
will  
occur  
when  
VL < 4.0 V or REF < 2.8 V.  
Oscillator and SYNC  
There are two ways to set the Si9130 oscillator frequency: by  
using an external SYNC signal, or using the internal  
oscillator.  
www.vishay.com  
12  
Document Number: 70190  
S11-0975-Rev. G, 16-May-11  
This document is subject to change without notice.  
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000  
Si9130  
Vishay Siliconix  
Where: CF = Output filter capacitance (F)  
VREF = Reference voltage, 3.3 V;  
VOUT = Output voltage, 3.3 V or 5 V;  
DESIGN CONSIDERATIONS  
Inductor Design  
RCS = Sense resistor ();  
GBWP = Gain-bandwidth product, 60 kHz;  
ESRCF = Output filter capacitor ESR ().  
Both minimum capacitance and maximum ESR  
requirements must be met. In order to get the low ESR, a  
capacitance value of two to three times greater than the  
required minimum may be necessary.  
Three specifications are required for inductor design:  
inductance (L), peak inductor current (ILPEAK), and coil  
resistance (RL). The equation for computing inductance is:  
VOUT VIN(MAX)- VOUT  
L
The equation for output ripple in continuous current mode is:  
( )  
(
)
VIN(MAX) f IOUT LIR  
Where: VOUT = Output voltage (3.3 V or 5 V);  
IN(MAX) = Maximum input voltage (V);  
V
1
+
ESRCF  
VOUT(RPL)  
ILPP(MAX)  
x
f = Switching frequency, normally 300 kHz;  
IOUT = Maximum dc load current (A);  
LIR = Ratio of inductor peak-to-peak ac current to average dc  
load current, typically 0.3.  
2 x f CF  
x
The equations for capacitive and resistive components of the  
ripple in pulse-skipping mode are:  
When LIR is higher, smaller inductance values are  
acceptable, at the expense of increased ripple and higher  
losses.  
(4) 10- 4 (L)  
1
1
V
OUT(RPL)(C)  
+
x
Volts  
2
VOUT VIN- VOUT  
RCS CF  
The peak inductor current (ILPEAK) is equal to the steady-  
state load current (IOUT) plus one half of the peak-to-peak ac  
current (ILPP). Typically, a designer will select the ac inductor  
current to be 30 % of the steady-state current, which gives  
(0.02) ESRCF  
RCS  
VOUT(RPL)(R)  
Volts  
ILPEAK equal to 1.15 times IOUT  
.
The equation for computing peak inductor current is:  
The total ripple, VOUT(RPL), can be approximated as follows:  
if VOUT(RPL)(R) < 0.5 VOUT(RPL)(C),  
VOUT VIN(MAX)- VOUT  
then VOUT(RPL) = VOUT(RPL)(C),  
ILPEAK  
IOUT  
+
otherwise, VOUT(RPL) = 0.5 VOUT(RPL)(C) +  
(2)(f)(L) VIN(MAX)  
VOUT(RPL)(R).  
OUTPUT CAPACITORS  
Lower Voltage Input  
The output capacitors determine loop stability and ripple  
voltage at the output. In order to maintain stability, minimum  
capacitance and maximum ESR requirements must be met  
according to the following equations:  
The application circuit shown here can be easily modified to  
work with 5.5 V to 12 V input voltages. Oscillation frequency  
should be set at 200 kHz and increase the output  
capacitance to 660 µF on the 5 V output to maintain stable  
performance up to 2 A of load current. Operation on the  
3.3 V supply will not be affected by this reduced input  
voltage.  
VREF  
CF  
VOUT RCS (2)(π)(GBWP)  
and,  
VOUT RCS  
ESRCF  
VREF  
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Tech-  
nology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability  
data, see www.vishay.com/ppg?70190.  
Document Number: 70190  
S11-0975-Rev. G, 16-May-11  
www.vishay.com  
13  
This document is subject to change without notice.  
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000  
Package Information  
Vishay Siliconix  
SSOP: 28-LEAD (5.3 MM) (POWER IC ONLY)  
28  
15  
B−  
E
1
E
1
14  
A−  
D
e
GAUGE PLANE  
R
c
A
2
A
1
A
C−  
L
SEATING PLANE  
SEATING PLANE  
0.076  
C
L
1
b
S
M
0.12  
A
B
C
MILLIMETERS  
Dim  
A
A1  
A2  
b
c
D
E
E1  
e
Min  
Nom  
1.88  
Max  
1.99  
0.21  
1.78  
0.38  
0.20  
10.33  
8.00  
5.40  
1.73  
0.05  
1.68  
0.25  
0.09  
10.07  
7.60  
5.20  
0.13  
1.75  
0.30  
0.15  
10.20  
7.80  
5.30  
0.65 BSC  
0.75  
0.63  
0.95  
L
1.25 BSC  
0.15  
L1  
R
0.09  
− − −  
0_  
4_  
8_  
ECN: S-40080—Rev. A, 02-Feb-04  
DWG: 5915  
Document Number: 72810  
28-Jan-04  
www.vishay.com  
1
Legal Disclaimer Notice  
Vishay  
Disclaimer  
ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE  
RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.  
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively,  
“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other  
disclosure relating to any product.  
Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or  
the continuing production of any product. To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all  
liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special,  
consequential or incidental damages, and (iii) any and all implied warranties, including warranties of fitness for particular  
purpose, non-infringement and merchantability.  
Statements regarding the suitability of products for certain types of applications are based on Vishay’s knowledge of typical  
requirements that are often placed on Vishay products in generic applications. Such statements are not binding statements  
about the suitability of products for a particular application. It is the customer’s responsibility to validate that a particular  
product with the properties described in the product specification is suitable for use in a particular application. Parameters  
provided in datasheets and/or specifications may vary in different applications and performance may vary over time. All  
operating parameters, including typical parameters, must be validated for each customer application by the customer’s  
technical experts. Product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase,  
including but not limited to the warranty expressed therein.  
Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining  
applications or for any other application in which the failure of the Vishay product could result in personal injury or death.  
Customers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk and agree  
to fully indemnify and hold Vishay and its distributors harmless from and against any and all claims, liabilities, expenses and  
damages arising or resulting in connection with such use or sale, including attorneys fees, even if such claim alleges that Vishay  
or its distributor was negligent regarding the design or manufacture of the part. Please contact authorized Vishay personnel to  
obtain written terms and conditions regarding products designed for such applications.  
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by  
any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners.  
Document Number: 91000  
Revision: 11-Mar-11  
www.vishay.com  
1

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