概述
规格参数
数据手册SI9976DY-T1 概述
N-Channel Half-Bridge Driver N通道半桥驱动器 MOSFET 驱动器
SI9976DY-T1 规格参数
| 是否Rohs认证： | 不符合 | 生命周期： | Transferred |
| 零件包装代码： | SOIC | 包装说明： | SOP, |
| 针数： | 14 | Reach Compliance Code： | compliant |
| ECCN代码： | EAR99 | HTS代码： | 8542.39.00.01 |
| 风险等级： | 5.33 | Is Samacsys： | N |
| 其他特性： | ALSO REQUIRES A 20V TO 40V SUPPLY | 高边驱动器： | YES |
| 输入特性： | SCHMITT TRIGGER | 接口集成电路类型： | HALF BRIDGE BASED MOSFET DRIVER |
| JESD-30 代码： | R-PDSO-G14 | JESD-609代码： | e0 |
| 长度： | 8.65 mm | 功能数量： | 1 |
| 端子数量： | 14 | 最高工作温度： | 85 °C |
| 最低工作温度： | -40 °C | 输出特性： | TOTEM-POLE |
| 标称输出峰值电流： | 0.5 A | 输出极性： | TRUE |
| 封装主体材料： | PLASTIC/EPOXY | 封装代码： | SOP |
| 封装形状： | RECTANGULAR | 封装形式： | SMALL OUTLINE |
| 峰值回流温度（摄氏度）： | 240 | 认证状态： | Not Qualified |
| 座面最大高度： | 1.75 mm | 最大供电电压： | 16.5 V |
| 最小供电电压： | 4.5 V | 电源电压1-最大： | 40 V |
| 电源电压1-分钟： | 20 V | 表面贴装： | YES |
| 技术： | MOS | 温度等级： | INDUSTRIAL |
| 端子面层： | TIN LEAD | 端子形式： | GULL WING |
| 端子节距： | 1.27 mm | 端子位置： | DUAL |
| 处于峰值回流温度下的最长时间： | 30 | 宽度： | 3.9 mm |
| Base Number Matches： | 1 |
SI9976DY-T1 数据手册
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PDF下载Si9976
Vishay Siliconix
N-Channel Half-Bridge Driver
FEATURES
APPLICATIONS
D Single Input for High-Side and Low-Side MOSFETs
D 20- to 40-V Supply
D Power Supplies
D Motor Drives
D Static (dc) Operation
D Office Automation
D Computer Peripherals
D Industrial Controllers
D Robotics
D Cross-Conduction Protected
D Undervoltage Lockout
D ESD and Short Circuit Protected
D Fault Feedback
D Medical Equipment
DESCRIPTION
The Si9976 is an integrated driver for an n-channel MOSFET
half-bridge. Schmitt trigger inputs provide logic signal
compatibility and hysteresis for increased noise immunity. An
internal low-voltage regulator allows the device to be powered
directly from a system supply of 20 to 40 volts. Both half-bridge
n-channel gates are driven directly with low-impedance
outputs. Addition of one external capacitor allows an internal
circuit to level shift both the power supply and logic signal for
the half-bridge high-side n-channel gate drive. An internal
charge pump replaces leakage current lost in the high-side
driver circuit to provide “static” (dc) operation in any output
condition. Protection features include an undervoltage
lockout, cross-conduction prevention logic, and a short circuit
monitor.
The Si9976 is available in both standard and lead (Pb)-free,
14-pin SOIC (surface mount) packages, specified to operate
over the industrial (−40 to 85_C) temperature range.
FUNCTIONAL BLOCK DIAGRAM
V+
Bootstrap
Regulator
CAP
2
V+
3
C
Boot
Low Voltage
Regulator
Under Voltage
Lockout 1
Charge
Pump
V
DD
V
DD
Under Voltage
Lockout 2
4
G
1
12
13
V
CC
7
8
S
1
Short Circuit
& UVL Detect
Half-
Bridge
Output
FAULT
IN
5
250 ns
Delay
0.01 mF
300 ns
Delay
Substrate
G
2
9
EN
6
R
S
Q
10
Enable Latch
GND
GND
Document Number: 70016
S-40757—Rev. F, 19-Apr-04
www.vishay.com
1
Si9976
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS
Voltage on IN, EN (pins 5, 6)
with respect to ground . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 to V +0.3 V
Maximum Junction Temperature (T ) . . . . . . . . . . . . . . . . . . . . . . . . . . . 125_C
J
DD
b
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 W
Voltage on V (pin 7) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 to +18 V
CC
b
Q
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100_C/W
JA
Voltage on V+, S1 (pins 3, 13) . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 to +50 V
a
Voltage on CAP, G1 (pins 2, 12) . . . . . . . . . . . . . . . . . . . . . . . . −0.3 to +60 V
Notes
Peak Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 A
a. Internally generated voltage for reference only.
b. Derate 10 mW/_C above 25_C.
Operating Temperature (T ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40 to 85_C
A
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 to 150_C
c. PC board mounted with no forced air flow.
a
SPECIFICATIONS
Test Conditions
Limits
UnlessOtherwise Specified
D Suffix −40 to 85_C
V+ = 20 to 40 V
= Operating Temperature Range
Parameter
Symbol
Minc
Typb Maxc Unit
T
A
Input
Input Voltage High (EN and IN)
Input Voltage Low (EN and IN)
Input Hysteresis Voltage
V
4.0
INH
V
1.0
1
V
INL
V
0.5
12
H
Input Current—Input Voltage High
Input Current—Input Voltage Low
I
(EN and IN) V = 15 V
IN
INH
mA
I
(EN and IN) V = 0 V
−1
INL
IN
Output
d
Output Voltage High, G1
S1 = V+, I
= −10 mA
10
12
OUT
V
OUTH
e
Output Voltage High, G2
S1 = GND, I
= −10 mA
= 60 mA
15
1.2
4
OUT
Output Voltage Low, G1 and G2
Fault Output Voltage High
Fault Output Voltage Low
Undervoltage Lockout 1
Undervoltage Lockout 2
V
OUTL
S1 = GND, I
3
OUT
V
V
V
= 4.5 V, I
= −0.2 mA
3.5
OH
CC
OUT
V
V
= 4.5 V, I = 0.6 mA
OUT
0.3
11
14
55
1.0
OL
CC
UVL1
UVL2
g
Capacitor Voltage
V
CAP
V+ = 40V
S1 = GND, V
= 0 V
= 9 V
−10
−2
CAP
CAP
Capacitor Current
I
mA
CAP
S1 = GND, V
Supply
V+ Supply Range
20
40
3.5
V
I+ (H)
I+ (L)
G2 High, No Load
G2 Low, No Load, S1 = GND
1.7
2
V+ Supply Current
mA
4.5
V
CC
V
CC
V
DD
Supply Range
Supply Current
4.5
15
16.5
10
V
mA
V
I
V
CC
= 16.5 V
CC
f
Supply Voltage
V
16
17.5
DD
Document Number: 70016
S-40757—Rev. F, 19-Apr-04
www.vishay.com
2
Si9976
Vishay Siliconix
a
SPECIFICATIONS
Test Conditions
Limits
UnlessOtherwise Specified
D Suffix −40 to 85_C
V+ = 20 to 40 V
= Operating Temperature Range
Parameter
Dynamic
Symbol
Minc
Typb Maxc Unit
T
A
G1
350
Propogation Delay Time
Low to High Level
t
t
PLH
G2
G1
G2
400
150
50
50% IN to V
= 5 V, C = 600 pF
L
OUT
Propogation Delay Time
High to Low Level
PHL
ns
Propogation Delay Time, Low to High Lev-
el, Enable-to-Fault Output
50% IN to FAULT = 2 V, S1 shorted to GND or V+
1 to 10 V, C = 600 pf
500
Output Rise Time (G1, G2)
Output Fall Time (G1, G2)
Short Circuit Pulse Width
t
110
50
r
L
t
10 to 1 V, C = 600 pf
L
f
t
50% to 50% of V
350
SC
OUT
Notes
a. Refer to PROCESS OPTION FLOWCHART for additional information.
b. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
c. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum.
d. To supply the output current of 10 mA on a dc basis, an external 13-V supply must be connected between the CAP pin and the S1 pin with the negative terminal
of the supply connected to S1. This is not needed in an actual application because output currents are supplied by the C
respect to V+.
capacitor. Voltage specified with
BOOT
e. For testing purposes, the 10-mA load current must be supplied by an external current source to the V pin to avoid pulling down the V supply.
DD
DD
f.
g.
Internally generated voltage for reference only.
= (V+) + (V
V
CAP
)
DD
TRUTH TABLE
EN
IN
Condition
FAULT OUTPUT
G1 OUT
G2 OUT
1
1
0
1
Normal Operation
Normal Operation
0
0
Low
High
Low
High
a
0
1
1
1
1
X
X
0
1
1
0
X
Disabled
X
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
High
Low
b
Load Shorted to V+
Load Shorted to Ground
1
b
1
Undervoltage on C
Undervoltage on C
0
0
1
BOOT
BOOT
c
Undervoltage on V
DD
Notes
a. FAULT output retains previous state until ENABLE rising edge.
b. Latch FAULT condition, reset by ENABLE rising edge.
c.
V
DD
is an internally generated low-voltage supply.
Document Number: 70016
S-40757—Rev. F, 19-Apr-04
www.vishay.com
3
Si9976
Vishay Siliconix
PIN CONFIGURATION AND ORDERING INFORMATION
SOIC-14
NC
CAP
V+
NC
1
2
3
4
5
6
7
14
13
12
11
10
9
ORDERING INFORMATION
S1
Part Number
Temperature Range
Package
G1
Si9976DY
V
DD
NC
Si9976DY-T1
Si9976DY-T1—E3
−40 to 85_C
SOIC-14
IN
GND
G2
EN
V
CC
FAULT
8
Top View
PIN DESCRIPTION
Pin 1
Pin 7: VCC
If the FAULT output is used, the VCC pin must be connected to
the logic supply voltage in order to set the high level of the
FAULT output. If the FAULT output is not used, this pin may be
left open with no effect on internal fault sensing or protection
circuitry.
No connection.
Pin 2: CAP
Connection for the positive terminal of the bootstrap capacitor
CBOOT. A 0.01-mF CBOOT capacitor can be used for most
applications.
Pin 8: FAULT
The Fault output is latched high when a short-circuit output
condition is detected. FAULT will return low when the circuit is
reset using the EN pin. The FAULT output also indicates the
status of the undervoltage sense circuit on VDD, however the
fault condition is cleared automatically when the undervoltage
condition clears.
Pin 3: V+
This is the only external power supply required for the Si9976,
and must be the same supply used to power the half-bridge it
is driving. The Si9976 powers it’s low-voltage logic, low-side
gate driver, and bootstrap/charge pump circuits from
self-contained voltage regulators which require only a
bootstrap capacitor on the CAP pin and a bypass capacitor on
the VDD pin.
Pin 9: G2
This pin drives the gate of the external low-side power
transistor.
No voltage sensing circuitry monitors V+ directly; however, the
low-voltage, internally generated VDD supply and the
bootstrap voltage (which are derived from V+) are directly
protected by undervoltage monitors.
Pin 10: GND
The ground return for V+, logic reference, and connection for
source of external low-side power transistor.
Pin 4: VDD
Pin 11
Connection to the internally generated low-voltage supply
which must be bypassed to ground with a 0.01-mF capacitor.
No connection.
Pin 5: IN
Pin 12: G1
Logic input. A low level input turns off the high-side half-bridge
MOSFET and, after an internally set dead time, turns the
low-side half-bridge MOSFET on. A high input level has the
opposite effect. The input is compatible with 5-, 12- or 15-V
logic outputs.
This pin drives the gate of the external high side power
transistor.
Pin 13: S1
Connection for the source of the external high-side power
transistor, the drain of the external low-side power transistor,
the negative terminal of the bootstrap capacitor, and the
system load. The voltage on this pin is sensed by the circuitry
that monitors the load for shorts.
Pin 6: EN
Enable input. A low EN input level prevents turn on of either
half-bridge MOSFET. If the Si9976 is internally disabled as a
result of an output short-circuit condition, a low-to-high
transition on EN is required to clear the fault and resume
operation. The input logic levels are the same as IN.
Pin 14
No connection.
Document Number: 70016
S-40757—Rev. F, 19-Apr-04
www.vishay.com
4
Si9976
Vishay Siliconix
DETAILED DESCRIPTION
Power On Conditioning
Short Circuit Protection
Bootstrap-type floating supplies require that the bootstrap
capacitor be charged at power on. In the case of the Si9976,
this is accomplished by pulsing the IN line low with the EN line
held high, thus turning on the low-side MOSFET and providing
the charging path for the capacitor.
This device is intended to be used only in a half-bridge which
drives inductive loads. A shorted load is presumed if the load
voltage does not make the intended transition within an
allotted time. Separate timing is provided for the two
transitions. A longer time is allowed for the high-side to turn on
(300 ns vs. 200 ns) since the propagation delays are longer.
Excessive capacitive loading can be interpreted as a short.
The value of capacitance that is needed to produce the
indication of a short depends on the load driving capability of
the power transistors.
Operating Voltage: 20 to 40 V
The Si9976 is intended to be powered by a single power
supply within the range of 20 to 40 V and is designed to drive
a totem pole pair of NMOS power transistors such as those
within the Si9955. The power transistors must be powered by
the same power supply as this driver. In addition to the
high-voltage power supply (20 to 40 V), the Si9976 must have
a power supply connected to the VCC terminal, if a fault output
signal is desired. This power supply provides operating
voltage for the fault output and allows the high output voltage
level to be compatible with system logic that monitors the fault
condition. The value of this power supply must be within the
range of 4.5 to 16.5 V to ensure functionality of the output.
Internal fault circuitry, which is used for shorted-load
protection, is not affected by this power supply.
ESD Protection
Electrostatic discharge protection devices are between VDD
and GND, VCC and GND, and from terminals IN, EN, G2, and
FAULT to both VDD and GND. V+, CAP, S1, and G1 are not
ESD protected.
Fault Feedback
Detection of a shorted load sets a latch which turns off both the
high-side and the low-side power transistors. If VCC is present,
a one level will be present on the FAULT output. To reset the
system, the enable input, EN, must be lowered to a logic zero
and then raised to a logic one. The logic level of the input, IN,
will determine which power transistor will be turned on first after
reset. An undervoltage condition on VDD is not latched, but
causes a one level on the FAULT output, if VCC is present.
Cross-Conduction Protection
The high-side power transistor can only be turned on after a
fixed time delay following the return to ground of the low-side
power transistor’s gate. The low-side transistor can only be
turned on after a fixed time delay following the high-side
transistor turn-off signal.
Static (dc) Operation
Undervoltage Lockout
During power up, both power transistors are held off until the
internal regulated power supply, VDD, is approximately one
Vbe from the final value, nominally 16 V. After power up, the
undervoltage lockout circuitry continues to monitor VDD. If an
undervoltage condition occurs, both the high-side and
low-side transistors will be turned off and the fault output will be
set high. When the undervoltage condition no longer exists,
normal function will resume automatically. Separate voltage
sensing of the bootstrap capacitor voltage allows a turn-on
signal to be sent to the high-side drive circuit if either the
bootstrap capacitor has full voltage, or the load voltage is high
(driven high by an inductive load or shorted high). The voltage
sensing circuit will allow the high-side power transistor to turn
on if an on signal is present and the voltage on the bootstrap
capacitor rises from undervoltage to operating voltage.
All components of a charge pump, except the holding
(bootstrap) capacitor, are included in the circuit. This charge
pump will provide current that is sufficient to overcome any
leakage currents which would reduce the enhancement
voltage of the high-side power transistor while it is on. This
allows the high-side power transistor to be on continuously.
When the low-side power transistor is turned on, additional
charge is restored to the bootstrap capacitor, if needed. The
maximum switching speed of the system at 50% duty cycle is
limited by the on time of the low-side power transistor. During
this time, the bootstrap capacitor charge must be restored.
However, if the duty cycle is skewed so that the on time of the
high-side power transistor is long enough for the charge pump
to completely restore the charge lost during switching, then the
on time of the low-side power transistor is not restricted.
Document Number: 70016
S-40757—Rev. F, 19-Apr-04
www.vishay.com
5
Legal Disclaimer Notice
Vishay
Notice
Specifications of the products displayed herein are subject to change without notice. Vishay Intertechnology, Inc.,
or anyone on its behalf, assumes no responsibility or liability for any errors or inaccuracies.
Information contained herein is intended to provide a product description only. No license, express or implied, by
estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Vishay's
terms and conditions of sale for such products, Vishay assumes no liability whatsoever, and disclaims any express
or implied warranty, relating to sale and/or use of Vishay products including liability or warranties relating to fitness
for a particular purpose, merchantability, or infringement of any patent, copyright, or other intellectual property right.
The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications.
Customers using or selling these products for use in such applications do so at their own risk and agree to fully
indemnify Vishay for any damages resulting from such improper use or sale.
Document Number: 91000
Revision: 08-Apr-05
www.vishay.com
1
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