ACE93C66FM+TH [ACE]
Three-wire Serial EEPROM; 三线制串行EEPROM型号: | ACE93C66FM+TH |
厂家: | ACE TECHNOLOGY CO., LTD. |
描述: | Three-wire Serial EEPROM |
文件: | 总14页 (文件大小:938K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
ACE93C46.56.66
Three-wire Serial EEPROM
Description
The ACE93C46/56/66 provides 1024/2048/4096 bits of serial electrically erasable programmable read only memory
(EEPROM) organized as 64/128/256 words of 16 bits each, when the ORG pin is connected to VCC and 128/256/512
words of 8 bits each when it is tied to ground. The ACE93C46/56/66 is available in space-saving 8-lead PDIP, 8-lead
TSSOP and 8-lead JEDEC SOIC packages. The ACE93C46/56/66 is enabled through the Chip Select pin (CS), and
accessed via a 3-wire serial interface consisting of Data Input (DI), Data Output (DO), and Shift Clock (SK). Upon
receiving a Read instructionat DI, the address is decoded and the data is clocked out seriallyon the data output pin DO.
The WRITE cycle is completely self-timed and no separate erase cycle is required before write. The Write cycle is only
enabled when it is in the Erase/Write Enable state. When CS is brought “high” following the initiation of a write cycle, the
DO pin outputsthe Ready/Busystatus.
Features
Low-voltage operation – 1.8 (VCC=1.8V to 5.5V)
Three-wire serial Interface
2MHz clock rate(5V) compatibility
Self-timed write cycle (5 ms max)
High-reliability – Endurance: 1 Million write cycles
Data retention: 100 Years
Packaging Type
DIP-8
SOP-8
TSSOP-8
Pin Configurations
Pin Name
Function
CS
SK
Chip select
Serial Data Clock
Serial Data Input
Serial Data Output
Ground
DI
DO
GND
Vcc
ORG
DC
Power Supply
Internal Organization
Don’t Connect
VER 1.5
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ACE93C46.56.66
Three-wire Serial EEPROM
Block Diagram
ACE93C46
Note: When the ORG pin is connected to VCC, the “x 16” organization is selected. When it is connected to ground, the “x 8”
organization is selected. If the ORG pin is left unconnected and the application does not load the input beyond the capability
of the internal 1 Meg ohm pullup, then the “x 16” organization is selected.
VER 1.5
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ACE93C46.56.66
Three-wire Serial EEPROM
ACE93C56/66
Note: When the ORG pin is connected to VCC, the “x 16” organization is selected. When it is connected to ground, the “x 8”
organization is selected. If the ORG pin is left unconnected and the application does not load the input beyond the capability
of the internal 1 Meg ohm pullup, then the “x 16” organization is selected.
Absolute Maximum Ratings
DC Supply Voltage
Input / Output Voltage
-0.3 to 6.5V
GND -0.3 to Vcc 0.3V
-40 to 85℃
Operating Ambient Temperature
Storage Temperature
-65 to 150℃
*Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to this device. These are
stress ratings only. Functional operation of this device at these or any other conditions above those indicated in the
operational sections of this specification is not implied or intended. Exposure to the absolute maximum rating conditions for
extended periods may affect device reliability.
VER 1.5
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ACE93C46.56.66
Three-wire Serial EEPROM
Ordering information
ACE93C46/56/66 XX
+
X H
Halogen-free
U : Tube
T : Tape and Reel
Pb - free
DP : DIP-8
FM : SOP-8
TM : TSSOP-8
Pin Capacitance
Applicable over recommended operating range from TA=25℃, f=1.0MHz,VCC=+1.8V (unless otherwise noted)
Test Conditions
Symbol Max Unit Conditions
Output Capacitance (DO)
Input Capacitance (CS, SK, DI)
COUT
CIN
5
5
pF
pF
VOUT=0V
VIN=0V
DC Characteristics
Applicable over recommended operating range from: TA = -40℃ to +85℃, VCC = +1.8V to +5.5V, (unless otherwise noted).
Symbol
VCC1
Parameter
Test Condition
Min
1.8
2.7
4.5
Typ
Max
5.5
Units
Supply Voltage
Supply Voltage
Supply Voltage
V
V
V
VCC2
5.5
VCC3
5.5
VCC = 5.0V,
ICC1
Supply Current
Read at 1.0MHz
Write at 1.0MHz
VCC = 1.8V, CS=0V
VCC = 2.7V, CS=0V
VCC = 5.0V, CS=0V
VIN = 0 to VCC
0.2
0.9
2.0
3.0
mA
ISB1
ISB2
Standby Current
Standby Current
Standby Current
Input Leakage
1.0
µA
µA
µA
µA
µA
µA
V
1.0
ISB3
1.0
ILI(1)
0.1
2.0
0.1
1.0
ILI(2)
Input Leakage
VIN = 0 to VCC
3.0
IOL
Output Leakage
Input Low Voltage
Input High Voltage
Input Low Voltage
Input High Voltage
VIN = 0 to VCC
1.0
2.7V≦Vcc≦5.5V
2.7V≦Vcc≦5.5V
1.8V≦Vcc≦2.7V
1.8V≦Vcc≦2.7V
VIL1(3)
VIH1(3)
VIL2(3)
VIH2(3)
-0.3
2.0
0.8
Vcc+0.3
Vcc+0.3
Vcc+0.3
V
-0.3
V
Vcc*0.7
V
VER 1.5
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ACE93C46.56.66
Three-wire Serial EEPROM
Symbol
Parameter
Test Condition
2.7V≦Vcc≦5.5V
IOL=2.1mA
Min
Typ
Max
Units
VOL1
Output Low Voltage
0.4
V
VOH1
VOL2
VOH2
Output High Voltage
Output Low Voltage
Output High Voltage
IOH=-0.4mA
2.4
1.8V≦Vcc≦2.7V
IOL=0.15mA
0.2
V
IOH=-100uA
Vcc-0.2
Note: 1. DI.CS. SK input pin
2. ORG input pin
3. VIL min and VIH max are reference only and are not tested.
Applicable over recommended operating range from: TA = -40℃ to +85℃, VCC = +1.8V to +5.5V, CL=1TTL Gate and 100pF
(unless otherwise noted).
Symbol
Parameter
Test Condition
4.5≦Vcc≦5.5v
2.7≦Vcc≦5.5V
1.8V≦Vcc≦5.5V
4.5≦Vcc≦5.5v
2.7≦Vcc≦5.5V
1.8V≦Vcc≦5.5V
4.5≦Vcc≦5.5v
2.7≦Vcc≦5.5V
1.8V≦Vcc≦5.5V
4.5≦Vcc≦5.5v
2.7≦Vcc≦5.5V
1.8V≦Vcc≦5.5V
Min Typ Max
Units
0
2
1
fsx
SK Clock Frequency
0
MHz
0
0.25
250
250
1000
250
250
1000
250
250
1000
50
tskh
tskl
tcs
SK High Time
SK Low Time
ns
ns
ns
ns
Minimum CS Low Time
CS Setup Time
4.5≦Vcc≦5.5v
Relative to
SK
2.7≦Vcc≦5.5V
1.8V≦Vcc≦5.5V
4.5≦Vcc≦5.5v
2.7≦Vcc≦5.5V
1.8V≦Vcc≦5.5V
tcss
50
200
100
100
400
0
Relative to
SK
tdis
tcsh
tdih
DI Setup Time
CS Hold Time
DI Hold Time
ns
ns
ns
Relative to SK
4.5≦Vcc≦5.5v
2.7≦Vcc≦5.5V
1.8V≦Vcc≦5.5V
100
100
400
Relative to
SK
VER 1.5
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ACE93C46.56.66
Three-wire Serial EEPROM
Symbol
Parameter
Test Condition
Min Typ Max
Units
4.5≦Vcc≦5.5v
250
250
1000
250
250
1000
250
250
1000
100
100
400
2.7≦Vcc≦5.5V
1.8V≦Vcc≦5.5V
4.5≦Vcc≦5.5v
2.7≦Vcc≦5.5V
1.8V≦Vcc≦5.5V
4.5≦Vcc≦5.5v
2.7≦Vcc≦5.5V
1.8V≦Vcc≦5.5V
4.5≦Vcc≦5.5v
2.7≦Vcc≦5.5V
1.8V≦Vcc≦5.5V
tpd1
Output Delay to “1”
AC Test
AC Test
AC Test
ns
tpd0
tsv
Output Delay to “0”
ns
ns
ns
CS to Status Valid
CS to DO in High
Impedance
AC Test
CS=VIL
tdf
twp
Write Cycle Time
1.5
5
ms
Write
Cycle
Endurance(1)
1M
5.0V, 25℃
Note: 1. This parameter is characterized and is not 100% tested.
Functional Description
The ACE93C46/56/66 is accessed via a simple and versatile three-wire serial communication interface. Device
operation is controlled by seven instructions issued by the host processor. Avalid instruction starts with a rising edge of
CS and consists of a start bit (logic“1”) followed bythe appropriateop code andthedesired memoryaddresslocation.
Instruction Set for the ACE93C46
Address
*8
Data
*8 *16
OP
Code
Instruction SB
Comments
*16
Read data stored in memory, at
specified address
READ
EWEN
1
1
10
00
A6-A0
A5-A0
Write enable must precede all
programming modes
11XXXXX 11XXXX
REASE
WRITE
1
1
11
01
A6-A0
A6-A0
A5-A0
A5-A0
Erase memory location An-A0
D7-D0 D15-D0
Writes memory location An-A0
Erases all memory locations. Valid
only at VCC=4.5V to 5.5V
Writes all memory locations. Valid
only at VCC=4.5V to 5.5V
Disables all programming
instructions
ERAL
WRAL
EWDS
1
1
1
00
00
00
10XXXXX 10XXXX
01XXXXX 01XXXX D7-D0 D15-D0
00XXXXX 00XXXX
Notes: The X’s in the address field represent don’t care values and must be clocked.
VER 1.5
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ACE93C46.56.66
Three-wire Serial EEPROM
Instruction Set for the ACE93C56/66
Address
Data
OP
Code
Instruction SB
Comments
*16
*8
*16
*8
Read data stored in memory,
at specified address
Write enable must precede all
programming modes
Erase memory location
An-A0
READ
EWEN
REASE
WRITE
1
1
1
1
10
00
11
01
A8-A0
A7-A0
11XXXXXX 11XXXXXX
A8-A0
A8-A0
A7-A0
A7-A0
Writes memory location
D7-D0 D15-D0
An-A0
Erases all memory locations.
Valid only at VCC=4.5V to
5.5V
ERAL
1
00
10XXXXXXX 10XXXXXX
Writes all memory locations.
Valid only at VCC=4.5V to
5.5V
WRAL
EWDS
1
1
00
00
01XXXXXXX 01XXXXXX D7-D0 D15-D0
00XXXXXXX 00XXXXXX
Disables all programming
instructions
Notes: The X’s in the address field represent don’t care values and must be clocked.
READ (READ):
The Read (READ) instruction contains the address code for the memory location to be read. After the instruction and
address are decoded, data from the selected memory location is available at the serial output pin DO. Output data
changes are synchronized with the rising edges of serial clock SK. It should be noted that a dummy bit (logic “0”)
precedes the 8- or 16-bit data output string. The ACE93C56/66 supports sequential read operations. The device will
automaticallyincrement theinternal address pointer andclock out the next memorylocation as long as Chip Select (CS)
is held high .In this case ,the dummy bit (logic “0”)will not be clocked out between memory locations, thus allowing for a
continuous steam of datatobe read.
ERASE/WRITE (EWEN):
To assure data integrity, the part automatically goes into the Erase/Write Disable (EWDS) state when power is first
applied. An Erase/Write Enable(EWEN) instruction must be executed first before any programming instructions can be
carried out. Please note that once in the EWEN state, programming remains enabled until an EWDS instruction is
executed or VCC power is removedfrom thepart.
ERASE (ERASE):
The Erase (ERASE) instruction programs all bits in the specified memory location to the logical “1” state. The
self-timed erase cycle starts once the ERASE instruction and address are decoded. The DO pin outputs the
Ready/Busystatus of the part if CS is brought high afterbeing kept lowfor aminimum of 250 ns(TCS). Alogic“1” at pin
DO indicatesthat theselected memorylocationhas been erased, andthepart isreadyfor another instruction.
VER 1.5
7
ACE93C46.56.66
Three-wire Serial EEPROM
WRITE (WRITE):
The Write (WRITE) instruction contains the 8 or 16 bits of data to be written into the specified memory location. The
self-timed programming cycle, tWP, starts after the last bit of data is received at serial data input pin DI. The DO pin
outputs the Ready/Busy status of the part if CS is brought high after being kept low for a minimum of 250 ns (TCS). A
logic “0” at DO indicates that programming is still in progress. A logic “1” indicates that the memory location at the
specified address has been written with the data pattern contained in the instruction and the part is ready for further
instructions. A Ready/Busy status cannot be obtained if the CS is brought high after the end of the selftimed
programming cycle, TWP.
ERASEALL(ERAL):
The Erase All (ERAL) instruction programs every bit in the memory array to the logic “1” state and is primarily used for
testing purposes. The DO pin outputs the Ready/Busy status of the part if CS is brought high after being kept low for a
minimum of 250 ns(TCS).The ERALinstruction is valid onlyat VCC = 5.0V± 10%.
WRITEALL(WRAL):
The Write All (WRAL) instruction programs all memory locations with the data patterns specified in the instruction.
The DO pin outputsthe Ready/Busy status of the part if CS is brought high after being kept lowfor aminimum of 250ns
(TCS).TheWRALinstruction is valid onlyat VCC = 5.0V± 10%.
ERASE/WRITE DISABLE (EWDS):
To protect against accidental data disturb, the Erase/Write Disable (EWDS) instruction disables all programming
modes and should be executed after all programming operations. The operation of the Read instruction is independent
of boththe EWENand EWDS instructions andcan beexecuted at anytime.
Timing Diagrams
Note: This is the minimum SK period.
Figure 1: Synchronous Data Timing
VER 1.5
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ACE93C46.56.66
Three-wire Serial EEPROM
Organization Key for Timing Diagrams
ACE93C56 (2K)
ACE93C66 (4K)
ACE93C46 (1K)
I/O
*8
A8(1)
D7
*16
A7(2)
D15
*8
*16
A7
*16
A5
*8
A6
D7
A8
D7
AN
DN
D15
D15
Note : 1. A8 is a DON’T CARE value ,but the extra clock is required.
2. A7 is a DON’T CARE value ,but the extra clock is required.
Figure 2: Read Timing
Figure 3: EWEN Timing
Figure 4: EWDS Timing
VER 1.5
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ACE93C46.56.66
Three-wire Serial EEPROM
Figure 5: WRITE Timing
Note: Valid only at VCC=4.5V to 5.5V
Figure 6: WRAL Timing(1)
Figure 7: ERASE Timing
Figure 8: ERAL Timing(1)
Note: Valid only at VCC=4.5V to 5.5V
VER 1.5
10
ACE93C46.56.66
Three-wire Serial EEPROM
Packaging information
DIP-8
Note: Dimensions in Millimeters.
VER 1.5
11
ACE93C46.56.66
Three-wire Serial EEPROM
Packaging information
SOP-8
Note: Dimensions in Millimeters.
VER 1.5
12
ACE93C46.56.66
Three-wire Serial EEPROM
Packaging information
TSSOP-8
Note: Dimensions in Millimeters.
VER 1.5
13
ACE93C46.56.66
Three-wire Serial EEPROM
Notes
ACE does not assume any responsibility for use as critical components in life support devices or systems
without the express written approval of the president and general counsel of ACE Electronics Co., LTD.
As sued herein:
1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant
into the body, or (b) support or sustain life, and shoes failure to perform when properly used in
accordance with instructions for use provided in the labeling, can be reasonably expected to result in
a significant injury to the user.
2. A critical component is any component of a life support device or system whose failure to perform can
be reasonably expected to cause the failure of the life support device or system, or to affect its safety
or effectiveness.
ACE Technology Co., LTD.
http://www.ace-ele.com/
VER 1.5
14
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