AD8005ARTZ-REEL7 [ADI]
270 MHz, 400 mA Current Feedback Amplifier; 270 MHz的400 mA电流反馈放大器
| 型号： | AD8005ARTZ-REEL7 |
| 厂家： | 
ADI |
| 描述： | 270 MHz, 400 mA Current Feedback Amplifier |
| 文件： | 总12页 (文件大小：171K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
270 MHz, 400 A
Current Feedback Amplifier
a
AD8005
FUNCTIONAL BLOCK DIAGRAM
8-Lead Plastic DIP and SOIC
FEATURES
Ultralow Power
400 A Power Supply Current (4 mW on ؎5 VS)
Specified for Single Supply Operation
High Speed
270 MHz, –3 dB Bandwidth (G = +1)
170 MHz, –3 dB Bandwidth (G = +2)
280 V/s Slew Rate (G = +2)
28 ns Settling Time to 0.1%, 2 V Step (G = +2)
Low Distortion/Noise
AD8005
NC
–IN
+IN
1
2
3
4
8
7
6
5
NC
+V
S
OUT
NC
–V
S
NC = NO CONNECT
–63 dBc @ 1 MHz, VO = 2 V p-p
–50 dBc @ 10 MHz, VO = 2 V p-p
4.0 nV/√Hz Input Voltage Noise @ 10 MHz
Good Video Specifications (RL = 1 k⍀, G = +2)
Gain Flatness 0.1 dB to 30 MHz
0.11% Differential Gain Error
0.4؇ Differential Phase Error
5-Lead SOT-23
+V
OUT
1
2
3
5
4
S
–V
S
+IN
–IN
AD8005
APPLICATIONS
Signal Conditioning
A/D Buffer
Power-Sensitive, High-Speed Systems
Battery Powered Equipment
Loop/Remote Power Systems
Communication or Video Test Systems
Portable Medical Instruments
The current feedback design results in gain flatness of 0.1 dB
to 30 MHz while offering differential gain and phase errors of
0.11% and 0.4°. Harmonic distortion is low over a wide
bandwidth with THDs of –63 dBc at 1 MHz and –50 dBc at
10 MHz. Ideal features for a signal conditioning amplifier or
buffer to a high-speed A-to-D converter in portable video,
medical or communication systems.
PRODUCT DESCRIPTION
The AD8005 is an ultralow power, high-speed amplifier with a
wide signal bandwidth of 170 MHz and slew rate of 280 V/µs.
This performance is achieved while consuming only 400 µA of
quiescent supply current. These features increase the operating
time of high-speed battery-powered systems without reducing
dynamic performance.
The AD8005 is characterized for +5 V and ±5 V supplies and
will operate over the industrial temperature range of –40°C to
+85°C. The amplifier is supplied in 8-lead plastic DIP, 8-lead
SOIC and 5-lead SOT-23 packages.
3
–40
2ND
G = +2
G = +2
= 200mV p-p
2
1
0
V
= 2V p-p
V
OUT
OUT
–50
–60
R
= 1k⍀
R
= 1k⍀
L
L
3RD
3RD
–1
–2
V = ±5V
S
–70
2ND
–3
–4
–5
–6
–80
V
= +5V
S
–90
–100
0.1
1
10
FREQUENCY – MHz
100
500
1
10
20
FREQUENCY – MHz
Figure 2. Distortion vs. Frequency; VS = ±5 V
Figure 1. Frequency Response; G = +2, VS = +5 V or ±5 V
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
World Wide Web Site: http://www.analog.com
© Analog Devices, Inc., 1999
AD8005–SPECIFICATIONS
(@ T = +25؇C, V = ؎5 V, R = 1 k⍀ unless otherwise noted)
؎5 V SUPPLIES
A
S
L
AD8005A
Typ
Parameter
Conditions
Min
Max
Units
DYNAMIC PERFORMANCE
–3 dB Small Signal Bandwidth
RF = 3.01 kΩ for “N” Package or
RF = 2.49 kΩ for “R” Package or
RF = 2.10 kΩ for “RT” Package
G = +1, VO = 0.2 V p-p
G = +2, VO = 0.2 V p-p
G = +2, VO = 0.2 V p-p
G = +10, VO = 4 V p-p, RF = 499 Ω
G = +2, VO = 4 V Step
G = –1, VO = 4 V Step, RF = 1.5 kΩ
G = +2, VO = 2 V Step
225
140
10
270
170
30
MHz
MHz
MHz
MHz
V/µs
V/µs
ns
Bandwidth for 0.1 dB Flatness
Large Signal Bandwidth
Slew Rate (Rising Edge)
40
280
1500
28
Settling Time to 0.1%
DISTORTION/NOISE PERFORMANCE
RF = 3.01 kΩ for “N” Package or
RF = 2.49 kΩ for “R” Package or
RF = 2.10 kΩ for “RT” Package
fC = 1 MHz, VO = 2 V p-p, G = +2
fC = 10 MHz, VO = 2 V p-p, G = +2
NTSC, G = +2
Total Harmonic Distortion
–63
–50
0.11
0.4
4.0
1.1
9.1
dBc
dBc
%
Degrees
nV/√Hz
pA/√Hz
pA/√Hz
Differential Gain
Differential Phase
Input Voltage Noise
Input Current Noise
NTSC, G = +2
f = 10 MHz
f = 10 MHz, +IIN
–IIN
DC PERFORMANCE
Input Offset Voltage
5
30
50
±mV
±mV
µV/°C
±µA
TMIN to TMAX
Offset Drift
+Input Bias Current
40
0.5
1
TMIN to TMAX
TMIN to TMAX
2
10
12
±µA
±µA
±µA
–Input Bias Current
5
Input Bias Current Drift (±)
Open-Loop Transimpedance
6
nA/°C
kΩ
400
1000
INPUT CHARACTERISTICS
Input Resistance
+Input
–Input
+Input
90
MΩ
Ω
pF
±V
dB
260
1.6
3.8
54
Input Capacitance
Input Common-Mode Voltage Range
Common-Mode Rejection Ratio
VCM = ±2.5 V
46
OUTPUT CHARACTERISTICS
Output Voltage Swing
Positive
Negative
RL = 50 Ω
+3.7
+3.90
–3.90
10
V
V
mA
mA
–3.7
Output Current
Short Circuit Current
60
POWER SUPPLY
Quiescent Current
400
66
475
560
µA
µA
dB
TMIN to TMAX
VS = ±4 V to ±6 V
Power Supply Rejection Ratio
56
OPERATING TEMPERATURE RANGE
–40
+85
°C
Specifications subject to change without notice.
REV. A
–2–
AD8005
+5 V SUPPLY
(@ TA = +25؇C, VS = +5 V, RL = 1 k⍀ to 2.5 V unless otherwise noted)
AD8005A
Typ
Parameter
Conditions
Min
Max Units
DYNAMIC PERFORMANCE
–3 dB Small Signal Bandwidth
RF = 3.01 kΩ for “N” Package or
RF = 2.49 kΩ for “R” Package or
RF = 2.10 kΩ for “RT” Package
G = +1, VO = 0.2 V p-p
G = +2, VO = 0.2 V p-p
G = +2, VO = 0.2 V p-p
G = +10, VO = 2 V p-p, RF = 499 Ω
G = +2, VO = 2 V Step
G = –1, VO = 2 V Step, RF = 1.5 kΩ
G = +2, VO = 2 V Step
190
110
10
225
130
30
MHz
MHz
MHz
MHz
V/µs
V/µs
ns
Bandwidth for 0.1 dB Flatness
Large Signal Bandwidth
Slew Rate (Rising Edge)
45
260
775
30
Settling Time to 0.1%
DISTORTION/NOISE PERFORMANCE RF = 3.01 kΩ for “N” Package or
RF = 2.49 kΩ for “R” Package or
RF = 2.10 kΩ for “RT” Package
Total Harmonic Distortion
fC = 1 MHz, VO = 2 V p-p, G = +2
fC = 10 MHz, VO = 2 V p-p, G = +2
NTSC, G = +2, RL to 1.5 V
NTSC, G = +2, RL to 1.5 V
f = 10 MHz
–60
–50
0.14
0.70
4.0
dBc
dBc
%
Degrees
nV/√Hz
pA/√Hz
pA/√Hz
Differential Gain
Differential Phase
Input Voltage Noise
Input Current Noise
f = 10 MHz, +IIN
1.1
9.1
–IIN
DC PERFORMANCE
Input Offset Voltage
5
35
50
±mV
±mV
µV/°C
±µA
TMIN to TMAX
Offset Drift
+Input Bias Current
40
0.5
1
TMIN to TMAX
TMIN to TMAX
2
10
11
±µA
±µA
±µA
–Input Bias Current
5
Input Bias Current Drift (±)
Open-Loop Transimpedance
8
500
nA/°C
kΩ
50
48
INPUT CHARACTERISTICS
Input Resistance
+Input
–Input
+Input
120
300
1.6
1.5 to 3.5
54
MΩ
Ω
pF
V
Input Capacitance
Input Common-Mode Voltage Range
Common-Mode Rejection Ratio
VCM = 1.5 V to 3.5 V
dB
OUTPUT CHARACTERISTICS
Output Voltage Swing
Output Current
1.1 to 3.9 0.95 to 4.05
V
mA
mA
RL = 50 Ω
10
30
Short Circuit Current
POWER SUPPLY
Quiescent Current
350
425
475
µA
µA
dB
TMIN to TMAX
VS = +4 V to +6 V
Power Supply Rejection Ratio
56
66
OPERATING TEMPERATURE RANGE
–40
+85
°C
Specifications subject to change without notice.
REV. A
–3–
AD8005
ABSOLUTE MAXIMUM RATINGS1
MAXIMUM POWER DISSIPATION
The maximum power that can be safely dissipated by the
AD8005 is limited by the associated rise in junction tempera-
ture. The maximum safe junction temperature for plastic
encapsulated devices is determined by the glass transition tem-
perature of the plastic, approximately +150°C. Exceeding this
limit temporarily may cause a shift in parametric performance
due to a change in the stresses exerted on the die by the package.
Exceeding a junction temperature of +175°C for an extended
period can result in device failure.
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.6 V
Internal Power Dissipation2
Plastic DIP Package (N) . . . . . . . . . . . . . . . . . . . . 1.3 Watts
Small Outline Package (R) . . . . . . . . . . . . . . . . . . 0.75 Watts
SOT-23-5 Package (RT) . . . . . . . . . . . . . . . . . . . 0.5 Watts
Input Voltage (Common Mode) . . . . . . . . . . . . . . . ±VS ± 1 V
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . ±3.5 V
Output Short Circuit Duration
. . . . . . . . . . . . . . . . . . . . . . . Observe Power Derating Curves
Storage Temperature Range
N, R & RT Package . . . . . . . . . . . . . . . . . –65°C to +125°C
Operating Temperature Range (A Grade) . . . –40°C to +85°C
Lead Temperature Range (Soldering 10 sec) . . . . . . . . +300°C
While the AD8005 is internally short circuit protected, this may
not be sufficient to guarantee that the maximum junction tem-
perature (+150°C) is not exceeded under all conditions. To
ensure proper operation, it is necessary to observe the maximum
power derating curves shown in Figure 3.
NOTES
1Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2Specification is for device in free air:
2.0
T
= +150°C
J
8-LEAD PLASTIC-DIP PACKAGE
8-Lead Plastic DIP Package: θJA = 90°C/W
8-Lead SOIC Package: θJA = 155°C/W
5-Lead SOT-23 Package: θJA = 240°C/W
1.5
1.0
0.5
0
8-LEAD SOIC PACKAGE
5-LEAD SOT-23 PACKAGE
–50 –40 –30 –20 –10
0
10 20 30 40 50 60 70 80 90
AMBIENT TEMPERATURE – °C
Figure 3. Maximum Power Dissipation vs. Temperature
ORDERING GUIDE
Temperature
Range
Package
Description
Package
Option
Brand
Code
Model
AD8005AN
AD8005AR
AD8005AR-REEL
AD8005ART-REEL
AD8005AR-REEL7
AD8005ART-REEL7
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
8-Lead Plastic DIP
8-Lead Plastic SOIC
13" Tape and Reel
13" Tape and Reel
7" Tape and Reel
7" Tape and Reel
N-8
SO-8
SO-8
RT-5
SO-8
RT-5
H1A
H1A
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD8005 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
REV. A
–4–
Typical Characteristics–AD8005
5
5
V
V
R
= ؎5V
S
4
4
3
G = +1
V
V
= ؎5V
= 200mV p-p
S
OUT
3
= 200mV p-p
= 1k⍀
OUT
L
R
= 1k⍀
L
2
1
2
1
0
0
–1
–2
G = –1
= 1.5k⍀
G = +2
–1
–2
R
F
G = +10
= 499⍀
R
G = –10
= 1k⍀
F
–3
–4
–5
–3
–4
–5
R
F
1
10
FREQUENCY – MHz
100
500
1
10
FREQUENCY – MHz
100
500
Figure 4. Frequency Response; G = +1, +2, +10; VS = ±5 V
Figure 7. Frequency Response; G = –1, –10; VS = ±5 V
140
120
100
80
0
6.2
6.1
6.0
–40
PHASE
GAIN
–80
5.9
5.8
–120
–160
–200
–240
–280
G = +2
5.7
V
= 200mV p-p
OUT
60
R
= 1k⍀
L
5.6
5.5
40
5.4
5.3
20
0
1k
5.2
0.1
10k
100k
1M
10M
100M
1G
1
10
100
500
FREQUENCY – Hz
FREQUENCY – MHz
Figure 5. Gain Flatness; G = +2; VS = ±5 V or +5 V
Figure 8. Transimpedance Gain and Phase vs. Frequency
7
10
9
6
5
8
7
6
V
= ؎5V
S
4
3
2
V
= 2V p-p
OUT
V
V
= ؎5V
S
V
= +5V
S
= 4V p-p
OUT
5
4
3
G = +2
= 1k⍀
R
L
1
0
2
1
0
–1
–2
1
10
FREQUENCY – MHz
100
500
0.5
1
10
100
FREQUENCY – MHz
Figure 6. Large Signal Frequency Response;
Figure 9. Output Swing vs. Frequency; VS = ±5 V
G = +2, RL = 1 kΩ
REV. A
–5–
AD8005–Typical Characteristics
–40
–40
–50
–60
2ND
2ND
G = +2
= 2V p-p
G = +2
= 2V p-p
V
V
–50
–60
OUT
OUT
R
= 1k⍀
R
= 1k⍀
L
L
3RD
3RD
3RD
3RD
–70
–70
–80
2ND
2ND
–80
–90
–90
–100
–100
1
10
20
1
10
20
FREQUENCY – MHz
FREQUENCY – MHz
Figure 10. Distortion vs. Frequency; VS = ±5 V
Figure 13. Distortion vs. Frequency VS = +5 V
MIN = –0.06 MAX = 0.03 p-p/MAX = 0.09
0.10
MIN = –0.08 MAX = 0.04 p-p/MAX = 0.12
0.10
V
= ±5V
S
V
= +5V
S
R
= 1k⍀
0.05
0.00
L
0.05
0.00
R
= 1k⍀ TO +1.5V
L
G = +2
G = +2
–0.05
–0.05
–0.10
–0.10
1.0
MIN = –0.01 MAX = 0.39 p-p = 0.40
MIN = 0.00 MAX = 0.70 p-p = 0.70
0.06
0.04
0.5
0.02
0.00
0.0
–0.5
–1.0
V
R
= ±5V
= 1k⍀
V
= +5V
S
S
–0.02
–0.04
R
= 1k⍀ TO +1.5V
L
L
G = +2
G = +2
–0.06
1st 2nd 3rd 4th 5th 6th 7th 8th 9th 10th 11th
MODULATING RAMP LEVEL – IRE
1st 2nd 3rd 4th 5th 6th 7th 8th 9th 10th 11th
MODULATING RAMP LEVEL – IRE
Figure 11. Differential Gain and Phase, VS = ±5 V
Figure 14. Differential Gain and Phase, VS = +5 V
9
8
7
9
8
f = 5MHz
G = +2
= 1k⍀
7
V
= ؎5V
S
R
L
6
5
4
3
2
1
0
6
5
4
3
2
1
0
V
= +5V
S
3
4
5
6
7
8
9
10
11
10
100
1k
10k
LOAD RESISTANCE – ⍀
TOTAL SUPPLY VOLTAGE – Volts
Figure 12. Output Voltage Swing vs. Load
Figure 15. Output Swing vs. Supply
REV. A
–6–
AD8005
–5
–10
–15
–20
–25
–30
–35
–40
12.5
10.0
7.5
5.0
2.5
0
V
= +5V OR ؎5V
S
G = +2
= 1k⍀
R
L
–45
–50
–55
0.03
0.1
1
10
100
10
100
1k
10k
100k
1M
10M
FREQUENCY – MHz
FREQUENCY – Hz
Figure 16. CMRR vs. Frequency; VS = +5 V or ±5 V
Figure 19. Noise vs. Frequency; VS = +5 V or ±5 V
62.5
50.0
37.5
25.0
V
= +5V AND ؎5V
= 1k⍀
S
R
L
100
G = +2
10
V
= +5V
S
V
= ؎5V
S
12.5
INVERTING CURRENT
NONINVERTING CURRENT
0
1
0.03
0.1
1
10
100
500
10
100
1k
10k
100k
1M
10M
FREQUENCY – MHz
FREQUENCY – Hz
Figure 17. Output Resistance vs. Frequency;
Figure 20. Noise vs. Frequency; VS = +5 V or ±5 V
VS = ±5 V and +5 V
10
V
= +5V OR ؎5V
0
–10
–20
–30
–40
S
–PSRR
G = +2
V
100
R
= 1k⍀
OUT
L
90
+PSRR
V
IN
V
= ؎5V
S
G = +6
= 1k⍀
R
L
–50
–60
–70
10
0%
150ns
1V
2V
–80
0.03
0.1
1
10
100
500
FREQUENCY – MHz
Figure 18. PSRR vs. Frequency; VS = +5 V or ±5 V
Figure 21. ±Overdrive Recovery, VS = ±5 V, VIN = 2 V Step
REV. A
–7–
AD8005–Typical Characteristics
R
R
F
G
1.5k⍀
1.5k⍀
51.1⍀
V
OUT
V
OUT
V
IN
R
1k⍀
L
R
L
C
C
PROBE
PROBE
1k⍀
V
IN
+V
S
+V
S
50⍀
0.01F
0.01F
10F
10F
0.01F
0.01F
10F
10F
–V
S
–V
S
PROBE : TEK P6137
= 10pF NOMINAL
PROBE : TEK P6137
= 10pF NOMINAL
C
LOAD
C
LOAD
Figure 22. Test Circuit; G = +2; RF = RG = 3.01 kΩ for
N Package; RF = RG = 2.49 kΩ for R and RT Packages
Figure 25. Test Circuit; G = –1, RF = RG = 1.5 kΩ for
N, R and RT Packages
100
90
100
90
10
10
0%
0%
50mV
10ns
50mV
10ns
Figure 23. 200 mV Step Response; G = +2, VS = ±2.5 V
or ±5 V
Figure 26. 200 mV Step Response; G = –1, VS = ±2.5 V
or ±5 V
100
90
100
90
10
10
0%
0%
1V
10ns
1V
10ns
Figure 24. Step Response; G = +2, VS = ±5 V
Figure 27. Step Response; G = –1, VS = ±5 V
REV. A
–8–
AD8005
Single-Supply Level Shifter
APPLICATIONS
In addition to providing buffering, many systems require that an
op amp provide level shifting. A common example is the level
shifting that is required to move a bipolar signal into the unipo-
lar range of many modern analog-to-digital converters (ADCs). In
general, single supply ADCs have input ranges that are refer-
enced neither to ground nor supply. Instead the reference level
is some point in between, usually halfway between ground and
supply (+2.5 V for a single supply 5 V ADC). Because high-
speed ADCs typically have input voltage ranges of 1 V to 2 V,
the op amp driving it must be single supply but not necessarily
rail-to-rail.
Driving Capacitive Loads
Capacitive loads interact with an op amp’s output impedance
to create an extra delay in the feedback path. This reduces
circuit stability, and can cause unwanted ringing and oscilla-
tion. A given value of capacitance causes much less ringing
when the amplifier is used with a higher noise gain.
The capacitive load drive of the AD8005 can be increased by
adding a low valued resistor in series with the capacitive load.
Introducing a series resistor tends to isolate the capacitive load
from the feedback loop thereby diminishing its influence. Fig-
ure 29 shows the effects of a series resistor on capacitive drive
for varying voltage gains. As the closed-loop gain is increased,
the larger phase margin allows for larger capacitive loads with
less overshoot. Adding a series resistor at lower closed-loop
gains accomplishes the same effect. For large capacitive loads,
the frequency response of the amplifier will be dominated by
the roll-off of the series resistor and capacitive load.
R2
1.5k⍀
+5V
R1
1.5k⍀
0.01F
10F
V
IN
AD8005
V
OUT
V
R
F
REF
+5V
R3
30.1k⍀
R4
10k⍀
R
S
R
G
AD8005
0.1F
R
1k⍀
L
C
L
Figure 30. Bipolar to Unipolar Level Shifter
Figure 30 shows a level shifter circuit that can move a bipolar
signal into a unipolar range. A positive reference voltage, derived
from the +5 V supply, sets a bias level of +1.25 V at the nonin-
verting terminal of the op amp. In ac applications, the accuracy of
this voltage level is not important. Noise is however a serious
consideration. A 0.1 µF capacitor provides useful decoupling of
this noise.
Figure 28. Driving Capacitive Loads
80
V
= ؎5V
S
2V OUTPUT STEP
WITH 30% OVERSHOOT
70
60
50
40
30
20
10
0
R
= 10⍀
S
The bias level on the noninverting terminal sets the input common-
mode voltage to +1.25 V. Because the output will always be
positive, the op amp may therefore be powered with a single
+5 V power supply.
R
= 5⍀
S
R
= 0⍀
S
The overall gain function is given by the equation:
R2
R1
R4
R3+ R4
R2
R1
VOUT = –
VIN
+
1+
VREF
1
2
3
4
5
CLOSED-LOOP GAIN – V/V
In the above example, the equation simplifies to
Figure 29. Capacitive Load Drive vs. Closed-Loop Gain
VOUT = –VIN +2.5V
REV. A
–9–
AD8005
Single-Ended-to-Differential Conversion
R
R
O
R
G
F
V
V
IN
OUT
Many single supply ADCs have differential inputs. In such cases,
the ideal common-mode operating point is usually halfway
between supply and ground. Figure 31 shows how to convert a
single-ended bipolar signal into a differential signal with a
common-mode level of 2.5 V.
R
T
+V
S
C3
10F
C1
0.01F
C4
10F
C2
0.01F
+5V
–V
S
+5V
INVERTING CONFIGURATION
2.49k⍀
0.1F
R
1k⍀
IN
0.1F
R
G
R
R
O
BIPOLAR
SIGNAL
؎0.5V
F
V
OUT
AD8005
2.49k⍀
R
F1
V
IN
2.49k⍀
+V
S
S
C3
10F
C1
0.01F
R
T
R
619⍀
R
G
F2
V
OUT
3.09k⍀
C4
10F
C2
0.01F
+5V
–V
0.1F
NONINVERTING CONFIGURATION
+5V
AD8005
2.49k⍀
Figure 32. Inverting and Noninverting Configurations
Chip capacitors have low parasitic resistance and inductance
and are suitable for supply bypassing (see Figure 32). Make sure
that one end of the capacitor is within 1/8 inch of each power
pin with the other end connected to the ground plane. An
additional large (0.47 µF–10 µF) tantalum electrolytic capacitor
should also be connected in parallel. This capacitor supplies
current for fast, large signal changes at the output. It must not
necessarily be as close to the power pin as the smaller capacitor.
2.49k⍀
0.1F
Figure 31. Single-Ended-to-Differential Converter
Amp 1 has its +input driven with the ac-coupled input signal
while the +input of Amp 2 is connected to a bias level of +2.5 V.
Thus the –input of Amp 2 is driven to virtual +2.5 V by its
output. Therefore, Amp 1 is configured for a noninverting gain
of five, (1 + RF1/RG), because RG is connected to the virtual
+2.5 V of Amp 2’s –input.
Locate the feedback resistor close to the inverting input pin in
order to keep the stray capacitance at this node to a minimum.
Capacitance variations of less than 1.5 pF at the inverting input
will significantly affect high-speed performance.
When the +input of Amp 1 is driven with a signal, the same
signal appears at the –input of Amp 1. This signal serves as an
input to Amp 2 configured for a gain of –5, (–RF2/RG). Thus the
two outputs move in opposite directions with the same gain and
create a balanced differential signal.
Use stripline design techniques for long signal traces (i.e., greater
than about 1 inch). Striplines should have a characteristic
impedance of either 50 Ω or 75 Ω. For the Stripline to be
effective, correct termination at both ends of the line is necessary.
This circuit can be simplified to create a bipolar in/bipolar out
single-ended to differential converter. Obviously, a single supply
is no longer adequate and the –VS pins must now be powered
with –5 V. The +input to Amp 2 is tied to ground. The ac
coupling on the +input of Amp 1 is removed and the signal can
be fed directly into Amp 1.
Table I. Typical Bandwidth vs. Gain Setting Resistors
Small Signal –3 dB
BW (MHz),
Gain
RF
RG
RT
VS = ؎5 V
Layout Considerations
–1
–10
+1
+2
+10
1.49 kΩ
1 kΩ
2.49 kΩ
2.49 kΩ
499 Ω
1.49 kΩ
100 Ω
ؕ
2.49 kΩ
56.2 Ω
52.3
120 MHz
60 MHz
270 MHz
170 MHz
40 MHz
In order to achieve the specified high-speed performance of the
AD8005 you must be attentive to board layout and component
selection. Proper RF design techniques and selection of compo-
nents with low parasitics are necessary.
100 Ω
49.9 Ω
49.9 Ω
49.9 Ω
The PCB should have a ground plane that covers all unused
portions of the component side of the board. This will provide a
low impedance path for signals flowing to ground. The ground
plane should be removed from the area under and around the
chip (leave about 2 mm between the pin contacts and the
ground plane). This helps to reduce stray capacitance. If both
signal tracks and the ground plane are on the same side of the
PCB, also leave a 2 mm gap between ground plane and track.
REV. A
–10–
AD8005
In power-critical applications where some bandwidth can be
sacrificed, increasing the size of the feedback resistor will yield
significant power savings. A good example of this is the gain of
+10 case. Operating from a bipolar supply (±5 V), the quiescent
current is 475 µA (excluding the feedback network). The recom-
mended feedback and gain resistors are 499 Ω and 56.2 Ω
respectively. In order to drive an rms output voltage of 2 V, the
output must deliver a current of 3.6 mA to the feedback net-
work. Increasing the size of the resistor network by a factor of
10 as shown in Figure 33 will reduce this current to 360 µA.
The closed loop bandwidth will however decrease to 20 MHz.
Increasing Feedback Resistors
Unlike conventional voltage feedback op amps, the choice of feed-
back resistor has a direct impact on the closed-loop bandwidth
and stability of a current feedback op amp circuit. Reducing the
resistance below the recommended value makes the amplifier
more unstable. Increasing the size of the feedback resistor
reduces the closed-loop bandwidth.
360A (rms)
4.99k⍀
562⍀
+5V
AD8005
–5V
V
OUT
2V (rms)
V
IN
QUIESCENT CURRENT
475A (MAX)
0.2V (rms)
Figure 33. Saving Power by Increasing Feedback Resistor
Network
REV. A
–11–
AD8005
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
8-Lead Plastic DIP
(N-8)
0.430 (10.92)
0.348 (8.84)
8
5
4
0.280 (7.11)
0.240 (6.10)
1
0.325 (8.25)
0.300 (7.62)
0.060 (1.52)
0.015 (0.38)
PIN 1
0.195 (4.95)
0.115 (2.93)
0.210 (5.33)
MAX
0.130
(3.30)
MIN
0.160 (4.06)
0.115 (2.93)
0.015 (0.381)
0.008 (0.204)
SEATING
PLANE
0.100
(2.54)
BSC
0.022 (0.558)
0.014 (0.356)
0.070 (1.77)
0.045 (1.15)
8-Lead Plastic SOIC
(SO-8)
0.1968 (5.00)
0.1890 (4.80)
8
1
5
4
0.1574 (4.00)
0.1497 (3.80)
0.2440 (6.20)
0.2284 (5.80)
PIN 1
0.0688 (1.75)
0.0532 (1.35)
0.0196 (0.50)
x 45°
0.0098 (0.25)
0.0040 (0.10)
0.0099 (0.25)
8°
0°
0.0500
(1.27)
BSC
0.0192 (0.49)
0.0138 (0.35)
SEATING
PLANE
0.0098 (0.25)
0.0075 (0.19)
0.0500 (1.27)
0.0160 (0.41)
5-Lead Plastic SOT-23
(RT-5)
0.1181 (3.00)
0.1102 (2.80)
3
4
2
1
5
0.1181 (3.00)
0.1024 (2.60)
0.0669 (1.70)
0.0590 (1.50)
0.0374 (0.95) BSC
0.0748 (1.90)
BSC
0.0079 (0.20)
0.0031 (0.08)
0.0512 (1.30)
0.0354 (0.90)
0.0571 (1.45)
0.0374 (0.95)
10°
0°
SEATING
PLANE
0.0197 (0.50)
0.0138 (0.35)
0.0059 (0.15)
0.0019 (0.05)
0.0217 (0.55)
0.0138 (0.35)
–12–
REV. A
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