AD8619WARZ-RL [ADI]
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| 型号： | AD8619WARZ-RL |
| 厂家： | 
ADI |
| 描述： | 暂无描述 运算放大器 |
| 文件： | 总16页 (文件大小：333K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Low Cost Micropower, Low Noise CMOS Rail-to-
Rail, Input/Output Operational Amplifiers
AD8613/AD8617/AD8619
FEATURES
PIN CONFIGURATIONS
Offset voltage: 2.2 mV max
Low input bias current: 1 pA max
Single-supply operation: 1.8 V to 5 V
Low noise: 22 nV/√Hz
1
2
3
5
OUT
V–
V+
AD8613
TOP VIEW
(Not to Scale)
4
+IN
–IN
Figure 1. 5-Lead SC70 and 5-Lead TSOT-23
Micropower: 38 μA
No phase reversal
Unity gain stable
8
7
6
5
OUT A
–IN A
+IN A
V–
1
2
3
4
V+
AD8617
TOP VIEW
(Not to Scale)
OUT B
–IN B
+IN B
APPLICATIONS
Battery-powered instrumentation
Multipole filters
Figure 2. 8-Lead MSOP
Current shunt sense
Sensors
ADC predrivers
DAC drivers/level shifters
Low power ASIC input or output amplifiers
1
2
3
4
8
7
6
5
OUT A
–IN A
+IN A
V–
V+
AD8617
OUT B
–IN B
+IN B
TOP VIEW
(Not to Scale)
Figure 3. 8-Lead SOIC_N
GENERAL DESCRIPTION
1
2
3
4
5
6
7
OUT A
–IN A
+IN A
V+
14
13
12
11
OUT D
–IN D
+IN D
V–
The AD8613/AD8617/AD8619 are single, dual, and quad
micropower, rail-to-rail input and output amplifiers that feature
low supply current, low input voltage, and low current noise.
AD8619
TOP VIEW
(Not to Scale)
+IN B
–IN B
OUT B
10 +IN C
9
8
–IN C
The parts are fully specified to operate from 1.8 V to 5.0 V
single supply, or 0.9 V and 2.5 V dual supply. The combination
of low noise, very low input bias currents, and low power
consumption make the AD8613/AD8617/AD8619 especially
useful in portable and loop-powered instrumentation.
OUT C
Figure 4. 14-Lead TSSOP
OUT A
–IN A
+IN A
V+
1
2
3
4
5
6
7
14 OUT D
The ability to swing rail-to-rail at both the input and output
enables designers to buffer CMOS ADCs, DACs, ASICs, and
other wide output swing devices in low power, single-supply
systems.
13 –IN D
12 +IN D
11 V–
AD8619
TOP VIEW
(Not to Scale)
+IN B
–IN B
OUT B
10 +IN C
9
8
–IN C
OUT C
The AD8613 is available in a 5-lead SC70 package and a 5-lead
TSOT-23 package. The AD8617 is available in 8-lead MSOP
and 8-lead SOIC packages. The AD8619 is available in 14-lead
TSSOP and 14-lead SOIC packages.
Figure 5. 14-Lead SOIC_N
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
www.analog.com
©2006 Analog Devices, Inc. All rights reserved.
AD8613/AD8617/AD8619
TABLE OF CONTENTS
Features .............................................................................................. 1
Thermal Resistance.......................................................................5
ESD Caution...................................................................................5
Typical Performance Characteristics ..............................................6
Outline Dimensions....................................................................... 12
Ordering Guide .......................................................................... 13
Applications....................................................................................... 1
General Description......................................................................... 1
Pin Configurations ........................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 5
REVISION HISTORY
1/06—Rev. A to Rev. B
10/05—Rev. 0 to Rev. A
Added AD8613 ...................................................................Universal
Changes to Features.......................................................................... 1
Changes to Table 1............................................................................ 3
Changes to Table 2............................................................................ 4
Updated Outline Dimensions....................................................... 12
Changes to Ordering Guide .......................................................... 13
Added AD8619 ...................................................................Universal
Change to Specifications Section ....................................................3
Updated Outline Dimensions....................................................... 12
Changes to Ordering Guide.......................................................... 13
9/05—Revision 0: Initial Version
Rev. B | Page 2 of 16
AD8613/AD8617/AD8619
SPECIFICATIONS
Electrical characteristics @ VS = 5 V, VCM = VS/2, TA = 25°C, unless otherwise noted.
Table 1.
Parameter
Symbol
VOS
Conditions
Min
Typ
Max
Unit
INPUT CHARACTERISTICS
Offset Voltage
−0.3 V < VCM < +5.3 V
−40°C < TA < +125°C, −0.3 V < VCM < +5.2 V
−40°C < TA < +125°C
0.4
2.2
2.2
4.5
7.0
1
mV
mV
μV/°C
μV/°C
pA
Offset Voltage Drift
AD8613
Input Bias Current
∆VOS/∆T
IB
1
2.5
0.2
−40°C < TA < +85°C
−40°C < TA < +125°C
110
780
0.5
50
pA
pA
pA
pA
pA
dB
Input Offset Current
IOS
0.1
95
−40°C < TA < +85°C
−40°C < TA < +125°C
0 V < VCM < 5 V
250
Common-Mode Rejection Ratio
CMRR
−40°C < TA < +125°C
RL = 10 kΩ, 0.5 V < VO < 4.5 V
68
235
dB
V/mV
pF
Large Signal Voltage Gain
Input Capacitance
AVO
CDIFF
CCM
500
1.9
2.5
pF
OUTPUT CHARACTERISTICS
Output Voltage High
VOH
IL = 1 mA
−40°C to +125°C
IL = 10 mA
4.95
4.9
4.98
4.7
V
V
V
−40°C to +125°C
IL = 1 mA
−40°C to +125°C
IL = 10 mA
4.50
V
Output Voltage Low
VOL
20
30
50
275
335
mV
mV
mV
mV
mA
Ω
190
−40°C to +125°C
Short-Circuit Current
Closed-Loop Output Impedance
POWER SUPPLY
ISC
ZOUT
80
15
f = 10 kHz, AV = 1
Power Supply Rejection Ratio
PSRR
ISY
1.8 V < VS < 5 V
−40°C < TA < +125°C
VO = VS/2
67
64
94
38
dB
dB
μA
μA
Supply Current/Amplifier
−40°C <TA < +125°C
50
DYNAMIC PERFORMANCE
Slew Rate
Settling Time 0.1%
Gain Bandwidth Product
SR
tS
GBP
RL = 10 kΩ
G = 1, 2 V step, CL = 20 pF, RL = 1 kΩ
RL = 100 kΩ
RL = 10 kΩ
RL = 10 kΩ, RL = 100 kΩ, CL = 20 pF
0.1
23
400
350
70
V/μs
ꢀs
kHz
kHz
Degrees
Phase Margin
ØO
NOISE PERFORMANCE
Peak-to-Peak Noise
Voltage Noise Density
2.3
25
22
3.5
μV
en
in
f = 1 kHz
f = 10 kHz
f = 1 kHz
nV/√Hz
nV/√Hz
pA/√Hz
Current Noise Density
0.05
Rev. B | Page 3 of 16
AD8613/AD8617/AD8619
Electrical characteristics @ VS = 1.8 V, VCM = VS/2, TA = 25°C, unless otherwise noted.
Table 2.
Parameter
Symbol
VOS
Conditions
Min
Typ
Max
Unit
INPUT CHARACTERISTICS
Offset Voltage
−0.3 V < VCM < +1.9 V
−0.3 V < VCM < +1.8 V; −40°C < TA < +125°C
−40°C < TA < +125°C
0.4
2.2
2.2
8.5
9.0
1
mV
mV
μV/°C
μV/°C
pA
Offset Voltage Drift
AD8613
Input Bias Current
∆VOS/∆T
IB
1
3.7
0.2
−40°C < TA < +85°C
−40°C < TA < +125°C
110
780
0.5
50
pA
pA
pA
pA
pA
dB
dB
V/mV
pF
Input Offset Current
IOS
0.1
86
−40°C < TA < +85°C
−40°C < TA < +125°C
0 V < VCM < 1.8 V
−40°C < TA < +125°C
RL = 10 kΩ, 0.5 V < VO < 1.3 V
250
Common-Mode Rejection Ratio
CMRR
58
55
85
Large Signal Voltage Gain
Input Capacitance
AVO
CDIFF
CCM
1000
2.1
3.8
pF
OUTPUT CHARACTERISTICS
Output Voltage High
VOH
VOL
IL = 1 mA
−40°C to +125°C
1.65
1.6
1.73
44
V
V
Output Voltage Low
IL = 1 mA
−40°C to +125°C
60
80
mV
mV
mA
Ω
Short-Circuit Current
Closed-Loop Output Impedance
POWER SUPPLY
ISC
ZOUT
7
15
f = 10 kHz, AV = 1
Power Supply Rejection Ratio
Supply Current/Amplifier
PSRR
ISY
1.8 V < VS < 5 V
VO = VS/2
−40°C <TA < +125°C
67
94
38
dB
μA
μA
50
DYNAMIC PERFORMANCE
Slew Rate
Settling Time 0.1%
Gain Bandwidth Product
SR
tS
GBP
RL = 10 kΩ
G = 1, 1 V step, CL = 20 pF, RL = 1 kΩ
RL = 100 kΩ
RL = 10 kΩ
RL = 10 kΩ, RL = 100 kΩ, CL = 20 pF
0.1
6.5
400
350
70
V/μs
μs
kHz
kHz
Degrees
Phase Margin
ØO
NOISE PERFORMANCE
Peak-to-Peak Noise
Voltage Noise Density
2.3
25
22
3.5
μV
en
in
f = 1 kHz
f = 10 kHz
f = 1 kHz
nV/√Hz
nV/√Hz
pA/√Hz
Current Noise Density
0.05
Rev. B | Page 4 of 16
AD8613/AD8617/AD8619
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 3.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Parameter
Rating
Supply Voltage
Input Voltage
Differential Input Voltage
6 V
VSS − 0.3 V to VDD + 0.3 V
6 V
Output Short-Circuit Duration to GND Observe derating curve
Storage Temperature Range
−65°C to +150°C
300°C
−40°C to +125°C
−65°C to +150°C
Lead Temperature (Soldering, 60 sec)
Operating Temperature Range
Junction Temperature Range
Absolute maximum ratings apply at 25°C, unless otherwise
noted.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 4. Thermal Characteristics
Package Type
θJA
θJC
61
126
45
43
36
35
Unit
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
5-Lead TSOT-23 (UJ-5)
5-Lead SC70 (KS-5)
8-Lead MSOP (RM-8)
8-Lead SOIC_N (R-8)
14-Lead SOIC_N (R-14)
14-Lead TSSOP (RU-14)
207
376
210
158
120
180
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. B | Page 5 of 16
AD8613/AD8617/AD8619
TYPICAL PERFORMANCE CHARACTERISTICS
VSY = 5 V or 2.5 V, unless otherwise noted.
1800
400
350
300
250
200
150
100
50
V
= 5.5V
SY
V
= 5V AND 1.8V
SY
–0.5V < V
< +5.5V
CM
= 25°C
1600
1400
1200
1000
800
600
400
200
0
T
A
0
25
50
75
100
125
150
TEMPERATURE (°C)
INPUT OFFSET VOLTAGE (μV)
Figure 9. Input Bias Current vs. Temperature
Figure 6. Input Offset Voltage Distribution
40
35
30
25
20
15
10
5
50
40
30
20
10
0
–40°C < T < 125°C
A
T
= 25°C
A
V
= 2.5V
CM
0
0
1
2
3
4
5
6
7
8
9
10
0
1
2
3
4
5
TCV (μV/°C)
OS
SUPPLY VOLTAGE (V)
Figure 7. Input Offset Voltage Drift Distribution
Figure 10. Supply Current vs. Supply Voltage
2000
1500
1000
500
50
40
30
20
10
0
V
= 5V
= 25°C
V
= ±2.5V, ±1.35V, ±0.9V
SY
SY
T
A
0
–500
–1000
–1500
–2000
–0.5
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
INPUT COMMON-MODE VOLTAGE (V)
–40
–10
20
50
80
110
TEMPERATURE (°C)
Figure 8. Input Offset Voltage vs. Input Common-Mode Voltage
Figure 11. Supply Current vs. Temperature
Rev. B | Page 6 of 16
AD8613/AD8617/AD8619
135
60
50
1k
100
10
V
A
= 5V
SY
T
= 25ºC
V
– V
OH
SY
90
45
40
SOURCE
30
20
φ
M
1
10
SINK
0
0
V
OL
0.1
0.01
V
R
C
= ±2.5V AND ±0.9V
= 100kΩ
= 20pF
SY
–10
–20
L
L
–45
1M
1k
10k
100k
0.001
0.01
0.1
LOAD CURRENT (mA)
1
10
FREQUENCY (Hz)
Figure 12. Output Saturation Voltage vs. Load Current
Figure 15. Open-Loop Gain and Phase vs. Frequency
40
30
20
10
0
120
100
80
60
40
20
0
V
= 5V AND 2.7V
= 25°C
V
= 5V
SY
SY
T
A
V
– V
@ 1mA
SY
OH
V
@ 1mA
OL
100
1k
10k
100k
1M
–40 –25 –10
5
20
35
50
65
80
95 110 125
FREQUENCY (Hz)
TEMPERATURE (°C)
Figure 13. Output Saturation Voltage vs. Temperature
(IL = 1 mA)
Figure 16. CMRR vs. Frequency
350
300
250
200
150
100
50
120
100
80
60
40
20
0
V
= 5V
SY
V
= ±2.5V AND ±1.35V
SY
= 25°C
T
A
V
– V
@ 10mA
OH
DD
V
@ 10mA
OL
0
–40 –25 –10
5
20
35
50
65
80
95 110 125
100
1k
10k
100k
1M
TEMPERATURE (°C)
FREQUENCY (Hz)
Figure 14. Output Saturation Voltage vs. Temperature
(IL = 10 mA)
Figure 17. PSRR vs. Frequency
Rev. B | Page 7 of 16
AD8613/AD8617/AD8619
1k
V
= 5V
SY
A
R
C
= 1
= 10kΩ
= 200pF
V
L
L
A
= 100
V
100
10
1
A
= 10
V
A
= 1
V
V
= 5V AND 1.8V
SY
0
100
TIME (20μs/DIV)
1k
10k
FREQUENCY (Hz)
100k
1M
Figure 21. Large Signal Transient Response
Figure 18. Closed-Loop Output Impedance vs. Frequency
50
45
40
35
30
25
20
15
10
5
V
= 5V
SY
= 25°C
0
T
A
V
A
= ±2.5V
= –50
SY
V
–2.5
100
0
–OS
+OS
0
10
TIME (20μs/DIV)
100
LOAD CAPACITANCE (pF)
1000
Figure 22. Positive Overload Recovery
Figure 19. Small Signal Overshoot vs. Load Capacitance
V
A
= ±2.5V
= –50
V
= 5V, 2.7V, 1.8V
= 1
= 10kΩ
= 200pF
SY
SY
2.5
A
R
C
V
V
L
L
0
0
–100
TIME (20μs/DIV)
TIME (4μs/DIV)
Figure 20. Small Signal Transient Response
Figure 23. Negative Overload Recovery
Rev. B | Page 8 of 16
AD8613/AD8617/AD8619
1000
100
10
V
V
= 5V
= 25ºC
IN
SY
T
A
V
OUT
1/F CORNER @ 100Hz
V
= ±2.5V
SY
A
R
= 1
= 10kΩ
= 6V p-p
V
L
V
IN
1
TIME (20μs/DIV)
1
10
100
1000
10000
FREQUENCY (Hz)
Figure 24. No Phase Reversal
Figure 26. Voltage Noise Density
140
120
100
80
V
= 5V AND 2.7V
SY
V
= 5V
SY
60
40
20
0
100
TIME (1s/DIV)
1k
10k
100k
1M
FREQUENCY (Hz)
Figure 25. 0.1 Hz to 10 Hz Input Voltage Noise
Figure 27. Channel Separation
Rev. B | Page 9 of 16
AD8613/AD8617/AD8619
VS = 1.8 V or 0.9 V, unless otherwise noted.
450
80
60
40
20
0
V
= 1.8V
V
= 1.8V
SY
SY
0V < V
< 1.8V
CM
400
350
300
250
200
150
100
50
T
= 25°C
A
V
–V
@ 1mA
SY OH
V
@ 1mA
OH
80
0
–40 –25 –10
5
20
35
50
65
95 110 125
TEMPERATURE (°C)
INPUT OFFSET VOLTAGE (μV)
Figure 31. Output Saturation Voltage vs. Temperature
(IL = 1 mA)
Figure 28. Input Offset Voltage Distribution
2000
1500
1000
500
100
80
60
40
20
0
V
T
= 1.8V
= 25°C
V
T
= 1.8V
= 25°C
SY
SY
A
A
0
–500
–1000
–1500
–2000
–0.5 –0.2
0.1
0.4
0.7
1.0
1.3
1.6
1.9
2.2
100
1k
10k
100k
1M
INPUT COMMON-MODE VOLTAGE (V)
FREQUENCY (Hz)
Figure 32. CMRR vs. Frequency
Figure 29. Input Offset Voltage vs. Input Common-Mode Voltage
1000
120
100
80
60
40
20
0
V
T
= 1.8V
= 25ºC
V
T
= 1.8V
= 25°C
SY
SY
A
A
100
10
V
–V
SY OH
SOURCE
1
SINK
V
OL
0.1
0.01
0.001
0.01
0.1
LOAD CURRENT (mA)
1
10
100
1k
1M
10k
FREQUENCY (Hz)
Figure 30. Output Saturation Voltage vs. Load Current
Figure 33. PSRR vs. Frequency
Rev. B | Page 10 of 16
AD8613/AD8617/AD8619
40
30
20
10
0
V
= 1.8V
SY
V
= 1.8V
= 25°C
SY
T
A
–OS
+OS
TIME (1s/DIV)
10
100
LOAD CAPACITANCE (pF)
1k
Figure 34. Small Signal Overshoot vs. Load Capacitance
Figure 36. 0.1 Hz to 10 Hz Input Voltage Noise
1k
100
10
V
= 1.8V
= 1
= 10kΩ
= 200pF
SY
V
= 1.8V
= 25°C
SY
A
R
C
V
L
L
T
A
1/F CORNER @ 100Hz
1
TIME (20μs/DIV)
1
10
100
1k
10k
FREQUENCY (Hz)
Figure 35. Large Signal Transient Response
Figure 37. Voltage Noise Density
Rev. B | Page 11 of 16
AD8613/AD8617/AD8619
OUTLINE DIMENSIONS
3.20
3.00
2.80
5.00 (0.1968)
4.80 (0.1890)
8
1
5
4
8
1
5
4
5.15
4.90
4.65
6.20 (0.2440)
5.80 (0.2284)
3.20
3.00
2.80
4.00 (0.1574)
3.80 (0.1497)
1.27 (0.0500)
BSC
0.50 (0.0196)
0.25 (0.0099)
PIN 1
× 45°
1.75 (0.0688)
1.35 (0.0532)
0.65 BSC
0.25 (0.0098)
0.95
0.85
0.75
0.10 (0.0040)
1.10 MAX
8°
0.51 (0.0201)
0.31 (0.0122)
0° 1.27 (0.0500)
COPLANARITY
0.10
0.25 (0.0098)
0.17 (0.0067)
0.80
0.60
0.40
SEATING
PLANE
0.40 (0.0157)
8°
0°
0.15
0.00
0.38
0.22
0.23
0.08
COMPLIANT TO JEDEC STANDARDS MS-012-AA
SEATING
PLANE
COPLANARITY
0.10
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
COMPLIANT TO JEDEC STANDARDS MO-187-AA
Figure 38. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Figure 40. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body (R-8)
Dimensions shown in millimeters
Dimensions shown in millimeters and (inches)
5.10
5.00
4.90
8.75 (0.3445)
8.55 (0.3366)
14
1
8
7
14
8
7
4.00 (0.1575)
3.80 (0.1496)
6.20 (0.2441)
5.80 (0.2283)
4.50
4.40
4.30
6.40
BSC
1.27 (0.0500)
BSC
0.50 (0.0197)
0.25 (0.0098)
1.75 (0.0689)
1.35 (0.0531)
1
× 45°
0.25 (0.0098)
0.10 (0.0039)
PIN 1
8°
0°
0.65
BSC
1.05
1.00
0.80
0.51 (0.0201)
0.31 (0.0122)
SEATING
PLANE
1.27 (0.0500)
0.40 (0.0157)
COPLANARITY
0.10
0.25 (0.0098)
0.17 (0.0067)
0.20
0.09
1.20
MAX
0.75
0.60
0.45
8°
0°
0.15
0.05
0.30
0.19
COMPLIANT TO JEDEC STANDARDS MS-012-AB
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
SEATING
PLANE
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-153-AB-1
Figure 39. 14-Lead Standard Small Outline Package [SOIC_N]
Narrow Body (R-14)
Figure 41. 14-Lead Thin Shrink Small Outline Package [TSSOP]
(RU-14)
Dimensions shown in millimeters and (inches)
Dimensions shown in millimeters
Rev. B | Page 12 of 16
AD8613/AD8617/AD8619
2.90 BSC
2.20
2.00
1.80
5
1
4
3
2.80 BSC
0.95 BSC
1.60 BSC
2
1.35
1.25
1.15
2.40
2.10
1.80
5
1
4
3
PIN 1
2
1.90
BSC
*
0.90
0.87
0.84
PIN 1
1.00
0.90
0.70
0.65 BSC
0.40
0.10
1.10
0.80
*
1.00 MAX
0.20
0.08
0.46
0.36
0.26
8°
4°
0°
0.30
0.15
0.22
0.08
0.10 MAX
0.60
0.45
0.30
0.50
0.30
0.10
MAX
SEATING
PLANE
SEATING
PLANE
0.10 COPLANARITY
*
COMPLIANT TO JEDEC STANDARDS MO-193-AB WITH
THE EXCEPTION OF PACKAGE HEIGHT AND THICKNESS.
COMPLIANT TO JEDEC STANDARDS MO-203-AA
Figure 42. 5-Lead Thin Shrink Small Outline Transistor Package [SC70]
Figure 43. 5-Lead Thin Small Outline Transistor Package [TSOT-23]
(KS-5)
(UJ-5)
Dimensions shown in millimeters
Dimensions shown in millimeters
ORDERING GUIDE
Model
Temperature Range
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
Package Description
5-Lead SC70
5-Lead SC70
Package Option
KS-5
KS-5
KS-5
UJ-5
Branding
A0Y
A0Y
A0Y
A0Y
AD8613AKSZ-R21
AD8613AKSZ-REEL1
AD8613AKSZ-REEL71
AD8613AUJZ-R21
AD8613AUJZ-REEL1
AD8613AUJZ-REEL71
AD8617ARMZ-R21
AD8617ARMZ-REEL1
AD8617ARZ1
AD8617ARZ-REEL1
AD8617ARZ-REEL71
AD8619ARUZ1
AD8619ARUZ-REEL1
AD8619ARZ1
5-Lead SC70
5-Lead TSOT-23
5-Lead TSOT-23
5-Lead TSOT-23
8-Lead MSOP
UJ-5
UJ-5
A0Y
A0Y
RM-8
RM-8
R-8
R-8
R-8
A0T
A0T
8-Lead MSOP
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
14-Lead TSSOP
14-Lead TSSOP
14-Lead SOIC_N
14-Lead SOIC_N
14-Lead SOIC_N
RU-14
RU-14
R-14
R-14
R-14
AD8619ARZ-REEL1
AD8619ARZ-REEL71
1 Z = Pb-free part.
Rev. B | Page 13 of 16
AD8613/AD8617/AD8619
NOTES
Rev. B | Page 14 of 16
AD8613/AD8617/AD8619
NOTES
Rev. B | Page 15 of 16
AD8613/AD8617/AD8619
NOTES
©2006 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D05622-0-1/06(B)
Rev. B | Page 16 of 16
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