AD8644ARU [ADI]
Single and Quad +18 V Operational Amplifiers; 单路和四路+ 18V运算放大器
| 型号： | AD8644ARU |
| 厂家： | 
ADI |
| 描述： | Single and Quad +18 V Operational Amplifiers |
| 文件： | 总8页 (文件大小：306K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Single and Quad +18 V
Operational Amplifiers
a
AD8614/AD8644
PIN CONFIGURATIONS
5-Lead SOT-23
FEATURES
Unity Gain Bandwidth: 5.5 MHz
Low Voltage Offset: 1.0 mV
Slew Rate: 7.5 V/s
(RT Suffix)
Single-Supply Operation: 5 V to 18 V
High Output Current: 70 mA
Low Supply Current: 800 A/Amplifier
Stable with Large Capacitive Loads
Rail-to-Rail Inputs and Outputs
OUT A
1
2
5
4
V+
V؊
AD8614
3
+IN
؊IN
14-Lead TSSOP
(RU Suffix)
APPLICATIONS
LCD Gamma and VCOM Drivers
Modems
Portable Instrumentation
Direct Access Arrangement
OUT A
؊IN A
؉IN A
V؉
؉IN B
؊IN B
OUT D
؊IN D
؉IN D
V؊
1
14
؉IN C
؊IN C
OUT C
OUT B
7
8
AD8644
GENERAL DESCRIPTION
14-Lead Narrow Body SO
(R Suffix)
The AD8614 (single) and AD8644 (quad) are single-supply,
5.5 MHz bandwidth, rail-to-rail amplifiers optimized for LCD
monitor applications.
They are processed using Analog Devices high voltage, high speed,
complementary bipolar process—HV XFCB. This proprietary
process includes trench isolated transistors that lower internal
parasitic capacitance which improves gain bandwidth, phase mar-
gin and capacitive load drive. The low supply current of 800 µA
(typ) per amplifier is critical for portable or densely packed designs.
In addition, the rail-to-rail output swing provides greater dynamic
range and control than standard video amplifiers provide.
1
2
3
4
5
6
7
14
13
12
11
10
9
OUT A
OUT D
–IN D
–IN A
+IN A
V+
+IN D
V–
AD8644
+IN B
–IN B
OUT B
+IN C
–IN C
OUT C
8
These products operate from supplies of 5 V to as high as
18 V. The unique combination of an output drive of 70 mA,
high slew rates, and high capacitive drive capability makes the
AD8614/AD8644 an ideal choice for LCD applications.
The AD8614 and AD8644 are specified over the temperature
range of –20°C to +85°C. They are available in 5-lead SOT-23,
14-lead TSSOP and 14-lead SOIC surface mount packages in
tape and reel.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
World Wide Web Site: http://www.analog.com
© Analog Devices, Inc., 1999
AD8614/AD8644–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS (5 V ≤ VS ≤ 18 V, VCM = VS/2, TA = 25؇C unless otherwise noted)
Parameter
Symbol
Conditions
Min
Typ Max
Unit
INPUT CHARACTERISTICS
Offset Voltage
VOS
IB
1.0
80
5
2.5
3
400
500
100
200
VS
mV
mV
nA
nA
nA
nA
V
dB
V/mV
–20°C ≤ TA ≤ +85°C
–20°C ≤ TA ≤ +85°C
–20°C ≤ TA ≤ +85°C
Input Bias Current
Input Offset Current
IOS
Input Voltage Range
Common-Mode Rejection Ratio
Voltage Gain
0
60
10
CMRR
AVO
VCM = 0 V to VS
VOUT = 0.5 V to VS –0.5 V, RL = 10 kΩ
75
150
OUTPUT CHARACTERISTICS
Output Voltage High
Output Voltage Low
VOH
VOL
ISC
ILOAD = 10 mA
ILOAD = 10 mA
VS –0.15
65
V
150
mV
mA
mA
Output Short Circuit Current
35
30
70
–20°C ≤ TA ≤ +85°C
POWER SUPPLY
PSRR
Supply Current / Amplifier
PSRR
Isy
VS = ±2.25 V to ±9.25 V
–20°C ≤ TA ≤ +85°C
80
110
0.8
dB
mA
mA
1.1
1.5
DYNAMIC PERFORMANCE
Slew Rate
Gain Bandwidth Product
Phase Margin
SR
GBP
Φo
tS
CL = 200 pF
7.5
5.5
65
3
V/µs
MHz
Degrees
µs
Settling Time
0.01%, 10 V Step
NOISE PERFORMANCE
Voltage Noise Density
en
en
in
f = 1 kHz
f = 10 kHz
f = 10 kHz
12
11
1
nV/√Hz
nV/√Hz
pA/√Hz
Current Noise Density
NOTE
All typical values are for VS = 18 V.
Specifications subject to change without notice.
ABSOLUTE MAXIMUM RATINGS1
1
Package Type
Unit
JA
JC
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND to VS
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Operating Temperature Range . . . . . . . . . . . –20°C to +85°C
Junction Temperature Range . . . . . . . . . . . . –65°C to +150°C
Lead Temperature Range (Soldering, 60 sec) . . . . . . . . 300°C
5-Lead SOT-23 (RT)
14-Lead TSSOP (RU)
14-Lead SOIC (R)
230
180
120
140
35
56
°C/W
°C/W
°C/W
NOTE
1θJA is specified for worst-case conditions, i.e., θJA is specified for device soldered
onto a circuit board for surface mount packages.
NOTES
1Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute maximum rating condi-
tions for extended periods may affect device reliability.
ORDERING GUIDE
Temperature
Range
Package
Description
Package
Option
Model
AD8614ART1 –20°C to +85°C 5-Lead SOT-23 RT-5
AD8644ARU2 –20°C to +85°C 14-Lead TSSOP RU-14
AD8644AR2
–20°C to +85°C 14-Lead SOIC
R-14
NOTES
1Available in 3,000 or 10,000 piece reels.
2Available in 2,500 piece reels only.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD8614/AD8644 features proprietary ESD protection circuitry, permanent dam-
age may occur on devices subjected to high energy electrostatic discharges. Therefore, proper
ESD precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
Typical Performance Characteristics –
AD8614/AD8644
50
12
V
R
= 18V
= 2k⍀
= 25؇C
S
45
40
80
L
T
8
A
60
45
0.01%
0.1%
35
30
25
20
40
90
4
0
5V Յ V Յ 18V
S
135
180
20
0
R
C
= 1M⍀
= 40pF
L
L
T
= 25؇C
A
؊4
؊8
؊12
15
0.1%
+OS
0.01%
2.5
10
5
؊OS
0
10
100
1k
10k
0
0.5
1.0
1.5
2.0
3.0
3.5
100M
1k
10k
100k
1M
10M
CAPACITANCE – pF
FREQUENCY – Hz
SETTLING TIME – s
29
25
21
17
13
9
7.5
6.5
V
= 5V
= 2k⍀
= 200pF
= 1
= 25؇C
V
= 18V
= 2k⍀
= 200pF
= 1
= 25؇C
S
S
R
C
A
T
R
C
A
T
L
L
V
L
L
V
5.5
4.5
3.5
2.5
1.5
0.5
A
A
V
S
2
5
V
= 5V Յ V Յ 18V
S
S
1
R
C
A
= 2k⍀
= 200pF
= 1
L
L
؊3
؊0.5
؊1.5
؊2.5
V
A
؊7
T
= 25؇C
؊11
TIME – 500ns/Div
TIME – 1s/Div
TIME – 1s/Div
10k
1k
1,000
900
400
300
5V Յ V Յ 18V
S
T
= 25؇C
T
= 25؇C
A
A
V
= ؎2.5V
S
800
200
100
0
700
600
500
100
400
300
؊100
؊200
؊300
؊400
SINK
10
1
SOURCE
200
100
0
0.01
0.001
0.1
1
10
100
0
1
2
3
4
5
6
7
8
9
10
؊2.5
؊1.5
؊0.5
0.5
1.5
2.5
LOAD CURRENT – mA
SUPPLY VOLTAGE – ؎Volts
COMMON-MODE VOLTAGE – Volts
AD8614/AD8644
400
180
160
140
120
100
1.0
0.9
0.8
0.7
0.6
0.5
2.5V Յ V Յ 9V
S
V
= 18V
S
300
T
= 25؇C
A
V
= ؎9V
S
200
100
0
80
60
40
20
0
؊100
؊200
؊300
؊400
V
= 5V
S
؊35
؊15
5
25
45
65
85
0
0.5
1
1.5
2
؊2 ؊1.5 ؊1 ؊0.5
؊9 ؊7 ؊5 ؊3 ؊1
0
1
3
5
7
9
COMMON-MODE VOLTAGE – Volts
INPUT OFFSET VOLTAGE – mV
TEMPERATURE – ؇C
300
240
180
120
60
20
18
16
14
6
5
4
3
2
1
0
5V Յ V Յ 18V
S
T
= 25؇C
A
V
= 5V
= 1
= 2k⍀
= 25؇C
V
= 18V
= 1
= 2k⍀
= 25؇C
S
S
A
R
T
A
R
T
VCL
VCL
L
L
12
A
A
10
8
6
4
A
= 1
A
= 10
V
V
2
0
A = 100
V
0
100
1k
10k
100k
1M
10M
100
1k
10k
100k
1M
10M
1k
10k
100k
FREQUENCY – Hz
1M
10M
FREQUENCY – Hz
FREQUENCY – Hz
140
120
100
80
100
80
V
= 18V
= 25؇C
5V Յ V Յ 18V
5V Յ V Յ 18V
S
S
S
T
T
= 25؇C
T
= 25؇C
A
A
A
40
20
0
60
PSRR+
60
40
20
0
40
PSRR؊
20
0
10k
100k
100
1k
1M
10M
1k
10k
100k
1M
10M
100M
100
1k
10k
100k
1M
10M
FREQUENCY – Hz
FREQUENCY – Hz
FREQUENCY – Hz
AD8614/AD8644
100
10
1
100
10
1
9
8
7
6
5
4
3
2
1
0
V
T
= 5V
= 25؇C
V
T
= 18V
= 25؇C
S
S
A
A
SR+
SR؊
A
R
C
= 1
V
L
= 2k⍀
= 200pF
= 25؇C
L
T
A
10
100
1k
10k
10
100
1k
10k
2
4
6
8
10 12 14 16 18 20
SUPPLY VOLTAGE – V
0
FREQUENCY – Hz
FREQUENCY – Hz
APPLICATIONS SECTION
Theory of Operation
The AD8614/AD8644 are processed using Analog Devices’ high
voltage, high speed, complementary bipolar process—HV XFCB.
This process includes trench isolated transistors that lower parasitic
capacitance.
The AD8614/AD8644 have no built-in short circuit protection.
The short circuit limit is a function of high current roll-off of the
output stage transistors and the voltage drop over the resistor
shown on the schematic at the output stage. The voltage over this
resistor is clamped to one diode during short circuit voltage events.
Output Short-Circuit Protection
Figure 22 shows a simplified schematic of the AD8614/AD8644.
The input stage is rail-to-rail, consisting of two complementary
differential pairs, one NPN pair and one PNP pair. The input stage
is protected against avalanche breakdown by two back-to-back
diodes. Each input has a 1.5 kΩ resistor that limits input current
during over-voltage events and furnishes phase reversal protection
if the inputs are exceeded. The two differential pairs are connected
to a double-folded cascode. This is the stage in the amplifier with
the most gain. The double folded cascode differentially feeds the
output stage circuitry. Two complementary common emitter tran-
sistors are used as the output stage. This allows the output to swing
to within 125 mV from each rail with a 10 mA load. The gain of the
output stage, and thus the open loop gain of the op amp, depends on
the load resistance.
To achieve a wide bandwidth and high slew rate, the output of
the AD8614/AD8644 is not short-circuit protected. Shorting
the output directly to ground or to a supply rail may destroy the
device. The typical maximum safe output current is 70 mA.
In applications where some output current protection is needed,
but not at the expense of reduced output voltage headroom, a low
value resistor in series with the output can be used. This is shown
in Figure 23. The resistor is connected within the feedback loop
of the amplifier so that if VOUT is shorted to ground and VIN
swings up to 18 V, the output current will not exceed 70 mA.
For 18 V single supply applications, resistors less than 261 Ω are
not recommended.
V
CC
+
1.5k⍀
؊
1.5k⍀
V
OUT
V
V
CC
CC
V
EE
AD8614/AD8644
18V
The power dissipated by the device can be calculated as:
DISS = ILOAD × (VS – VOUT
P
)
V
IN
where: ILOAD is the AD86x4 output load current;
VS is the AD86x4 supply voltage; and
261⍀
V
AD86x4
OUT
V
OUT is the AD86x4 output voltage.
Figure 24 provides a convenient way to see if the device is being
overheated. The maximum safe power dissipation can be found
graphically, based on the package type and the ambient tem-
perature around the package. By using the previous equation, it
is a simple matter to see if PDISS exceeds the device’s power
derating curve. To ensure proper operation, it is important to
observe the recommended derating curves shown in Figure 24.
Input Overvoltage Protection
As with any semiconductor device, whenever the condition exists for
the input to exceed either supply voltage, attention needs to be paid
to the input overvoltage characteristic. As an overvoltage occurs, the
amplifier could be damaged, depending on the voltage level and the
magnitude of the fault current. When the input voltage exceeds
either supply by more than 0.6 V, internal pin junctions energize,
allowing current to flow from the input to the supplies. Observing
Figure 22, the AD8614/AD8644 has 1.5 kΩ resistors in series with
each input, which helps limit the current. This input current is not
inherently damaging to the device as long as it is limited to 5 mA or
less. If the voltage is large enough to cause more than 5 mA of cur-
rent to flow, an external series resistor should be added. The size of
this resistor is calculated by dividing the maximum overvoltage by
5 mA and subtracting the internal 1.5 kΩ resistor. For example, if
the input voltage could reach 100 V, the external resistor should be
(100 V/5 mA) – 1.5 kΩ = 18.5 kΩ. This resistance should be placed
in series with either or both inputs if they are subjected to the over-
voltages. For more information on general overvoltage characteristics
of amplifiers refer to the 1993 System Applications Guide, available
from the Analog Devices Literature Center.
1.5
14-LEAD SOIC PACKAGE
= 120؇C/W
JA
1.0
0.5
0
14-LEAD TSSOP PACKAGE
= 180؇C/W
JA
5-LEAD SOT-23 PACKAGE
= 230؇C/W
JA
–35
–15
5
25
45
65
85
AMBIENT TEMPERATURE –
؇C
Output Phase Reversal
Unused Amplifiers
The AD8614/AD8644 is immune to phase reversal as long as the
input voltage is limited to within the supply rails. Although the
device’s output will not change phase, large currents due to
input overvoltage could result, damaging the device. In applica-
tions where the possibility of an input voltage exceeding the
supply voltage exists, overvoltage protection should be used, as
described in the previous section.
It is recommended that any unused amplifiers in the quad pack-
age be configured as a unity gain follower with a 1 kΩ feedback
resistor connected from the inverting input to the output, and
the noninverting input tied to the ground plane.
Capacitive Load Drive
The AD8614/AD8644 exhibits excellent capacitive load driving
capabilities. Although the device is stable with large capacitive
loads, there is a decrease in amplifier bandwidth as the capacitive
load increases.
Power Dissipation
The maximum power that can be safely dissipated by the
AD8614/AD8644 is limited by the associated rise in junction
temperature. The maximum safe junction temperature is 150°C,
and should not be exceeded or device performance could suffer.
If this maximum is momentarily exceeded, proper circuit opera-
tion will be restored as soon as the die temperature is reduced.
Leaving the device in an “overheated” condition for an extended
period can result in permanent damage to the device.
When driving heavy capacitive loads directly from the AD8614/
AD8644 output, a snubber network can be used to improve the
transient response. This network consists of a series R-C connected
from the amplifier’s output to ground, placing it in parallel with the
capacitive load. The configuration is shown in Figure 25. Although
this network will not increase the bandwidth of the amplifier, it will
significantly reduce the amount of overshoot.
To calculate the internal junction temperature of the AD86x4,
the following formula can be used:
5V
TJ = PDISS × θJA + TA
where: TJ = AD86x4 junction temperature;
P
DISS = AD86x4 power dissipation;
V
OUT
AD86x4
θJA = AD86x4 package thermal resistance, junction-to-
C
R
L
V
X
IN
ambient; and
C
X
TA = Ambient temperature of the circuit.
AD8614/AD8644
5V
The optimum values for the snubber network should be determined
empirically based on the size of the capacitive load. Table I shows a
few sample snubber network values for a given load capacitance.
5V
10
V
DD
C1
100F
R3
20⍀
28
35
V
2
3
DD
U1-A
Table I. Snubber Networks for Large Capacitive Loads
1
4
R1
2k⍀
LEFT
OUT
Load Capacitance
(CL)
Snubber Network
(RS, CS)
5
AD1881
(AC'97)
0.47 nF
4.7 nF
47 nF
300 Ω, 0.1 µF
30 Ω, 1 µF
5 Ω, 1 µF
6
C2
100F
R4
20⍀
36
RIGHT
OUT
7
8
U1-B
V
Direct Access Arrangement
SS
9
R2
2k⍀
Figure 26 shows a schematic for a 5 V single supply transmit/receive
telephone line interface for 600 Ω transmission systems. It allows
full duplex transmission of signals on a transformer-coupled 600 Ω
line. Amplifier A1 provides gain that can be adjusted to meet the
modem output drive requirements. Both A1 and A2 are configured
to apply the largest possible differential signal to the transformer.
The largest signal available on a single 5 V supply is approximately
4.0 V p-p into a 600 Ω transmission system. Amplifier A3 is config-
ured as a difference amplifier to extract the receive information from
the transmission line for amplification by A4. A3 also prevents the
transmit signal from interfering with the receive signal. The gain of
A4 can be adjusted in the same manner as A1’s to meet the modem’s
input signal requirements. Standard resistor values permit the use of
SIP (Single In-Line Package) format resistor arrays. Couple this with
the AD8644 14-lead SOIC or TSSOP package and this circuit can
offer a compact solution.
NOTE: ADDITIONAL PINS
OMITTED FOR CLARITY
U1 = AD8644
If gain is required from the output amplifier, four additional
resistors should be added as shown in Figure 28. The gain of
the AD8644 can be set as:
R6
R5
AV
=
5V
R6
20k⍀
V
DD
5V
38
35
V
DD
C1
100F
R3
20⍀
LEFT
10
OUT
2
3
R5
10k⍀
P1
U1-A
Tx GAIN
ADJUST
1
4
R2
R1
2k⍀
9.09k⍀
5
C1
0.1F
R1
10k⍀
TRANSMIT
TxA
TO TELEPHONE
LINE
2k⍀
R3
360⍀
2
1
1:1
27
V
REF
A1
3
R5
10k⍀
6.2V
6.2V
ZO
600⍀
6
AD1881
(AC97)
C2
100F
R4
20⍀
5V DC
T1
7
8
R6
R5
10k⍀
U1-B
6
5
MIDCOM
671-8005
10k⍀
R7
10k⍀
9
7
R2
2k⍀
36
RIGHT
OUT
A2
V
R8
10k⍀
SS
10F
R6
20k⍀
U1 = AD8644
R10
R9
10k⍀
10k⍀
P2
Rx GAIN
ADJUST
R6
NOTE: ADDITIONAL PINS
OMITTED FOR CLARITY
A
=
= +6dB WITH VALUES SHOWN
V
R14
14.3k⍀
R13
10k⍀
R5
RECEIVE
RxA
2
3
R11
10k⍀
1
A3
2k⍀
C2
0.1F
6
R12
10k⍀
7
A4
5
A1, A2 = 1/2 AD8644
A3, A4 = 1/2 AD8644
Input coupling capacitors are not required for either circuit as
the reference voltage is supplied from the AD1881.
R4 and R5 help protect the AD8644 output in case the output
jack or headphone wires are accidentally shorted to ground.
The output coupling capacitors C1 and C2 block dc current
from the headphones and create a high-pass filter with a corner
frequency of:
A One-Chip Headphone/Microphone Preamplifier Solution
Because of its high output current performance, the AD8644
makes an excellent amplifier for driving an audio output jack in
a computer application. Figure 27 shows how the AD8644 can
be interfaced with an ac codec to drive headphones or speakers
1
f−3dB
=
2πC1 R4 + R
(
)
L
Where RL is the resistance of the headphones.
AD8614/AD8644
The remaining two amplifiers can be used as low voltage
microphone preamplifiers. A single AD8614 can be used as a
stand-alone microphone preamplifier. Figure 29 shows this
implementation.
SPICE Model Availability
The SPICE model for the AD8614/AD8644 amplifier is available
and can be downloaded from the Analog Devices’ web site at
http://www.analog.com. The macro-model accurately simulates
a number of AD8614/AD8644 parameters, including offset volt-
age, input common-mode range, and rail-to-rail output swing.
The output voltage versus output current characteristic of the
macro-model is identical to the actual AD8614/AD8644 perfor-
mance, which is a critical feature with a rail-to-rail amplifier model.
The model also accurately simulates many ac effects, such as gain
bandwidth product, phase margin, input voltage noise, CMRR and
PSRR versus frequency, and transient response. Its high degree of
model accuracy makes the AD8614/AD8644 macro-model one of
the most reliable and true-to-life models available for any amplifier.
10k⍀
= 20dB
5V
2.2k⍀
A
V
1F
1k⍀
21
MIC 1 IN
MIC 1
10k⍀
5V
AD1881
(AC'97)
2.2k⍀
A
= +20dB
V
1F
1k⍀
22
27
MIC 2 IN
MIC 2
V
REF
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
5-Lead SOT-23
(RT Suffix)
0.1181 (3.00)
0.1102 (2.80)
5
1
4
3
0.1181 (3.00)
0.1024 (2.60)
0.0669 (1.70)
0.0590 (1.50)
2
PIN 1
0.0374 (0.95) BSC
0.0748 (1.90)
BSC
0.0079 (0.20)
0.0031 (0.08)
0.0512 (1.30)
0.0354 (0.90)
0.0571 (1.45)
0.0374 (0.95)
10؇
0؇
SEATING
PLANE
0.0197 (0.50)
0.0138 (0.35)
0.0059 (0.15)
0.0019 (0.05)
0.0217 (0.55)
0.0138 (0.35)
14-Lead TSSOP
(RU Suffix)
14-Lead Narrow SOIC
(R Suffix)
0.201 (5.10)
0.193 (4.90)
0.3444 (8.75)
0.3367 (8.55)
14
1
8
7
14
8
0.1574 (4.00)
0.1497 (3.80)
0.2440 (6.20)
0.2284 (5.80)
PIN 1
0.0688 (1.75)
0.0532 (1.35)
0.0196 (0.50)
0.0099 (0.25)
x 45؇
1
0.0098 (0.25)
0.0040 (0.10)
7
PIN 1
8؇
0؇
0.0500
(1.27)
BSC
0.0192 (0.49)
0.0138 (0.35)
0.006 (0.15)
0.002 (0.05)
SEATING
PLANE
0.0500 (1.27)
0.0160 (0.41)
0.0099 (0.25)
0.0075 (0.19)
0.0433
(1.10)
MAX
0.028 (0.70)
0.020 (0.50)
8؇
0؇
0.0118 (0.30)
0.0075 (0.19)
0.0256
(0.65)
BSC
SEATING
PLANE
0.0079 (0.20)
0.0035 (0.090)
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