ADDI7018BCPZ [ADI]

Dual-Channel, 16-Bit HD Image Signal Processor with Precision Timing Core;
ADDI7018BCPZ
型号: ADDI7018BCPZ
厂家: ADI    ADI
描述:

Dual-Channel, 16-Bit HD Image Signal Processor with Precision Timing Core

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Dual-Channel, 16-Bit HD Image Signal  
Processor with Precision Timing Core  
Data Sheet  
ADDI7018  
FEATURES  
GENERAL DESCRIPTION  
Pin-compatible with the AD9978A  
Dual AFE channels  
The ADDI7018 is a highly integrated, dual-channel, charge-  
coupled device (CCD) signal processor for high speed digital  
video camera applications. Each channel is specified at pixel  
rates of up to 75 MHz and consists of a complete analog front  
end (AFE) with ADC conversion. The Precision Timing® core  
allows adjustment of the correlated double sampler (CDS) and  
sample-and-hold amplifier (SHA) clocks with 210 ps resolution  
at 75 MHz operation. The ADDI7018 also contains a reduced  
range low voltage differential signaling (LVDS) interface for the  
dual-channel data outputs.  
1.8 V analog and digital core supply voltage  
Serial data output with reduced range LVDS outputs  
Differential analog inputs  
CDS or SHA configuration (CDS bypass) with  
−3 dB, 0 dB, +3 dB, and +6 dB gain  
6 dB to 42 dB, 10-bit variable gain amplifier (VGA)  
16-bit, 75 MHz analog-to-digital converter (ADC)  
Black level clamp with variable level control  
Precision Timing core with 210 ps resolution at 75 MHz  
Each analog front end includes black level clamping, a CDS, a  
VGA, and a 75 MHz, 16-bit analog-to-digital converter (ADC).  
Operation is programmed using a 3-wire serial interface.  
APPLICATIONS  
HD broadcast cameras  
High speed industrial cameras  
Professional digital cameras  
Digital copiers  
Packaged in a space-saving, 6 mm × 6 mm, 40-lead LFCSP, the  
ADDI7018 is specified over an operating temperature range of  
−25°C to +85°C.  
FUNCTIONAL BLOCK DIAGRAM  
ADDI7018  
V
REF  
6dB TO 42dB  
INP_A  
INM_A  
DOUT0P  
DOUT0N  
DOUT1P  
DOUT1N  
TCLKP  
CDS/  
SHA  
ADC  
VGA  
–3dB, 0dB, +3dB, +6dB  
CLAMP  
CLAMP  
LVDS  
SERIALIZER  
TCLKN  
–3dB, 0dB, +3dB, +6dB  
DOUT2P  
DOUT2N  
DOUT3P  
DOUT3N  
6dB TO 42dB  
INP_B  
INM_B  
CDS/  
VGA  
ADC  
SHA  
INTERNAL CLOCKS  
Precision  
Timing  
CORE  
CLK_OUT  
CLI  
SYNC  
INTERNAL  
GENERATOR  
REGISTERS  
SCK  
SDATA  
HD  
VD  
SL  
Figure 1.  
For more information about the ADDI7018, email Analog Devices, Inc., at afe.ccd@analog.  
Rev. Sp0  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registered trademarks are the property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.461.3113  
www.analog.com  
©2012 Analog Devices, Inc. All rights reserved.  
ADDI7018* PRODUCT PAGE QUICK LINKS  
Last Content Update: 02/23/2017  
COMPARABLE PARTS  
View a parametric search of comparable parts.  
DISCUSSIONS  
View all ADDI7018 EngineerZone Discussions.  
DOCUMENTATION  
Data Sheet  
SAMPLE AND BUY  
Visit the product page to see pricing options.  
ADDI7018: Dual-Channel, 16-Bit HD Image Signal  
Processor with Precision Timing Core Data Sheet  
TECHNICAL SUPPORT  
Submit a technical question or find your regional support  
number.  
DESIGN RESOURCES  
ADDI7018 Material Declaration  
PCN-PDN Information  
DOCUMENT FEEDBACK  
Submit feedback for this data sheet.  
Quality And Reliability  
Symbols and Footprints  
This page is dynamically generated by Analog Devices, Inc., and inserted into this data sheet. A dynamic change to the content on this page will not  
trigger a change to either the revision number or the content of the product data sheet. This dynamic page may be frequently modified.  
ADDI7018  
NOTES  
Data Sheet  
©2012 Analog Devices, Inc. All rights reserved. Trademarks and  
registered trademarks are the property of their respective owners.  
D10868F-0-8/12(Sp0)  
Rev. Sp0 | Page 2 of 2  

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ADDR1

Figure 1 shows the NS7520 modules. Dashed lines indicate shared pins
ETC

ADDR10

Figure 1 shows the NS7520 modules. Dashed lines indicate shared pins
ETC

ADDR11

Figure 1 shows the NS7520 modules. Dashed lines indicate shared pins
ETC

ADDR12

Figure 1 shows the NS7520 modules. Dashed lines indicate shared pins
ETC