ADM1184ARMZ1 [ADI]
0.8% Accurate Quad Voltage Monitor; 0.8 ％的精确四路电压监控器
| 型号： | ADM1184ARMZ1 |
| 厂家： | 
ADI |
| 描述： | 0.8% Accurate Quad Voltage Monitor |
| 文件： | 总12页 (文件大小：269K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
0.8% Accurate Quad Voltage Monitor
ADM1184
FEATURES
FUNCTIONAL BLOCK DIAGRAM
VCC
Powered from 2.7 V to 5.5 V on the VCC pin
Monitors 4 supplies via 0.8% accurate comparators
4 inputs can be programmed to monitor different voltage
levels with external resistor dividers
POWER AND
REF = 0.6V
REFERENCE
ADM1184
GENERATOR
OUT1
3 open-drain enable outputs (OUT1, OUT2, and OUT3)
Open-drain power-good output (PWRGD)
Internal 190 ms delay associated with assertion of PWRGD
10-lead MSOP
VIN1
REF = 0.6V
OUT2
VIN2
REF = 0.6V
APPLICATIONS
INTERNAL
OUT3
LOGIC
VIN3
Monitor and alarm functions
Telecommunications
Microprocessor systems
PC/servers
REF = 0.6V
PWRGD
VIN4
REF = 0.6V
GND
Figure 1.
GENERAL DESCRIPTION
The ADM1184 is an integrated, 4-channel voltage-monitoring
device. A 2.7 V to 5.5 V power supply is required on the VCC pin
to power the device.
OUT1 to OUT3 are dependent on their associated VINx input
(that is, VIN1, VIN2, or VIN3). If a supply monitored by VINx
drops below its programmed threshold, the associated OUTx pin
and PWRGD are disabled.
Four precision comparators monitor four voltage rails.
Each comparator has a 0.6 V reference with a worst-case
accuracy of 0.8%. Resistor networks that are external to the
VIN1, VIN2, VIN3, and VIN4 pins set the trip points for
the monitored supply rails.
PWRGD is a common power-good output indicating the status
of all monitored supplies. There is an internal 190 ms (typical)
delay associated with the assertion of the PWRGD output. If
VIN1, VIN2, VIN3, or VIN4 drops below its programmed
threshold, PWRGD is deasserted immediately.
The ADM1184 has four open-drain outputs. OUT1 to OUT3
can be used to enable power supplies, and PWRGD is a
common power-good output.
The ADM1184 is available in a 10-lead mini small outline
package (MSOP).
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
www.analog.com
©2008 Analog Devices, Inc. All rights reserved.
ADM1184
TABLE OF CONTENTS
Features .............................................................................................. 1
Pin Configuration and Function Descriptions..............................5
Typical Performance Characteristics ..............................................6
Theory of Operation .........................................................................9
Input Configuration......................................................................9
Output Configuration...................................................................9
Voltage Monitoring and Sequencing Application.................. 11
Outline Dimensions....................................................................... 12
Ordering Guide .......................................................................... 12
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 4
Thermal Resistance ...................................................................... 4
ESD Caution.................................................................................. 4
REVISION HISTORY
2/08—Revision 0: Initial Version
Rev. 0 | Page 2 of 12
ADM1184
SPECIFICATIONS
VCC = 2.7 V to 5.5 V, TA = −40°C to +85°C.
Table 1.
Parameter
Min
Typ
Max
Unit Conditions
VCC Pin
Operating Voltage Range, VCC
Supply Current, IVCC
VIN1 to VIN4 (VINx) Pins
Input Current, IVINLEAK
Input Threshold, VTH
OUT1 to OUT3 (OUTx), PWRGD Pins
Output Low Voltage, VOUTL
2.7
3.3
24
5.5
80
V
μA
−20
+20
nA
V
VVINx = 0.7 V
0.5952 0.6000 0.6048
0.4
0.4
V
V
VCC = 2.7 V, ISINK = 2 mA
VCC = 1 V, ISINK = 100 μA
Leakage Current, IALERT
VCC that Guarantees Valid Outputs
−1
1
+1
μA
V
All outputs are guaranteed to be either low or to give
a valid output level from VCC = 1 V
TIMING DELAYS
Refer to the timing diagrams in Figure 18 and Figure 19
VIN1 to OUT1, VIN2 to OUT2, VIN3 to OUT3
Low-to-High Propagation Delay
High-to-Low Propagation Delay, All Inputs
All Inputs High to PWRGD Rising Delay
30
30
190
μs
μs
ms
VCC = 3.3 V
VCC = 3.3 V
VCC = 3.3 V
100
280
Rev. 0 | Page 3 of 12
ADM1184
ABSOLUTE MAXIMUM RATINGS
THERMAL RESISTANCE
TA = 25°C, unless otherwise noted.
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 2.
Parameter
Rating
Table 3. Thermal Resistance
Package Type
10-Lead MSOP
VCC Pin
VINx Pins
−0.3 V to +6 V
−0.3 V to +6 V
−0.3 V to +6 V
−65°C to +125°C
−40°C to +85°C
300°C
θJA
Unit
OUTx, PWRGD Pins
Storage Temperature Range
Operating Temperature Range
Lead Temperature Soldering (10 sec)
Junction Temperature
137.5
°C/W
ESD CAUTION
150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Rev. 0 | Page 4 of 12
ADM1184
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
GND
VIN1
VIN2
VIN3
VIN4
1
2
3
4
5
10 VCC
9
8
7
6
OUT1
ADM1184
TOP VIEW
(Not to Scale)
OUT2
OUT3
PWRGD
Figure 2. Pin Configuration
Table 4. Pin Function Descriptions
Pin No. Mnemonic Description
1
2
GND
VIN1
Chip Ground Pin.
Noninverting Input of Comparator 1. The voltage on this pin is compared with a 0.6 V reference. Can be used to
monitor a voltage rail via a resistor divider.
3
4
5
6
VIN2
Noninverting Input of Comparator 2. The voltage on this pin is compared with a 0.6 V reference. Can be used to
monitor a voltage rail via a resistor divider.
Noninverting Input of Comparator 3. The voltage on this pin is compared with a 0.6 V reference. Can be used to
monitor a voltage rail via a resistor divider.
Noninverting Input of Comparator 4. The voltage on this pin is compared with a 0.6 V reference. Can be used to
monitor a voltage rail via a resistor divider.
Active High, Open-Drain Output. When the voltage on each VINx input exceeds 0.6 V, PWRGD is asserted after a
190 ms delay. Once PWRGD has been asserted, if the voltage monitored by VIN1, VIN2, VIN3, or VIN4 falls below 0.6 V,
the PWRGD output is deasserted immediately.
VIN3
VIN4
PWRGD
7
OUT3
OUT2
OUT1
VCC
Active High, Open-Drain Output. When the voltage on VIN3 exceeds 0.6 V, OUT3 is asserted. OUT3 remains asserted
until the voltage monitored by VIN3 falls below 0.6 V, and then it is driven low.
Active High, Open-Drain Output. When the voltage on VIN2 exceeds 0.6 V, OUT2 is asserted. OUT2 remains asserted
until the voltage monitored by VIN2 falls below 0.6 V, and then it is driven low.
Active High, Open-Drain Output. When the voltage on VIN1 exceeds 0.6 V, OUT1 is asserted. OUT1 remains asserted
until the voltage monitored by VIN1 falls below 0.6 V, and then it is driven low.
Positive Supply Input Pin. The operating supply voltage range is 2.7 V to 5.5 V.
8
9
10
Rev. 0 | Page 5 of 12
ADM1184
TYPICAL PERFORMANCE CHARACTERISTICS
50
280
260
240
220
200
180
160
140
120
100mV OVERDRIVE
45
40
35
30
25
20
15
10
5
0
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
SUPPLY VOLTAGE (V)
2.7 2.9 3.1 3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5
SUPPLY VOLTAGE (V)
Figure 3. Supply Current vs. Supply Voltage
Figure 6. All Inputs High to PWRGD Rising Delay vs. Supply Voltage
50
45
40
35
30
25
20
15
10
5
50
V
= 3.3V, 100mV OVERDRIVE
CC
45
40
35
30
25
20
15
10
5
V
= 5V
CC
V
= 3.3V
CC
V
= 2.7V
CC
0
0
–40 –30 –20 –10
0
10 20 30 40 50 60 70 80 90
TEMPERATURE (°C)
–40 –30 –20 –10
0
10 20 30 40 50 60 70 80 90
TEMPERATURE (°C)
Figure 4. Supply Current vs. Temperature
Figure 7. VIN1/VIN2/VIN3 to OUT1/OUT2/OUT3 Rising Delay vs. Temperature
280
260
240
220
200
180
160
140
120
50
100mV OVERDRIVE
V
= 3.3V, 100mV OVERDRIVE
CC
45
40
35
30
25
20
15
10
5
0
–40 –30 –20 –10
0
10 20 30 40 50 60 70 80 90
TEMPERATURE (°C)
2.7 2.9 3.1 3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5
SUPPLY VOLTAGE (V)
Figure 5. All Inputs High to PWRGD Rising Delay vs. Temperature
Figure 8. VIN1/VIN2/VIN3 to OUT1/OUT2/OUT3 Rising Delay vs. Supply Voltage
Rev. 0 | Page 6 of 12
ADM1184
60
50
40
30
20
10
0
180
160
140
120
100
80
100mV OVERDRIVE
60
40
20
0
2.7 2.9 3.1 3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5
0
10
20
30
40
50
60
70
80
90
100
SUPPLY VOLTAGE (V)
INPUT OVERDRIVE (mV)
Figure 9. VINx to Output Falling Delay vs. Supply Voltage
Figure 12. Trip Threshold Maximum Transient Duration vs. Input Overdrive
50
40
30
20
10
0
200
APPLICABLE TO
V
= 3.3V, 100mV OVERDRIVE
CC
CHANNEL 1,
180
160
CHANNEL 2,
AND CHANNEL 3
140
120
100
80
60
40
20
0
–40 –30 –20 –10
0
10 20 30 40 50 60 70 80 90
TEMPERATURE (°C)
0
10
20
30
40
50
60
70
80
90
100
INPUT OVERDRIVE (mV)
Figure 10. VINx to Output Falling Delay vs. Temperature
Figure 13. Propagation Delay vs. Input Overdrive
0.610
400
0.608
0.606
0.604
0.602
0.600
0.598
0.596
0.594
0.592
0.590
350
300
250
200
150
100
50
0
–40 –30 –20 –10
0
10 20 30 40 50 60 70 80 90
TEMPERATURE (°C)
0
2
4
6
8
10 12 14 16 18 20 22 24
OUTPUT SINK CURRENT (mA)
Figure 11. VINx Trip Threshold vs. Temperature
Figure 14. Output Low Voltage vs. Output Sink Current
Rev. 0 | Page 7 of 12
ADM1184
100
90
80
70
60
50
40
30
20
10
0
1mA SINK
100µA SINK
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
SUPPLY VOLTAGE (V)
Figure 15. Output Low Voltage vs. Supply Voltage
Rev. 0 | Page 8 of 12
ADM1184
THEORY OF OPERATION
The ADM1184 is an integrated, 4-channel voltage-monitoring
device. A 2.7 V to 5.5 V power supply is required on the VCC pin
to power the device.
OUTPUT CONFIGURATION
The ADM1184 has four open-drain, active high outputs. Of
these outputs, OUT1 to OUT3 can be used to enable power
supplies, and PWRGD is a common power-good output.
V
= 2.7V TO 5.5V
CC
3.3V
2.5V
1.8V
1.2V
Output OUT1 to Output OUT3 are dependent on their associated
input (that is, VIN1, VIN2, or VIN3). Before the voltage on a
VINx input reaches 0.6 V, the corresponding output is switched
to ground if there is 1 V on the VCC pin of the ADM1184. When
VINx detects 0.6 V, OUTx is asserted after a 30 μs (typical) delay.
VCC
ADM1184
VIN1
OUT1
OUT2
OUT3
ENABLE
SIGNALS
VIN2
VIN3
When all four monitored supplies exceed 0.6 V, a system power-
good signal (PWRGD) is asserted. There is an internal 190 ms
(typical) delay associated with the assertion of the PWRGD
output. After PWRGD is asserted, if any of the four monitored
supplies drops below its programmed threshold, the corresponding
OUTx output and the PWRGD output are deasserted. If only
the supply monitored by VIN4 drops below its programmed
threshold, just the PWRGD output is deasserted.
VIN4
GND
PWRGD
POWER
GOOD
Figure 16. Typical Applications Circuit
INPUT CONFIGURATION
Four precision comparators monitor four voltage rails.
Each comparator has a 0.6 V reference with a worst-case
accuracy of 0.8%. Resistor networks external to the VIN1,
VIN2, VIN3, and VIN4 pins set the trip points for the
monitored supply rails.
The ADM1184 functional truth table is shown in Table 5. Note that
the functional operation described in Table 5 applies to the
operation both before and after the assertion of PWRGD.
Typically, the threshold voltage at each of the four adjustable
inputs (that is, VIN1, VIN2, VIN3, and VIN4) is 0.6 V. To
monitor a voltage greater than 0.6 V, connect a resistor divider
network to the circuit as depicted in Figure 17.
V
Table 5. Functional Truth Table
VIN1 VIN2 VIN3 VIN4 OUT1 OUT2 OUT3 PWRGD
01
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
12
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Low
Low
Low
Low
Low
Low
Low
Low
High
High
High
High
High
High
High
High
Low
Low
Low
Low
High
High
High
High
Low
Low
Low
Low
High
High
High
High
Low
Low
High
High
Low
Low
High
High
Low
Low
High
High
Low
Low
High
High
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
High
3.3V
2.9V
0V
t
4.6kΩ
ADM1184
2.9V SUPPLY
GIVES 0.6V
AT VIN1 PIN
VIN1
TO LOGIC
CORE
1.2kΩ
0.6V
Figure 17. Setting the Undervoltage Threshold
In this example, the VIN1 pin monitors a 3.3 V supply. An
external resistor divider scales this voltage down for monitoring
at the VIN1 pin. The resistor ratio is chosen so that the VIN1
voltage is 0.6 V when the main voltage rises to the preferred level
at startup (a voltage below the nominal 3.3 V level). R1 is 4.6 kΩ
and R2 is 1.2 kΩ; therefore, a voltage level of 2.9 V corresponds
to 0.6 V on the noninverting input of the first comparator (see
Figure 17).
1 <VTH = 0.
2 >VTH = 1.
Figure 18 and Figure 19 show waveforms that illustrate the
behavior of the ADM1184.
Rev. 0 | Page 9 of 12
ADM1184
V
TH
ALL INPUTS,
VINx
30µs
OUT1
OUT2
OUT3
190ms
PWRGD
Figure 18. Power-Up Waveforms
V
VIN1/VIN2/VIN3
TH
30µs
30µs
VIN4
V
TH
OUT1/OUT2/OUT3
30µs
30µs
PWRGD
190ms
190ms
Figure 19. Waveforms Showing Reaction to a Temporary Low Glitch on VIN1, VIN2, VIN3, or VIN4
Rev. 0 | Page 10 of 12
ADM1184
VOLTAGE MONITORING AND SEQUENCING APPLICATION
3.3V IN
2.5V OUT
1.8V OUT
1.2V OUT
VCC
IN
ADM1184
REGULATOR 1
2.5V OUT
1.8V OUT
VIN1
OUT1
OUT2
OUT3
EN
OUT
GND
VIN2
VIN3
IN
REGULATOR 2
EN
OUT
GND
VIN4
GND
PWRGD
IN
REGULATOR 3
1.2V OUT
EN
OUT
GND
POWER
GOOD
Figure 20. Voltage-Monitoring and Sequencing Application Diagram
Figure 20 depicts an application in which the ADM1184 monitors
four separate voltage rails, turns on three regulators in a sequence,
and generates a power-good signal to turn on a controller when
all power supplies are up and stable.
The 2.5 V output of this regulator begins to rise and is detected
by input Pin VIN2. When VIN2 detects the 2.5 V rail rising
above its voltage threshold point, it asserts OUT2, which turns
on Regulator 2. The same scheme is implemented with the other
input and output pins. Every rail that is turned on via an output
pin, OUTx, is monitored via an input pin, VIN(x + 1).
The main supply, in this case 3.3 V, powers up the device via the
VCC pin. The VIN1 pin monitors the main 3.3 V supply. In this
example application, OUT1 is connected to the enable pin of a
regulator. Before the voltage on VIN1 reaches 0.6 V, this output is
switched to ground, disabling Regulator 1.
When all four monitored supplies are above their programmed
threshold levels PWRGD asserts after a 190 ms (typical) delay.
When the main system voltage reaches 2.9 V, VIN1 detects 0.6 V.
This causes OUT1 to assert, which drives the enable pin of
Regulator 1 high, thus turning on its output.
Rev. 0 | Page 11 of 12
ADM1184
OUTLINE DIMENSIONS
3.10
3.00
2.90
10
6
5.15
4.90
4.65
3.10
3.00
2.90
1
5
PIN 1
0.50 BSC
0.95
0.85
0.75
1.10 MAX
0.80
0.60
0.40
8°
0°
0.15
0.05
0.33
0.17
SEATING
PLANE
0.23
0.08
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-187-BA
Figure 21. 10-Lead Mini Small Outline Package [MSOP]
(RM-10)
Dimensions shown in millimeters
ORDERING GUIDE
Model
ADM1184ARMZ1
ADM1184ARMZ-REEL71
Temperature Range
−40°C to +85°C
−40°C to +85°C
Package Description
Package Option
RM-10
RM-10
Branding
MB0
MB0
10-Lead Mini Small Outline Package [MSOP]
10-Lead Mini Small Outline Package [MSOP]
1 Z = RoHS Compliant Part.
©2008 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D07352-0-2/08(0)
Rev. 0 | Page 12 of 12
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