ADM1202-1AUJ [ADI]
IC 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO8, MO-193BA, TSOT-8, Power Management Circuit;型号: | ADM1202-1AUJ |
厂家: | ADI |
描述: | IC 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO8, MO-193BA, TSOT-8, Power Management Circuit 光电二极管 |
文件: | 总6页 (文件大小:297K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
TM
Simple Tracker
with Power-Good Comparator
Preliminary Technical Data
ADM1202
FEATURES
Enables Power Supply Tracking of multiple supplies
Up/Down Tracking limits Supply Differences to ~100mV
Capacitor Adjustable Slew Rate
On Board Charge Pump Fully enhances FET
Ability to Track Down Supplies (ADM1202-1)
Emergency Shutdown Feature (ADM1202-2)
In-Built Power Good Detector Circuitry
Functional Block Diagram
Q
1
V
V
IN
OUT
2.7V - 16V
V
CC
V
CHARGE
PUMP
FET
Packaged in tiny 8-Lead TSOT Package
APPLICATIONS
(ADM1202-1)
(ADM1202-2)
UP/DOWN
UP/STOP
GATE
FET
DRIVER
UP
DETECTOR
/ DOWN
LOGIC
Multi-Voltage Supply Rail Tracker
Telecoms and Datacom s Systems
Multi voltage Network Processors , FPGAs, ASICs, DSPs
PC/Server Applications
1nF
C
SLEW
SLEW RATE
CONTROL
V
OUTFB
R
1
PFI
GENERAL DESCRIPTION
POWER FAIL
DETECTOR
C
SLEW
ADM1202
The ADM1202 is a cascadable Simple Tracker TM device which
ensures that voltage rails track within ~100mV of each other in
multi supply systems. Any number of these devices can be
cascaded to form a multi supply tracking solution.
R
2
GND
PFO
Applications Diagram
The ADM1202 requires 2.7V to 16.5V on its Vcc pin to operate.
An on-board charge pump generates a high voltage GATE drive
to fully enhance FETs in the power path.
Q
1
5VIN
5VOUT
VCC
The Slew Rate of the ramp is adjustable via an external capacitor
on the CSLEW pin and can be programmed from 100V/s to
1000V/s. When multiple devices are cascaded the CSLEW pin of
ADM1202-1
PFO
GATE
5V POWER GOOD
V
cc
1nF
POWER ON/OFF
UP/DOWN
R
1
V
OUT
PFI
each subsequent device should be tied to the output rail(VOUTFB
)
C
SLEW
of the previous device to ensure that supply will track up and
down with the previous supply.
R
GND
2
C
SLEW
Q2
3.3VIN
3.3VOUT
The ADM1202 is offered in two variants. The ADM1202-1
features an UP/DOWNb pin and the ADM1202-2 features an
Up/STOPb pin. For both devices a high level on the this input
will initiate tracking power up sequence. A low on the
UP/DOWNb pin of the ADM1202-1 will initiate a tracking
down of the supply rails, while a low on the UP/STOPb pin of
the ADM1202-2 will initiate an emergency fast shutdown of all
supply rails simultaneously.
VCC
ADM1202-1
PFO
3.3V POWER GOOD
V
cc
GATE
1nF
UP/DOWN
R
R
V
3
OUT
PFI
C
SLEW
GND
4
Q3
2.8VIN
2.8VOUT
VCC
Power Fail Detector circuitry is also present. A resistor divider
on the PFI input will dictate what level the ADM1202 registers a
power fail on that supply. When a power fail is detected the
Power Fail Output (PFO) will assert.
ADM1202-1
PFO
GATE
2.8V POWER GOOD
V
cc
1nF
UP/DOWN
R
5
V
OUT
PFI
C
SLEW
GND
R
6
The ADM1202 is packaged in a tiny 8-pin TSOT package.
Rev. PrF
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.326.8703
www.analog.com
Analog Devices, Inc. All rights reserved.
2005
Preliminary Technical Data
ADM1202—SPECIFICATIONS
Table 1. VCC = Full Operating Range, TA = -40°C to +85°C, unless otherwise noted.
Parameter
Min
Typ
Max
Units
Conditions
VCC Pin
Operating Voltage Range Vcc
Undervoltage Lockout, VUVLO
UVLO Hysteresis
Switched Voltage Range
Quiesent Current
Up/Downb Pin
2.7
2.4
16.5
2.65
V
V
mV
V
2.525
25
Vcc Rising
0.65
16.5
1.0
0.65
mA
Input Threshold
Input Threshold Hysteresis
Input Current
0.58
-100
0.6
60
0.62
100
Rising
V
mV
nA
Power Fail Output, PFO Pin
Internal Pull Up
-5
µA
Output Low Voltage
Power Fail Detector, PFI Pin
PFI Detector Threshold
PFI Detector Hysterisis
PFI Input Current
CSLEW Pin
0.4
0.62
100
V
Note 1, Iload = 300uA
0.58
-100
0.6
10
V
mV
nA
-10
10
Slew up Current
µA
µA
V/V
V
V
V/s
Slew down Current
Tracking Gain
Minimum Tracking Voltage
Maximum Tracking voltage
Slew Rate
1
0.1
Vcc – 0.3
VSLEW/VOUTFB
100
1000
VOUTFB Pin
-10
0
10
Input Current
µA
V
Voltage Range
Vcc
GATE Pin
Gate Pullup Current
Gate Pulldown Current
Gate Pulldown Current
GATE Voltage, VGATE
12
12
2
Vslew – Vout > 100mV
Vout – Vslew > 100mV
ADM1202-2 only –vgate = 3.0V
VGATE – VCC; VCC = 2.7V
VGATE – VCC; VCC = 5.0V
VGATE – VCC; VCC = 16.5V
µA
µA
mA
V
V
V
5
6
5
6.5
8
6.5
10
12
10
NOTES:
1 Asserted when voltage on PFI pin exceeds threshold
Absolute Maximum Ratings
Table 2. ADM1202 Absolute Maximum Ratings
Junction Temperature
150°C
Parameter
Rating
VCC Pin
20V
PFI Pin
20V
UP/DOWNb, UP/STOPb
PFO Pin
20V
20V
CSLEW Pin
20V
Gate Pin
Vcc + 11V
20V
VOUTFB Pin
Power Dissipation
Storage Temperature
Operating Temperature Range
TBD
–65°C to +125°C
–40°C to +85°C
300°C
Lead Temperature Range
(Soldering 10 sec)
Rev. PrF | Page 2 of 6
Preliminary Technical Data
ADM1202
ENABLING A SINGLE SUPPLY
Q
1
5VIN
5VOUT
The ADM1202 requires a supply voltage of 2.7V to 16.5V on its
Vcc pin for operation. The device may be powered from the
input supply rail that is being switched or from an auxiliary
supply.
VCC
ADM1202-1
PFO
GATE
5V POWER GOOD
V
cc
1nF
POWER ON/OFF
UP/DOWN
R
1
V
OUT
PFI
C
SLEW
An internal charge pump ensures that the ADM1202 is capable
of fully enhancing an external FET via the GATE pin, turning
on the output. An external capacitor may be required on the
GATE node for stability.
R
GND
2
C
SLEW
Q2
3.3VIN
3.3VOUT
VCC
Power up can be externally initiated by driving the
ADM1202-1
PFO
3.3V POWER GOOD
V
cc
UP/DOWNb (ADM1202-1) or UP/STOPb (ADM1202–2)
logic pin high. A low on this pin will initiate a power down.
GATE
1nF
UP/DOWN
R
R
V
3
OUT
PFI
C
SLEW
The VOUTFB pin monitors the output voltage.
GND
4
A single ADM1202 device may be used where a single supply
rail is required to switch on at a controlled slew rate (see Figure
1). The value of the slew rate capacitor, CSLEW, will dictate the
slew rate of the GATE voltage at startup. An internal current
10µA source charges CSLEW and the GATE voltage is ramped at
the same rate.
Q3
2.8VIN
2.8VOUT
VCC
ADM1202-1
PFO
GATE
2.8V POWER GOOD
V
cc
1nF
UP/DOWN
R
5
V
OUT
PFI
Q
1
C
SLEW
3.3VIN
3.3VOUT
GND
R
6
ADM1202-2
V
cc
Figure 2. ADM1202 Solution for Tracking 3 Supplies
GATE
1nF
POWER ON/OFF
UP/STOP
R
A low-to-high transition on the UP/DOWNb or UP/STOPb pin
will initiate turn-on of the supplies. The ADM1202 will begin to
source current into the CSLEW capacitor. The voltages on all
GATE pins will begin to rise, or “track” up, at the same rate, as
set by the value of CSLEW. All supply voltages will remain within
100mV of the CSLEW voltage until they level off at their full
potentials.
1
V
OUTFB
PFI
C
SLEW
PFO
R
GND
2
C
SLEW
Figure 1. ADM1202 Switching on a Single Supply
A high-to-low on the UP/DOWNb pin of the ADM1202-1 will
initiate a tracking down of the supply rails. The voltages will
attempt to stay with ~100mV of each other assuming the load
current will be sufficient to discharge the capacitors at the
required rate. (See Figure 3.)
MULTI-SUPPLY TRACKING
The primary function of the ADM1202 is to provide a voltage
tracking solution for multiple supply rails. The implementation
in Figure 2 will provide this function. Each voltage rail has its
own ADM1202 device driving a FET.
A high-to-low on the UP/STOPb pin of the ADM1202-2 will
initiate an emergency fast shutdown of all supply rails
simultaneously. (See Figure 4.) Note that while the pass FETs
will be turned off immediately the actual discharge rate of each
supply rail will depend on the load.
The UP/DOWNb (ADM1202-1) or UP/STOPb (ADM1202-2)
pins of all devices can be driven by a single logic input which
will initiate a system power-up going high or power-down
going low.
In figure 2, the ADM1202 is configured to control the ramp of
the largest supply first. The output of the first device is
connected to the slew pin on the second device to allow the rate
of the first supply to control the rate of the second and so on.
Rev. PrF | Page 3 of 6
ADM1202
Preliminary Technical Data
UP/DOWN
V
cc
PFI/PFO COMPARATOR
5uA
3.3V
R
1
2
2.5V
1.5V
V
PFO
REF
+
-
PFI
OUTPUT
VOLTAGES
R
ADM1202
Figure 3. ADM1202-1 Power-Up and Power-Down Waveforms
Figure 5. ADM1202 Internal Power Fail Detector circuitry
UP/STOP
3.3V
SLEW RATE CONTROL
2.5V
1.5V
Voltage tracking is achieved by controlling the slew rate of a
rising or falling supply by an external capacitor on the SLEW
pin. Alternatively, this pin can be overdriven with a supply
which will result in the output following this supply. The gate
responds to maintain ~100mV between the VOUTFB pin and
the SLEW pin
OUTPUT
VOLTAGES
Figure 4. ADM1202-2 Power-Up and Power-Down Waveforms
ADM1202 POWER FAIL DETECTOR
Figure 4 shows the internal circuitry that enables the Power Fail
Detector on the ADM1202. An internal comparator with a
0.6V reference is used for detection. An external resistor
divider can be used to divide down a voltage rail to trigger a
power fail fault at the appropriate level. The Power Fail Output,
PFO, will assert high when a power fail condition occurs. Note
that there is no internal shutdown action from a Power Fail
event. A 10K is recommended on the PFO pin in order to
ensure it is either pulled up or down during powerup. The pin
will be in high impedance while Vcc < UVLO and may result in
invalid power fail signals.
Figure 6. Tracking up Waveforms
Rev. PrF | Page 4 of 6
Preliminary Technical Data
PIN CONFIGURATIONS
ADM1202
UP / DOWN
UP / STOP
GND
8
VCC
8
VCC
1
1
ADM1202-1AUJ
ADM1202-2AUJ
GND
PFI
PFI
2
3
4
2
3
4
7
6
5
7
6
5
TOP VIEW
(Not to Scale)
TOP VIEW
(Not to Scale)
GATE
CSLEW
PFO
GATE
CSLEW
PFO
VOUTFB
VOUTFB
PIN FUNCTIONAL DESCRIPTIONS
Pin No.
Name
Description
1
UP/DOWNb or UP/STOPb
Logic Pin. Drive high to initiate track up off all ADM1202 controlled rails. Drive low to
initiate track down of output (ADM1202-1) or a fast shutdown of output (ADM1202-2).
2
3
4
5
GND
Chip Ground Pin.
PFO
Logic Output. Asserts high when a power fail event occurs.
Monitors the Source of the external FET
VOUTFB
CSLEW
Connect to an external capacitor to control the slew rate of the output at turn on (and
turn-off for ADM1202-1).
6
7
GATE
PFI
Drives the GATE node of the external FET
Power Fail Detector Input Pin. A power fail fault is registered at a voltage of 0.6V rising
on this pin. An external resistor divider sets the output voltage that trips a power fail
fault.
8
VCC
Chip Power Supply, 2.7V to 16.5V.
Rev. PrF | Page 5 of 6
ADM1202
Preliminary Technical Data
OUTLINE DIMENSIONS
Figure XX. 8-Lead TSOT Package (UJ-8)—Dimensions shown in millimeters
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the
human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Table 3. Ordering Guide
Part Number
Variant
Temperature Package
–40°C to +85°C
Package Description
Package Outline
ADM1202-1AUJ
ADM1202-2AUJ
UP/DOWNb logic input
UP/STOPb logic input
TSOT
TSOT
UJ-8
UJ-8
–40°C to +85°C
2005
Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective companies.
Printed in the U.S.A.
PR05130-0-2/05(PrF)
Rev. PrF | Page 6 of 6
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