ADM1203-3AUJ [ADI]
IC 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO8, MO-193BA, TSOT-8, Power Management Circuit;
| 型号： | ADM1203-3AUJ |
| 厂家： | 
ADI |
| 描述： | IC 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO8, MO-193BA, TSOT-8, Power Management Circuit 光电二极管 |
| 文件： | 总8页 (文件大小：406K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TM
Simple Tracker with
Circuit Breaker
Preliminary Technical Data
ADM1203
every cycle determined by the capacitor on the TIMER pin and
the ADM1203-3/4 will latch off the gate until the
up/down(stop) pin is toggled.
FEATURES
Enables Power Supply Tracking of multiple Supplies
Monitors Current on Supply being Tracked
Up/Down Tracking limits Supply Differences to ~100mV
Capacitor Adjustable Slew Rate
The ADM1203 is packaged in a tiny 8-pin TSOT package.
On Board Charge Pump Fully enhances FET
Ability to Track Down Supplies (ADM1203-1/3)
Emergency Shutdown Feature (ADM1203-2/4)
Auto retry after Current Fault (ADM1203-1/2)
Latch off after Current Fault (ADM1203-3/4)
Packaged in tiny 8-Lead TSOT Package
Functional Block Diagram
R
s
Q
1
V
V
IN
OUT
V
CC
RS-
VCC
APPLICATIONS
Multi-Voltage Supply Rail Tracker
Telecoms and Datacom s Systems
Multi voltage Network Processors , FPGAs, ASICs, DSPs
PC/Server Applications
GATE
20nF
UP/DOWN
(ADM1203-1/3)
FET
DRIVER
UP/STOP
(ADM1203-2/4)
LOGIC
C
SLEW
SLEW RATE
CONTROL
V
OUT
C
TIMER
TIMER
GENERAL DESCRIPTION
CONTROL
C
SLEW
ADM1203
The ADM1203 is a cascadable Simple Tracker TM device which
ensures that voltage rails track within ~100mV of each other in
multi supply systems. Any number of these devices can be
cascaded to form a multi supply tracking solution.
C
GND
TIMER
Applications Diagram
The ADM1203 requires 2.7V to 16.5V on its Vcc pin to operate.
An on-board charge pump generates a high voltage GATE drive
to fully enhance FETs in the power path.
R
SENSE
Q
1
5VIN
5VOUT
RS-
V
cc
POWER ON/OFF
UP/DOWN
GATE
The Slew Rate of the ramp is adjustable via an external capacitor
on the CSLEW pin and can be programmed from 100V/s to
1000V/s. When multiple devices are cascaded the CSLEW pin of
each subsequent device should be tied to the output rail of the
previous device to ensure that supply will track up and down
with the previous supply.
1nF
ADM1203-1
SLEW
TIMER
TIMER
C
SLEW
V
OUTFB
GND
C
R
SENSE
Q
1
3.3VIN
3.3VOUT
RS-
V
cc
The ADM1203 is offered in four variants. The ADM1203-1/3
features an UP/DOWNb pin and the ADM1203-2/4 features an
Up/STOPb pin. The ADM1203-1/2 features an auto retry on
current RS fault and the ADM1203-3/4 latches off. For all
devices, a high level on the input will initiate tracking power up
sequence. A low on the UP/DOWNb pin of the ADM1203-1/3
will initiate a tracking down of the supply rails, while a low on
the UP/STOPb pin of the ADM1203-2/4 will initiate an
emergency fast shutdown of all supply rails simultaneously.
POWER ON/OFF
UP/DOWN
GATE
1nF
ADM1203-1
SLEW
V
OUTFB
TIMER
GND
C
TIMER
R
SENSE
Q
1
2.7VIN
2.7VOUT
RS-
V
cc
POWER ON/OFF
UP/DOWN
GATE
1nF
ADM1203-1
The ADM1203 features a current sense comparator, which
monitors for an over current condition on the supply. In the
event of an over current condition, a fault is flagged and the gate
is switched off. The ADM1203-1/2 will auto retry this fault at
SLEW
TIMER
TIMER
V
OUTFB
GND
C
Rev. PrD
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.326.8703
www.analog.com
Analog Devices, Inc. All rights reserved.
2005
ADM1203—SPECIFICATIONS
Preliminary Technical Data
Table 1. VCC = Full Operating Range, TA = -40°C to +85°C, unless otherwise noted.
Parameter
Min
Typ
Max
Units
Conditions
VCC Pin
Operating Voltage Range Vcc
Undervoltage Lockout, VUVLO
UVLO Hysteresis
Switched Voltage Range
Quiesent Current
Up/Downb Pin
2.7
2.4
16.5
2.65
V
V
mV
V
2.525
25
Vcc Rising
0.65
16.5
1.0
0.65
mA
Input Threshold
Input Threshold Hysteresis
Input Current
0.58
-100
0.6
60
0.62
100
Rising
V
mV
nA
RS- Pin
Hot Swap Voltage
RS- Pin Input Current, IINRS
2.7
TBD
10
16.5
TBD
30
V
-200
20
VRS = VCC, VHOTSWAP = 0.6 V,
VRS = VCC, VHOTSWAP > 2.2 V
VCB = (VCC – VRS) ,VHOTSWAP = 0.6 V
VCB = (VCC – VRS) ,VHOTSWAP > 2.2 V
VHOTSWAP = 0.6 V
µA
µA
Circuit Breaker Limit Voltage, VCB
Over Current Limit Voltage, VOC
34
44
40
50
47
47
53
53
60
53
66
59
mV
mV
mV
mV
VHOTSWAP > 2.2 V
CSLEW Pin
-10
10
Slew up Current
Slew down Current
Tracking Gain
Minimum Tracking Voltage
Maximum Tracking voltage
Slew Rate
µA
µA
V/V
V
V
V/s
1
0.1
Vcc – 0.3
VSLEW/VOUTFB
100
1000
VOUTFB Pin
-10
0
10
Input Current
µA
V
Voltage Range
Vcc
GATE Pin
Gate Pullup Current
Gate Pulldown Current
Gate Pulldown Current
GATE Voltage, VGATE
12
12
2
Vslew – Vout > 100mV
Vout – Vslew > 100mV
ADM1203-2 only –vgate = 3.0V
VGATE – VCC; VCC = 2.7V
VGATE – VCC; VCC = 5.0V
VGATE – VCC; VCC = 16.5V
µA
µA
mA
V
V
V
5
6
5
6.5
8
6.5
10
12
10
TIMER Pin
TIMER Pin Pull-Up Current, ITIMERUP
-4
-5
-60
2
-6
Initial Cycle, VTIMER = 1V
During Current Fault, VTIMER = 1V
After Current Fault, VTIMER = 1V
Normal Operation, VTIMER = 1V
TIMER rising
µA
µA
µA
µA
V
-48
-72
2.5
TIMER Pin Pull-Down Current, ITIMERDN
TIMER Pin Threshold High, VTIMERH
100
1.3
0.2
1.235
0.18
1.365
0.22
TIMER Pin Threshold Low, VTIMERL
NOTES:
TIMER falling
V
Rev. PrD | Page 2 of 8
Preliminary Technical Data
ADM1203
Absolute Maximum Ratings
Table 2. ADM1203 Absolute Maximum Ratings
Parameter
Rating
20V
VCC Pin
TIMER Pin
20V
UP/DOWNb, UP/STOPb
RS- Pin
20V
20V
CSLEW Pin
20V
Gate Pin
Vcc + 11V
20V
VOUTFB Pin
Power Dissipation
Storage Temperature
Operating Temperature Range
TBD
–65°C to +125°C
–40°C to +85°C
300°C
Lead Temperature Range
(Soldering 10 sec)
Junction Temperature
150°C
Rev. PrD | Page 3 of 8
ADM1203
Preliminary Technical Data
ENABLING A SINGLE SUPPLY
R
S
Q
1
5VIN
5VOUT
The ADM1203 requires a supply voltage of 2.7V to 16.5V on its
Vcc pin for operation. The device may be powered from the
input supply rail that is being switched or from an auxiliary
supply.
RS-
V
cc
POWER ON/OFF
UP/DOWN
GATE
1nF
ADM1203-1
An internal charge pump ensures that the ADM1203 is capable
of fully enhancing an external FET via the GATE pin, turning
on the output. An external capacitor may be required on the
GATE node for stability.
SLEW
TIMER
TIMER
C
V
OUTFB
SLEW
GND
C
R
S
Q
1
Power up can be externally initiated by driving the
3.3VIN
3.3VOUT
UP/DOWNb (ADM1203-1) or UP/STOPb (ADM1203–2)
logic pin high. A low on this pin will initiate a power down.
RS-
V
cc
POWER ON/OFF
UP/DOWN
The VOUTFB pin monitors the output voltage.
GATE
1nF
ADM1203-1
A single ADM1203 device may be used where a single supply
rail is required to switch on at a controlled slew rate (see Figure
1). The value of the slew rate capacitor, CSLEW, will dictate the
slew rate of the GATE voltage at startup. An internal current
10µA source charges CSLEW and the GATE voltage is ramped at
the same rate.
SLEW
TIMER
TIMER
V
OUTFB
GND
C
R
S
Q
1
2.7VIN
2.7VOUT
R
s
Q
RS-
1
V
cc
3.3VIN
3.3VOUT
POWER ON/OFF
UP/DOWN
GATE
1nF
ADM1203-1
RS-
V
cc
SLEW
TIMER
TIMER
ADM1203-2
V
OUTFB
GND
GATE
POWER ON/OFF
UP/STOP
C
V
C
OUT
SLEW
C
SLEW
C
TIMER
Figure 2. ADM1203 Solution for Tracking 3 Supplies
GND
C
TIMER
A low-to-high transition on the UP/DOWNb or UP/STOPb pin
will initiate turn-on of the supplies. The ADM1203 will begin to
source current into the CSLEW capacitor. The voltages on all
GATE pins will begin to rise, or “track” up, at the same rate, as
set by the value of CSLEW. All supply voltages will remain within
100mV of the CSLEW voltage until they level off at their full
potentials.
Figure 1. ADM1203 Switching on a Single Supply
MULTI-SUPPLY TRACKING
The primary function of the ADM1203 is to provide a voltage
tracking solution for multiple supply rails. The implementation
in Figure 2 will provide this function. Each voltage rail has its
own ADM1203 device driving a FET.
A high-to-low on the UP/DOWNb pin of the ADM1203-1 will
initiate a tracking down of the supply rails. The voltages will
attempt to stay with ~100mV of each other assuming the load
current will be sufficient to discharge the capacitors at the
required rate. (See Figure 3.)
The UP/DOWNb (ADM1203-1/3) or UP/STOPb (ADM1203-
2/4) pins of all devices can be driven by a single logic input
which will initiate a system power-up going high or power-
down going low.
A high-to-low on the UP/STOPb pin of the ADM1203-2 will
initiate an emergency fast shutdown of all supply rails
simultaneously. (See Figure 4.) Note that while the pass FETs
will be turned off immediately the actual discharge rate of each
supply rail will depend on the load.
In figure 2, the ADM1203 is configured to control the ramp of
the largest supply first. The output of the first device is
connected to the slew pin on the second device to allow the rate
of the first supply to control the rate of the second and so on.
Rev. PrD | Page 4 of 8
Preliminary Technical Data
ADM1203
CURRENT LIMIT CIRCUIT BREAKER FUNCTION
UP/DOWN
The ADM1203 features a current limiting circuit breaker.
When there is a sudden load current surge, such as a low
impedance fault, the bus supply voltage can drop significantly
to a point where the power to an adjacent card is
affected, causing system malfunctions. The ADM1203 fast
response current RS amplifier instantly limits current by
reducing the external FET GATE pin voltage. This
minimizes the bus supply voltage drop and permits power
budgeting and fault isolation without affecting neighboring
cards. A compensation circuit should be connected to
the GATE pin for current limit loop stability.
3.3V
2.5V
1.5V
OUTPUT
VOLTAGES
Figure 3. ADM1203-1 Power-Up and Power-Down Waveforms
CALCULATING CURRENT LIMIT
The nominal fault current limit is determined by a RS
resistor connected between VCC and the RS- pin as
given by the equation below:
UP/STOP
3.3V
2.5V
1.5V
ILIMIT(NOM) = VCB(NOM) / RRS
(1)
OUTPUT
VOLTAGES
The minimum load current is given by Equation 2:
ILIMIT(MIN) = VCB(MIN) / RRS(MAX) (2)
Figure 4. ADM1203-2 Power-Up and Power-Down Waveforms
The maximum load current is given by Equation 3:
ILIMIT(MAX) = VCB(MAX) / RRS(MIN) (3)
SLEW RATE CONTROL
Voltage tracking is achieved by controlling the slew rate of a
rising or falling supply by an external capacitor on the SLEW
pin. Alternatively, this pin can be overdriven with a supply
which will result in the output following this supply. The gate
responds to maintain ~100mV between the VOUTFB pin and
the SLEW pin
Note: The power rating of the RS resistor should be rated at the
fault current level. The RS resistor power rating must exceed
VCB(MAX)2 /RRS(MIN).
Figure 6. Tracking up Waveforms
Rev. PrD | Page 5 of 8
ADM1203
Preliminary Technical Data
TIMER FUNCTION
V
IN
The TIMER pin handles several key functions with an external
capacitor, CTIMER. There are two comparator thresholds:
COMP1 (0.2V) and COMP2 (1.3V). The four timing current
sources are:
V
ON
•
•
•
•
5µA pull-up
V
TIMER
60µA pull-up
2µA pull-down
100µA pull-down
V
GATE
The 100µA is a non-ideal current source approximating a 7k
resistor below 0.4V.
V
OU T
INITIAL
CYCLE
NORMAL
CYCLE
INITIAL TIMING CYCLE
START -UP
CYCLE
RESET
MODE
When the card is being inserted into the bus connector, the
long pins mate first which brings up the supply VIN at time
point 1 of Figure 7. The ADM1203 is in reset mode as the ON
pin is low. GATE is pulled low and the TIMER pin is pulled low
with a 100µA source. At time point 2, the short pin makes
contact and ON is pulled high. At this instant, a start-up check
requires that the supply voltage be above UVLO, the ON pin
beabove1.3Vand the TIMER pin voltage be less than 0.2V.
When these three conditions are fulfilled, the initial cycle
begins and the TIMER pin is pulled high with 5µA. At time
point 3, the TIMER reaches the COMP2 threshold and the first
portion of the initial cycle ends. The 100µA current source then
pulls down the TIMER pin until it reaches 0.2V at time point 4.
The initial cycle delay (time point 2 to time point 4) is related to
CTIMER by equation:
Figure 7: Normal Start-up
V
IN
60µA
5µA
V
ON
2µA
100µA
100µA
V
TIMER
V
GATE
V
TH
tINITIAL ~= 272.9 x CTIMER ms/uF
(4)
V
OUT
When the initial cycle terminates, a start-up cycle is activated
and the GATE pin ramps high. The TIMER pin continues to be
pulled down towards ground.
I
RSENSE
NORMAL
CYCLE
INITIAL
CYCLE
START-UP
CYCLE
RESET
MODE
Figure 8: Current Limiting at Start-up
Rev. PrD | Page 6 of 8
Preliminary Technical Data
PIN CONFIGURATIONS
ADM1203
TIMER
8
VCC
8
VCC
TIMER
GND
1
1
ADM1203-1AUJ
ADM1203-2AUJ
RS-
GND
2
3
4
2
3
4
7
6
5
7
6
5
RS-
TOP VIEW
(Not to Scale)
TOP VIEW
(Not to Scale)
UP / DOWN
VOUT
UP / STOP
VOUT
GATE
CSLEW
GATE
CSLEW
PIN FUNCTIONAL DESCRIPTIONS
Pin No.
Name
Description
1
TIMER
Timer Input Pin. An external capacitor CTIMER sets a 272.9ms/µF initial timing delay and a
21.7ms/µF circuit breaker delay. The GATE pin turns off whenever the TIMER pin is pulled
beyond the upper threshold, such as for overvoltage detection with an external zener.
2
3
GND
Chip Ground Pin.
UP/DOWNb or UP/STOPb
Logic Pin. Drive high to initiate track up off all ADM1203 controlled rails. Drive low to
initiate track down of all rails (ADM1203-1) or a fast shutdown of all rails (ADM1203-2).
4
5
VOUT
Monitors the Source of the external FET
CSLEW
Connect to an external capacitor to control the slew rate of the of the GATE at turn on
(and turn-off for ADM1203-1).
6
7
GATE
RS-
Drives the GATE node of the external FET
Current Limit Sense Input Pin. A sense resistor between the Vcc and RS- pins sets the
analog current limit. In overload, the EA controls the external FET gate to maintain the
SENSE voltage at 47mV. When the EA is maintaining current limit, the TIMER circuit
breaker mode is activated. The current limit loop/circuit breaker mode can be disabled
by connecting the Vcc pin and RS- pin together..
8
VCC
Chip Power Supply, 2.7V to 16.5V.
Rev. PrD | Page 7 of 8
ADM1203
Preliminary Technical Data
OUTLINE DIMENSIONS
Figure XX. 8-Lead TSOT Package (UJ-8)—Dimensions shown in millimeters
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the
human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Table 3. Ordering Guide
Part Number
Variant
Temperature Package
–40°C to +85°C
Package Description
Package Outline
ADM1203-1AUJ
ADM1203-2AUJ
ADM1203-3AUJ
ADM1203-4AUJ
UP/DOWNb logic input
UP/STOPb logic input
UP/DOWNb logic input
UP/STOPb logic input
TSOT
TSOT
TSOT
TSOT
UJ-8
UJ-8
UJ-8
UJ-8
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
2005
Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective companies.
Printed in the U.S.A.
PR05140-0-2/05(PrD)
Rev. PrD | Page 8 of 8
相关型号：
ADM1203-4AUJ
IC 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO8, MO-193BA, TSOT-8, Power Management Circuit
ADI
ADM1232AARM-REEL
IC 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO8, MICRO, SOIC-8, Power Management Circuit
ADI
©2020 ICPDF网 联系我们和版权申明