ADMV1009 [ADI]
12.7 GHz to 15.4 GHz, GaAs, MMIC, Upper Sideband, Differential Upconverter;
| 型号： | ADMV1009 |
| 厂家： | 
ADI |
| 描述： | 12.7 GHz to 15.4 GHz, GaAs, MMIC, Upper Sideband, Differential Upconverter |
| 文件： | 总23页 (文件大小：435K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
12.7 GHz to 15.4 GHz, GaAs, MMIC,
Upper Sideband, Differential Upconverter
ADMV1009
Data Sheet
FEATURES
FUNCTIONAL BLOCK DIAGRAM
VGMIX VGRF VDRF
RF output frequency range: 12.7 GHz to 15.4 GHz
IF input frequency range: 2.8 GHz to 4 GHz
LO input frequency range: 9 GHz to 12.6 GHz
Matched 50 Ω RF output, LO input, and IF input
20 dB of image rejection
29
7
31
ADMV1009
IF1 14
IF2 11
3
RFOUT
GND
2
32-terminal, 4.9 mm × 4.9 mm LCC package
10
15
18
GND
GND
APPLICATIONS
GND
Point to point microwave radios
19
26
27
Radars and electronic warfare systems
Instrumentation, automatic test equipment
LOIN VGLO VDLO
Figure 1.
GENERAL DESCRIPTION
The ADMV1009 is a compact, gallium arsenide (GaAs) design,
monolithic microwave integrated circuit (MMIC), upper sideband
(USB), differential, upconverter in a RoHS compliant package
optimized for point to point microwave radio designs that
operate in the 12.7 GHz to 15.4 GHz frequency range.
inputs are provided, and an external 180° balun is needed to
drive the IF pins differentially. The ADMV1009 is a much
smaller alternative to hybrid style single sideband (SSB)
upconverter assemblies and eliminates the need for wire
bonding by allowing the use of surface-mount manufacturing
assemblies.
The ADMV1009 provides 21 dB of conversion gain with 20 dB
of sideband rejection. The ADMV1009 uses a radio frequency (RF)
amplifier preceded by a passive, double balanced mixer, where a
driver amplifier drives the local oscillator (LO). IF1 and IF2 mixer
The ADMV1009 upconverter comes in a compact, thermally
enhanced, 4.9 mm × 4.9 mm LCC package. The ADMV1009
operates over the −40°C to +85°C temperature range.
Rev. B
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Technical Support
©2017-2018 Analog Devices, Inc. All rights reserved.
www.analog.com
ADMV1009
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Leakage Performance................................................................. 13
Return Loss Performance.......................................................... 14
Spurious Performance ............................................................... 15
M × N Spurious Performance................................................... 17
Theory of Operation ...................................................................... 18
LO Driver Amplifier .................................................................. 18
Mixer............................................................................................ 18
RF Amplifier ............................................................................... 18
Applications Information.............................................................. 19
Typical Application Circuit....................................................... 19
Evaluation Board Information ................................................. 20
Bill of Materials........................................................................... 22
Outline Dimensions....................................................................... 23
Ordering Guide .......................................................................... 23
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 4
Thermal Resistance ...................................................................... 4
ESD Caution.................................................................................. 4
Pin Configuration and Function Descriptions............................. 5
Typical Performance Characteristics ............................................. 6
IF Frequency = 2.8 GHz .............................................................. 6
IF Frequency = 3.4 GHz .............................................................. 8
IF Frequency = 4 GHz ............................................................... 10
IF Bandwidth .............................................................................. 12
REVISION HISTORY
4/2018—Rev. A to Rev. B
Changes to Thermal Resistance Section and Table 3................... 4
Changes to Figure 24, Figure 27, Figure 24 Caption, and Figure 27
Caption ............................................................................................ 10
Changes to Figure 35 and Figure 36............................................. 12
Changes to Figure 37 through Figure 40..................................... 13
Changes to Figure 47 through Figure 52..................................... 15
Changes to Figure 53 through Figure 58..................................... 16
Changes to Table 5 and M × N Spurious Performance Section .... 17
Change to Theory of Operation Section ..................................... 18
Changes to Figure 59...................................................................... 19
Changes to Power On Sequence Section and Power Off
1/2018—Rev. 0 to Rev. A
Change to Product Title................................................................... 1
Changes to General Description and Figure 1 ............................. 1
Changes to Table 1............................................................................ 3
Changes to Table 2............................................................................ 4
Added Thermal Resistance Section and Table 3; Renumbered
Sequentially ....................................................................................... 4
Changes to Figure 2 and Table 4..................................................... 5
Changes to Figure 4, Figure 7, Figure 4 Caption, and Figure 7
Caption............................................................................................... 6
Changes to Figure 14, Figure 17, Figure 14 Caption, and Figure 17
Caption............................................................................................... 8
Sequence Section............................................................................ 20
Change to Table 6 ........................................................................... 22
Changes to Ordering Guide.......................................................... 23
10/2017—Revision 0: Initial Version
Rev. B | Page 2 of 23
Data Sheet
ADMV1009
SPECIFICATIONS
VDRF = 5 V, V D L O = 5 V, I D L O = 60 mA, IDRF = 250 mA, LO = −4 dBm ≤ LO ≤ +4 dBm, −40°C ≤ TA ≤ +85°C; data taken with
Mini-Circuits NCS1-422+, RF transformer as upper sideband, unless otherwise noted.
Table 1.
Parameter
Symbol Test Conditions/Comments
Min Typ
Max Unit
RF OUTPUT FREQUENCY RANGE
INPUT FREQUENCY RANGE
Local Oscillator
Intermediate Frequency
LO AMPLITUDE
IF INPUT POWER
PERFORMANCE
Conversion Gain
Noise Figure
Output Third-Order Intercept
Output 1 dB Compression Point
Sideband Rejection
Leakage
12.7
15.4 GHz
LO
IF
9
2.8
12.6 GHz
4
GHz
dBm
dBm
−4
0
+4
0
−25
With balun
15
21
14
35
25
60
25
dB
NF
IP3
P1dB
16.5 dB
dBm
At output power (POUT) = 8 dBm
31
23
20
dBm
dBc
LO to RF
LO to IF
−30
−25
−10
−20
dBm
dBm
RF Output
IF = 0 dBm
2× LO − 2× IF Spur
4× IF Spur
45
70
52
75
dBc
dBc
Return Loss
RF Output
LO Input
IF Input
12
12
11
10
10
10
dB
dB
dB
−4 dBm ≤ LO ≤ +4 dBm
POWER INTERFACE
Amplifier Voltage
RF
VDRF
VDLO
5
5
V
V
LO
Gate Voltage
RF
LO
Mixer Voltage
Amplifier Current
RF
VGRF
VGLO
VGMIX
−1.5
−1.5
−0.5
−0.5
V
V
V
−1.1
IDRF
IDLO
Adjust VGRF between −1.5 V and −0.5 V to achieve IDRF
Adjust VGLO between −1.5 V and −0.5 V to achieve IDLO
250
60
300
mA
mA
LO
Gate Current
RF
LO
IGRF
IGLO
< 3
< 1
1.55
mA
mA
W
Total Power
Rev. B | Page 3 of 23
ADMV1009
Data Sheet
ABSOLUTE MAXIMUM RATINGS
THERMAL RESISTANCE
Table 2.
Thermal performance is directly linked to printed circuit board
(PCB) design and operating environment. Careful attention to
PCB thermal design is required.
Parameter
Rating
Supply Voltage
VDRF
6 V
VDLO
VGLO
VGRF
VGMIX
6 V
θJA is thermal resistance, junction to ambient (°C/W), and θJC is
thermal resistance, junction to case (°C/W).
−2 V to 0 V
−2 V to 0 V
−2 V to 0 V
175°C
Table 3.
Package Type
1
1
θJA
33.4
θJC
Unit
Maximum Junction Temperature
Lifetime at Maximum Junction Temperature >1 million hours
E-32-1
31
°C/W
Maximum Power Dissipation
Operating Temperature Range
Storage Temperature Range
Moisture Sensitivity Level (MSL) Rating
Input Power
2.9 W
1 See JEDEC standard JESD51-2 for additional information on optimal thermal
impedance (printed circuit board (PCB) within 3 × 3 vias)
−40°C to +85°C
−65°C to +150°C
MSL3
ESD CAUTION
LO
IF
15 dBm
15 dBm
260°C
Lead Temperature Range (Soldering 60 sec)
Electrostatic Discharge (ESD) Sensitivity
Human Body Model (HBM)
Field Induced Charged Device Model
(FICDM)
750 V
750 V
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
Rev. B | Page 4 of 23
Data Sheet
ADMV1009
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
PIN1
INDICATOR
NIC
GND
RFOUT
NIC
NIC
NIC
VGRF
NIC
1
2
3
4
5
6
7
8
24 NIC
23
22 NIC
21 NIC
NIC
ADMV1009
TOP VIEW
20
19
NIC
LOIN
(Not to Scale)
18 GND
17 NIC
NOTES
1. NIC = NOT INTERNALLY CONNECTED. IT IS
RECOMMENDED TO GROUND THESE PINS
ON THE PCB.
2. EXPOSED PAD. EXPOSED PAD MUST BE
CONNECTED TO GND. GOOD RF AND THERMAL
GROUNDING IS RECOMMENDED.
Figure 2. Pin Configuration
Table 4. Pin Function Descriptions
Pin No.
Mnemonic Description
1, 4 to 6, 8, 9, 12, 13, 16,
17, 20 to 25, 28, 30, 32
NIC
Not Internally Connected. It is recommended to ground these pins on the PCB.
2, 10, 15, 18
3
7
GND
RFOUT
VGRF
Ground. These pins are grounded internally and must also be grounded on the PCB.
RF Output. This pin is ac-coupled internally and matched to 50 Ω, single-ended.
Power Supply Voltage for the Gate of the RF Amplifier. Refer to the Applications Information
section for the required external components and biasing.
11, 14
IF2, IF1
Differential IF Inputs. These pins are matched to 50 Ω and are ac-coupled. No external dc block is
required.
19
26
LOIN
VGLO
Local Oscillator Input. This pin is ac-coupled and matched to 50 Ω.
Power Supply Voltage for the Gate of the LO Amplifier. Refer to the Applications Information
section for the required external components and biasing.
27
29
31
VDLO
VGMIX
VDRF
EPAD
Power Supply Voltage for the LO Amplifier. Refer to the Applications Information section for the
required external components and biasing.
Power Supply Voltage for the Mixer. This pin is a high impedance port. Refer to the Applications
Information section for the required external components and biasing.
Power Supply Voltage for the RF Amplifier. Refer to the Applications Information section for the
required external components and biasing.
Exposed pad. The exposed pad must be connected to GND. Good RF and thermal grounding is
recommended.
Rev. B | Page 5 of 23
ADMV1009
Data Sheet
TYPICAL PERFORMANCE CHARACTERISTICS
IF FREQUENCY = 2.8 GHz
VDRF = 5 V, V D L O = 5 V, I D L O = 60 mA, IDRF = 250 mA, LO = −4 dBm ≤ LO ≤ +4 dBm, −40°C ≤ TA ≤ +85°C, data taken with
Mini-Circuits NCS1-422+, RF transformer as upper sideband, unless otherwise noted.
25
20
15
10
5
25
20
15
10
5
T
T
T
= +85°C
= +25°C
= –40°C
+4dBm
0dBm
–4dBm
A
A
A
0
12.0
0
12.0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
RF FREQUENCY (GHz)
RF FREQUENCY (GHz)
Figure 6. Conversion Gain vs. RF Frequency at Various LO Powers
Figure 3. Conversion Gain vs. RF Frequency at Various Temperatures
80
80
70
60
50
40
30
70
60
50
40
30
+4dBm
0dBm
–4dBm
10
T
T
T
= +85°C
= +25°C
= –40°C
A
A
A
20
20
10
0
0
12.0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
12.0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
RF FREQUENCY (GHz)
RF FREQUENCY (GHz)
Figure 4. Sideband Rejection vs. RF Frequency at Various Temperatures
Figure 7. Sideband Rejection vs. RF Frequency at Various LO Powers
50
45
40
35
30
25
20
50
45
40
35
30
25
20
15
10
5
T
T
T
= +85°C
= +25°C
= –40°C
15
10
5
+4dBm
0dBm
–4dBm
A
A
A
0
12.0
0
12.0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
RF FREQUENCY (GHz)
RF FREQUENCY (GHz)
Figure 5. Output IP3 vs. RF Frequency at Various Temperatures
Figure 8. Output IP3 vs. RF Frequency at Various LO Powers
Rev. B | Page 6 of 23
Data Sheet
ADMV1009
30
28
26
24
22
30
28
26
24
22
20
18
16
T
T
T
= +85°C
= +25°C
= –40°C
+4dBm
0dBm
–4dBm
20
18
16
A
A
A
12.0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
12.0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
RF FREQUENCY (GHz)
RF FREQUENCY (GHz)
Figure 9. Output P1dB vs. RF Frequency at Various Temperatures
Figure 11. Output P1dB vs. RF Frequency at Various LO Powers
18
17
16
15
14
13
12
18
17
16
15
14
13
12
11
10
9
11
10
9
T
T
T
= +85°C
= +25°C
= –40°C
+4dBm
0dBm
–4dBm
A
A
A
8
12.0
8
12.0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
RF FREQUENCY (GHz)
RF FREQUENCY (GHz)
Figure 10. Noise Figure vs. RF Frequency at Various Temperatures
Figure 12. Noise Figure vs. RF Frequency at Various LO Powers
Rev. B | Page 7 of 23
ADMV1009
Data Sheet
IF FREQUENCY = 3.4 GHz
VDRF = 5 V, V D L O = 5 V, I D L O = 60 mA, IDRF = 250 mA, LO = −4 dBm ≤ LO ≤ +4 dBm, −40°C ≤ TA ≤ +85°C, data taken with
Mini-Circuits NCS1-422+, RF transformer as upper sideband, unless otherwise noted.
25
20
15
10
5
25
20
15
10
5
T
T
T
= +85°C
= +25°C
= –40°C
+4dBm
0dBm
–4dBm
A
A
A
0
12.0
0
12.0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
RF FREQUENCY (GHz)
RF FREQUENCY (GHz)
Figure 13. Conversion Gain vs. RF Frequency at Various Temperatures
Figure 16. Conversion Gain vs. RF Frequency at Various LO Powers
90
80
70
60
50
40
30
90
80
70
60
50
40
30
+4dBm
0dBm
–4dBm
10
T
T
T
= +85°C
= +25°C
= –40°C
A
A
A
20
10
0
20
0
12.0
12.0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
RF FREQUENCY (GHz)
RF FREQUENCY (GHz)
Figure 14. Sideband Rejection vs. RF Frequency at Various Temperatures
Figure 17. Sideband Rejection vs. RF Frequency at Various LO Powers
50
45
40
35
30
25
20
50
45
40
35
30
25
20
15
10
5
15
T
T
T
= +85°C
= +25°C
= –40°C
A
A
A
+4dBm
0dBm
–4dBm
10
5
0
12.0
0
12.0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
RF FREQUENCY (GHz)
RF FREQUENCY (GHz)
Figure 15. Output IP3 vs. RF Frequency at Various Temperatures
Figure 18. Output IP3 vs. RF Frequency at Various LO Powers
Rev. B | Page 8 of 23
Data Sheet
ADMV1009
30
28
26
24
22
30
28
26
24
22
20
18
16
+4dBm
0dBm
–4dBm
T
T
T
= +85°C
= +25°C
= –40°C
20
18
16
A
A
A
12.0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
12.0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
RF FREQUENCY (GHz)
RF FREQUENCY (GHz)
Figure 19. Output P1dB vs. RF Frequency at Various Temperatures
Figure 21. Output P1dB vs. RF Frequency at Various LO Powers
18
17
16
15
14
13
12
18
17
16
15
14
13
12
11
10
9
11
T
T
T
= +85°C
= +25°C
= –40°C
A
A
A
+4dBm
0dBm
–4dBm
10
9
8
12.0
8
12.0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
RF FREQUENCY (GHz)
RF FREQUENCY (GHz)
Figure 20. Noise Figure vs. RF Frequency at Various Temperatures
Figure 22. Noise Figure vs. RF Frequency at Various LO Powers
Rev. B | Page 9 of 23
ADMV1009
Data Sheet
IF FREQUENCY = 4 GHz
VDRF = 5 V, V D L O = 5 V, IDLO = 60 mA, IDRF = 250 mA, LO = −4 dBm ≤ LO ≤ +4 dBm, −40°C ≤ TA ≤ +85°C, data taken with
Mini-Circuits NCS1-422+, RF transformer as upper sideband, unless otherwise noted.
25
20
15
10
5
25
20
15
10
5
T
T
T
= +85°C
= +25°C
= –40°C
A
A
A
+4dBm
0dBm
–4dBm
0
12.0
0
12.0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
RF FREQUENCY (GHz)
RF FREQUENCY (GHz)
Figure 23. Conversion Gain vs. RF Frequency at Various Temperatures
Figure 26. Conversion Gain vs. RF Frequency at Various LO Powers
100
90
80
70
60
50
40
100
90
80
70
60
50
40
30
20
10
0
T
T
T
= +85°C
= +25°C
= –40°C
30
A
A
A
+4dBm
0dBm
–4dBm
20
10
0
12.0
12.0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
RF FREQUENCY (GHz)
RF FREQUENCY (GHz)
Figure 24. Sideband Rejection vs. RF Frequency at Various Temperatures
Figure 27. Sideband Rejection vs. RF Frequency at Various LO Powers
50
45
40
35
30
25
20
50
45
40
35
30
25
20
15
10
5
15
T
T
T
= +85°C
= +25°C
= –40°C
A
A
A
+4dBm
0dBm
–4dBm
10
5
0
12.0
0
12.0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
RF FREQUENCY (GHz)
RF FREQUENCY (GHz)
Figure 25. Output IP3 vs. RF Frequency at Various Temperatures
Figure 28. Output IP3 vs. RF Frequency at Various LO Powers
Rev. B | Page 10 of 23
Data Sheet
ADMV1009
30
28
26
24
22
30
28
26
24
22
20
18
16
+4dBm
0dBm
–4dBm
T
T
T
= +85°C
= +25°C
= –40°C
20
18
16
A
A
A
12.0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
12.0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
RF FREQUENCY (GHz)
RF FREQUENCY (GHz)
Figure 29. Output P1dB vs. RF Frequency at Various Temperatures
Figure 31. Output P1dB vs. RF Frequency at Various LO Powers
18
17
16
15
14
13
12
18
17
16
15
14
13
12
11
10
9
11
T
T
T
= +85°C
= +25°C
= –40°C
A
A
A
+4dBm
0dBm
–4dBm
10
9
8
12.0
8
12.0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
RF FREQUENCY (GHz)
RF FREQUENCY (GHz)
Figure 32. Noise Figure vs. RF Frequency at Various LO Powers
Figure 30. Noise Figure vs. RF Frequency at Various Temperatures
Rev. B | Page 11 of 23
ADMV1009
Data Sheet
IF BANDWIDTH
VDRF = 5 V, V D L O = 5 V, I D L O = 60 mA, IDRF = 250 mA, LO = −4 dBm ≤ LO ≤ +4 dBm at 10.2 GHz, −40°C ≤ TA ≤ +85°C, data taken
with Mini-Circuits NCS1-422+, RF transformer as upper sideband, unless otherwise noted.
25
20
15
10
5
25
20
15
10
5
T
T
T
= +85°C
= +25°C
= –40°C
A
A
A
+4dBm
0dBm
–4dBm
0
2.0
0
2.0
2.2
2.4
2.6
2.8
3.0
3.2
3.4
3.6
3.8
4.0
2.2
2.4
2.6
2.8
3.0
3.2
3.4
3.6
3.8
4.0
IF FREQUENCY (GHz)
IF FREQUENCY (GHz)
Figure 33. Conversion Gain vs. IF Frequency at Various Temperatures
Figure 35. Conversion Gain vs. IF Frequency at Various LO Powers
50
45
40
35
30
25
20
50
45
40
35
30
25
20
15
10
5
15
T
T
T
= +85°C
= +25°C
= –40°C
A
A
A
+4dBm
0dBm
–4dBm
10
5
0
2.0
0
2.0
2.2
2.4
2.6
2.8
3.0
3.2
3.4
3.6
3.8
4.0
2.2
2.4
2.6
2.8
3.0
3.2
3.4
3.6
3.8
4.0
IF FREQUENCY (GHz)
IF FREQUENCY (GHz)
Figure 34. Output IP3 vs. IF Frequency at Various Temperatures
Figure 36. Output IP3 vs. IF Frequency at Various LO Powers
Rev. B | Page 12 of 23
Data Sheet
ADMV1009
LEAKAGE PERFORMANCE
VDRF = 5 V, V D L O = 5 V, I D L O = 60 mA, IDRF = 250 mA, LO = −4 dBm ≤ LO ≤ +4 dBm, −40°C ≤ TA ≤ +85°C, data taken with
Mini-Circuits NCS1-422+, RF transformer as upper sideband, unless otherwise noted.
0
–10
–20
–30
–40
–50
–60
0
–10
–20
–30
–40
–50
–60
+4dBm
0dBm
–4dBm
T
T
T
= +85°C
= +25°C
= –40°C
A
A
A
8000
9000
10000
11000
12000
13000
14000
8000
9000
10000
11000
12000
13000
14000
LO FREQUENCY (MHz)
LO FREQUENCY (MHz)
Figure 37. LO Leakage at RFOUT vs. LO Frequency at Various Temperatures
Figure 39. LO Leakage at RFOUT vs. LO Frequency at Various LO Powers
0
0
+4dBm
0dBm
–4dBm
–10
–20
–30
–40
–50
–60
–70
T
T
T
= +85°C
= +25°C
= –40°C
–10
–20
–30
–40
–50
–60
–70
A
A
A
8000
9000
10000
11000
12000
13000
14000
8000
9000
10000
11000
12000
13000
14000
LO FREQUENCY (MHz)
LO FREQUENCY (MHz)
Figure 38. LO Leakage at IF Input vs. LO Frequency at Various
Temperatures
Figure 40. LO Leakage at IF Input vs. LO Frequency at Various LO Powers
Rev. B | Page 13 of 23
ADMV1009
Data Sheet
RETURN LOSS PERFORMANCE
VDRF = 5 V, V D L O = 5 V, I D L O = 60 mA, IDRF = 250 mA, LO = −4 dBm ≤ LO ≤ +4 dBm, −40°C ≤ TA ≤ +85°C, data taken with
Mini-Circuits NCS1-422+, RF transformer as upper sideband, unless otherwise noted. Measurement includes trace loss and RF connector loss.
0
0
+4dBm
0dBm
–4dBm
T
T
T
= +85°C
= +25°C
= –40°C
A
A
A
–5
–5
–10
–15
–20
–25
–30
–35
–40
–45
–50
–10
–15
–20
–25
–30
–35
–40
–45
12.0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
12.0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
RF FREQUENCY (GHz)
RF FREQUENCY (GHz)
Figure 41. RF Output Return Loss vs. RF Frequency at Various Temperatures
Figure 44. RF Output Return Loss vs. RF Frequency at Various LO Powers
0
–5
0
–5
–10
–15
–20
–25
–30
–10
–15
–20
–25
–30
T
T
T
= +85°C
= +25°C
= –40°C
–35
–40
–45
–50
–35
A
A
A
+4dBm
0dBm
–4dBm
–40
–45
–50
8
9
10
11
12
13
14
8
9
10
11
12
13
14
LO FREQUENCY (GHz)
LO FREQUENCY (GHz)
Figure 42. LO Input Return Loss vs. LO Frequency at Various Temperatures
Figure 45. LO Input Return Loss vs. LO Frequency at Various LO Powers
0
0
–5
–10
–15
–5
–10
–15
T
T
T
= +85°C
= +25°C
= –40°C
A
A
A
+4dBm
0dBm
–20
–20
–4dBm
–25
1.0
–25
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
IF FREQUENCY (GHz)
IF FREQUENCY (GHz)
Figure 43. IF Input Return Loss vs. IF Frequency at Various Temperatures
Figure 46. IF Input Return Loss vs. IF Frequency at Various LO Powers
Rev. B | Page 14 of 23
Data Sheet
ADMV1009
SPURIOUS PERFORMANCE
VDRF = 5 V, VDLO = 5 V, IDLO = 60 mA, IDRF = 250 mA, LO = 0 dBm, −40°C ≤ TA ≤ +85°C, data taken with Mini-Circuits NCS1-422+,
RF transformer as upper sideband, unless otherwise noted.
90
80
70
60
50
40
30
20
10
0
90
80
70
60
50
40
30
20
10
0
T
T
T
= +85°C
= +25°C
= –40°C
T
T
T
= +85°C
= +25°C
= –40°C
A
A
A
A
A
A
RF FREQUENCY (GHz)
RF FREQUENCY (GHz)
Figure 47. 2× LO − 2× IF Leakage vs. RF Frequency at Various
Temperatures, IF = 3.1 GHz, −10 dBm
Figure 50. 2× LO − 2× IF Leakage vs. RF Frequency at Various
Temperatures, IF = 3.1 GHz, 0 dBm
90
90
80
70
60
50
40
30
–40°C
+25°C
+85°C
80
70
60
50
40
30
20
10
0
T
T
T
= +85°C
= +25°C
= –40°C
A
A
A
20
10
0
13000
13100
13200
13300
13400
13500
RF FREQUENCY (MHz)
RF FREQUENCY (GHz)
Figure 51. 2× LO − 2× IF Leakage vs RF Frequency at Various
Temperatures, IF = 3.3 GHz, 0 dBm
Figure 48. 2× LO − 2× IF Leakage vs. RF Frequency at Various
Temperatures, IF = 3.3 GHz, −10 dBm
90
80
70
60
50
40
30
90
80
70
60
50
40
30
T
T
T
= +85°C
= +25°C
= –40°C
T
T
T
= +85°C
= +25°C
= –40°C
A
A
A
A
A
A
20
10
0
20
10
0
RF FREQUENCY (GHz)
RF FREQUENCY (GHz)
Figure 52. 2× LO − 2× IF Leakage vs RF Frequency at Various
Temperatures, IF = 3.5 GHz, 0 dBm
Figure 49. 2× LO − 2× IF Leakage vs. RF Frequency at Various
Temperatures, IF = 3.5 GHz, −10 dBm
Rev. B | Page 15 of 23
ADMV1009
Data Sheet
120
100
80
120
100
80
60
40
20
0
60
40
T
T
T
= +85°C
= +25°C
= –40°C
T
T
T
= +85°C
= +25°C
= –40°C
A
A
A
A
A
A
20
0
RF FREQUENCY (GHz)
RF FREQUENCY (GHz)
Figure 53. 4× IF Leakage vs. RF Frequency at Various Temperatures,
IF = 3.1 GHz, −10 dBm
Figure 56. 4× IF Leakage vs. RF Frequency at Various Temperatures,
IF = 3.1 GHz, 0 dBm
120
100
80
120
100
80
60
60
40
40
T
T
T
= +85°C
= +25°C
= –40°C
T
T
T
= +85°C
= +25°C
= –40°C
A
A
A
A
A
A
20
0
20
0
RF FREQUENCY (GHz)
RF FREQUENCY (GHz)
Figure 54. 4× IF Leakage vs. RF Frequency at Various Temperatures,
IF = 3.3 GHz, −10 dBm
Figure 57. 4× IF Leakage vs. RF Frequency at Various Temperatures,
IF = 3.3 GHz, 0 dBm
120
100
80
120
100
80
60
60
40
40
T
T
T
= +85°C
= +25°C
= –40°C
T
T
T
= +85°C
= +25°C
= –40°C
A
A
A
A
A
A
20
0
20
0
RF FREQUENCY (GHz)
RF FREQUENCY (GHz)
Figure 55. 4× IF Leakage vs. RF Frequency at Various Temperatures,
IF = 3.5 GHz, −10 dBm
Figure 58. 4× IF Leakage vs. RF Frequency at Various Temperatures,
IF = 3.5 GHz, 0 dBm
Rev. B | Page 16 of 23
Data Sheet
ADMV1009
Table 5. LO Harmonic Leakage at RFOUT
Harmonics
3.0
LO Frequency (MHz)1
1.0
2.0
4.0
9000
9500
10000
10500
11000
11500
12000
12600
−51
−48
−40
−33
−33
−30
−35
−39
−14
−5
−50
−55
−51
−67
−74
−63
−73
−63
−72
−67
−63
−62
−75
−77
−76
−75
−15
−28
−44
−44
−44
−40
1 All values are in dBm. LO Input Power = 0 dBm.
M × N SPURIOUS PERFORMANCE
LO = 0 dBm, Upper Sideband
IF = 3100 MHz at 0 dBm and RF = 13300 MHz. All values in dBc below RF power level. N/A means not applicable.
N × LO
0
1
2
3
4
−4
−3
−2
−1
0
N/A
N/A
N/A
N/A
N/A
77
98
99
60
61
53
0
83
66
52
27
38
68
31
77
83
83
75
77
80
68
70
86
64
96
105
104
89
97
85
M × IF
75
1
65
43
67
58
86
2
50
78
3
77
N/A
4
IF = 3300 MHz at 0 dBm and RF = 13300 MHz. All values in dBc below RF power level. N/A means not applicable.
N × LO
0
1
2
3
4
−4
−3
−2
−1
0
N/A
N/A
N/A
N/A
N/A
74
92
100
67
57
58
0
92
85
58
29
32
73
32
79
80
78
67
76
76
60
60
86
67
96
100
101
95
99
80
M × IF
79
1
64
43
63
67
82
2
57
91
3
78
N/A
4
IF = 3500 MHz at 0 dBm and RF = 13300 MHz. All values in dBc below RF power level. N/A means not applicable.
N × LO
0
1
2
3
4
−4
−3
−2
−1
0
N/A
N/A
N/A
N/A
N/A
71
92
100
67
50
64
0
92
85
50
28
27
73
32
79
80
78
67
76
72
58
60
86
67
96
100
101
95
97
74
M × IF
79
1
59
43
63
67
82
2
57
91
3
78
N/A
4
Rev. B | Page 17 of 23
ADMV1009
Data Sheet
THEORY OF OPERATION
The ADMV1009 is a GaAs, MMIC, SSB, upper side band
upconverter in a RoHS compliant package optimized for upper
sideband point to point microwave radio applications operating
in the 12.7 GHz to 15.4 GHz output frequency range. The
ADMV1009 supports LO input frequencies of 9 GHz to 12.6 GHz
and IF frequencies of 2.8 GHz to 4 GHz.
MIXER
The mixer has two differential inputs, IF1 and IF2, and an
external 180° balun is required to drive the IF ports differentially.
The ADMV1009 is optimized to work with the Mini-Circuit
NCS1-422+ RF balun. The mixer must be biased at −1.1 V
(VGMIX) to operate.
The ADMV1009 uses a RF amplifier preceded by a passive,
double balanced mixer, where a driver amplifier drives the
LO (see Figure 59). The combination of design, process, and
packaging technology allows the functions of these subsystems
to be integrated into a single die, using mature packaging and
interconnection technologies to provide a high performance,
low cost design with excellent electrical, mechanical, and
thermal properties. In addition, the need for external
components is minimized, optimizing cost and size.
RF AMPLIFIER
The RF amplifier requires a single dc bias voltage (VDRF) and a
single dc gate bias (VGRF) to operate. Starting at −2 V at the
gate supply (VGRF), the RF amplifier is biased at +5 V (VDRF).
Then, the gate bias (VGRF) is varied until the desired RF amplifier
bias current (IDRF) is achieved. The desired RF amplifier bias
current is 250 mA under small signal conditions.
The ADMV1009 has an internal band-pass filter between the
mixer and the RF driver amplifier that reduces LO leakage and
filters out the lower sideband at the RF output. The balanced
input drive allows exceptional linearity performance compared
to similar single-ended solutions.
LO DRIVER AMPLIFIER
The LO driver amplifier takes a single LO input and amplifies it
to the desired LO signal level for the mixer to operate optimally.
The LO driver amplifier requires a single dc bias voltage (VDLO)
and a single dc gate bias (VGLO) to operate. Starting at −2 V at
the gate supply (VGLO), the LO amplifier is biased at +5 V
(VDLO). Then, the gate bias (VGLO) is varied until the desired
LO amplifier bias current (IDLO) is achieved. The desired LO
amplifier bias current is 60 mA under the LO input drive of
−4 dBm to +4 dBm. The LO drive range of −4 dBm to +4 dBm
makes it compatible with Analog Devices, Inc., wideband
synthesizer portfolio without the requirement for an external
LO driver amplifier.
The typical application circuit (see Figure 59) shows the necessary
external components on the bias lines to eliminate any undesired
stability problems for the RF amplifier and the LO amplifier.
The ADMV1009 upconverter comes in a compact, thermally
enhanced, 4.9 mm × 4.9 mm, 32-terminal ceramic leadless chip
carrier (LCC) package. The ADMV1009 operates over the
−40°C to +85°C temperature range.
Rev. B | Page 18 of 23
Data Sheet
ADMV1009
APPLICATIONS INFORMATION
TYPICAL APPLICATION CIRCUIT
The typical applications circuit is shown in Figure 59. The
application circuit shown has been replicated for the evaluation
board circuit.
TP1
VDRF
C3
C1
100pF
C2
10nF
5016
TP2
1µF
VGX
C4
C5
5016
TP3
100pF
1µF
VDLO
C8
C6
470pF
C7
10nF
5016
TP4
1
24
23
22
21
20
19
18
17
1µF
NIC
2
NIC
NIC
NIC
NIC
NIC
LOIN
GND
NIC
GND
RFOUT
C12
J1
3
4
5
6
7
8
VGLO
RFOUT
NIC
NIC
NIC
VGRF
NIC
U1
C9
100pF
C10
10nF
C11
1µF
5016
ADMV1009AEZ
SMA
LOIN
J2
TP5
VGRF
C14
1µF
C13
10nF
SMA
5016
100pF
TP6
L1
L2
SMA
5016
56nH
56nH
C15
10pF
C16
10pF
3300MHz TO 4000MHz
SEC_DOT SEC_BAL
4
5
6
3
2
1
GND
NC
PRI_GND
PRI_DOT
NC
J3
SMA
IFIN
NCS1-422+
U2
Figure 59. Typical Application Circuit
Rev. B | Page 19 of 23
ADMV1009
Data Sheet
Power-On Sequence
EVALUATION BOARD INFORMATION
To set up the ADMV1009-EVALZ, take the following steps:
The circuit board used in the application must use RF circuit
design techniques. Signal lines must have 50 Ω impedance, and
the package ground leads and exposed pad must be connected
directly to the ground plane, similar to what is shown in Figure 60
and Figure 61. Use a sufficient number of via holes to connect
the top and bottom ground planes. The evaluation circuit board
shown in Figure 59 is available from Analog Devices, Inc., upon
request.
1. Power up the VGLO with a −1.5 V supply.
2. Power up the VDLO with a 5 V supply.
3. Adjust VGLO from −1.5 V to −0.5 V such that IDLO =
60 mA.
4. Power up VGRF with a −1.5 V supply.
5. Power up VDRF with a 5 V supply.
6. Adjust VGRF from −1.5 V to −0.5 V such that IDLO =
250 mA
Layout
7. Power up VGMIX with a −1.5 V supply.
8. Apply an LO signal.
9. Apply an IF signal.
Solder the exposed pad on the underside of the ADMV1009 to
a low thermal and electrical impedance ground plane. This pad
is typically soldered to an exposed opening in the solder mask
on the evaluation board. Connect these ground vias to all other
ground layers on the evaluation board to maximize heat
dissipation from the device package. Figure 60 shows the PCB
land pattern footprint for the ADMV1009-EVALZ, and Figure 61
shows the solder paste stencil for the ADMV1009-EVALZ
evaluation board.
Power Off Sequence
To turn off the ADMV1009-EVALZ, take the following steps:
1. Turn off the LO and IF signals.
2. Set VGRF and VGLO to −1.5 V.
3. Set the VDRF and VDLO supplies to 0 V and then turn off
the VDRF and VDLO supplies.
4. Turn off the VGRF and VGLO supplies.
0.217" SQUARE
0.004" MASK/METAL OVERLAP
0.010" MINIMUM MASK WIDTH
SOLDER MASK
GROUND PAD
PAD SIZE
0.026" × 0.010"
PIN 1
0.197"
[0.50]
0.156"
MASK
OPENING
ø.034"
TYPICAL
VIA SPACING
ø.010"
TYPICAL VIA
0.010" REF
0.138" SQUARE MASK OPENING
0.02 × 45° CHAMFER FOR PIN 1
0.030"
MASK OPENING
0.146" SQUARE
GROUND PAD
Figure 60. PCB Land Pattern Footprint of the ADMV1009-EVALZ
Rev. B | Page 20 of 23
Data Sheet
ADMV1009
0.017
0.0197
TYP
0.219
SQUARE
0.132
SQUARE
0.017
0.027
TYP
R0.0040 TYP
132 PLCS
0.010
TYP
Figure 61. Solder Paste Stencil of the ADMV1009-EVALZ
Figure 62. ADMV1009-EVALZ Evaluation Board Top Layer
Rev. B | Page 21 of 23
ADMV1009
Data Sheet
BILL OF MATERIALS
Table 6.
Qty. Reference Designator
Description
Manufacturer/Part No.
1
1
4
4
5
1
2
2
1
2
6
1
1
Not applicable
U1
C1, C4, C9, C12
C2, C7, C10, C13
C3, C5, C8, C11, C14
C6
C15, C16
J1, J2
J3
PCB
ADMV1009AEZ
Analog Devices/600-01649-00
Analog Devices/ADMV1009AEZ
Murata/GRM1555C1H101JA01D
Panasonic/ECJ-1VB1H103K
Taiyo Yuden/UMK107AB7105KA-T
Murata/GRM1555C1H471JA01D
Kemet/C0402C100J3GAL
SRI Connector Gage Co./21-141-1000-01
Johnson Components/142-0701-851
Coilcraft/0805CS-560XJLB
100 pF ceramic capacitors, 5%, 50 V, C0G, 0402
10 nF ceramic capacitors, 50 V, 10%, X7R, 0603
1 µF ceramic capacitors, 50 V, 10%, X7R, 0603
470 pF ceramic capacitor, 5%, 50 V, COG, 0402, SMD
10 pF ceramic capacitors, 5%, 25 V, C0G, 0402
SCD, COMP, SMA connectors, SRI
SCD, COMP, SMA connector
56 nH inductors, 0805, 5%, 500 mA
Test points, PC compact SMT
50 Ω RF transformer, 3300 MHz to 4000 MHz
Aluminum heatsink
L1, L2
TP1 to TP6
U2
Keystone Electronics/5016
Mini-Circuits/NCS1-422+
Analog Devices/111332
Heatsink
Rev. B | Page 22 of 23
Data Sheet
ADMV1009
OUTLINE DIMENSIONS
5.05
4.90 SQ
4.75
0.36
0.30
0.24
PIN 1
0.08
REF
INDICATOR
PIN 1
32
25
24
1
0.50
BSC
3.60
3.50 SQ
3.40
EXPOSED
PAD
17
8
16
9
0.38
0.32
0.26
0.20 MIN
BOTTOM VIEW
3.50 REF
TOP VIEW
SIDE VIEW
1.10
1.00
0.90
4.10 REF
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
SEATING
PLANE
SECTION OF THIS DATA SHEET.
Figure 63. 32-Terminal Ceramic Leadless Chip Carrier [LCC]
(E-32-1)
Dimensions shown in millimeters
ORDERING GUIDE
Model1
Temperature Range Package Body Material Lead Finish
Package Description
Package Option
ADMV1009AEZ
ADMV1009AEZ-R7 −40°C to +85°C
ADMV1009-EVALZ
−40°C to +85°C
Alumina Ceramic
Alumina Ceramic
Gold Over Nickel 32-Terminal Ceramic LCC E-32-1
Gold Over Nickel 32-Terminal Ceramic LCC E-32-1
Evaluation Board
1 Z = RoHS Compliant Part.
©2017-2018 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D15770-0-4/18(B)
Rev. B | Page 23 of 23
相关型号：
©2020 ICPDF网 联系我们和版权申明