ADMV1011AEZ-R7 [ADI]
17 GHz to 24 GHz, GaAs, MMIC, I/Q Upconverter;
| 型号： | ADMV1011AEZ-R7 |
| 厂家： | 
ADI |
| 描述： | 17 GHz to 24 GHz, GaAs, MMIC, I/Q Upconverter |
| 文件： | 总26页 (文件大小：607K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
17 GHz to 24 GHz,
GaAs, MMIC, I/Q Upconverter
ADMV1011
Data Sheet
FEATURES
FUNCTIONAL BLOCK DIAGRAM
VGRF1 VCTL2 VCTL3 VGRF2 VDRF2 VDRF1
RF output frequency range: 17 GHz to 24 GHz
IF input frequency range: 2 GHz to 4 GHz
LO input frequency range: 8 GHz to 12 GHz with 2× multiplier
Sideband rejection: 32 dB for lower sideband
P1dB: 25 dBm
5
6
7
8
9
31
1
3
GND
GND
GND
GND
14
19
RFOUT
2
Gain regulation: 30 dB
Output IP3: 33 dBm
Matched 50 Ω RF output, LO input, and IF input
32-terminal, 4.9 mm × 4.9 mm LCC package
90
0
13
12
IF1
IF2
18
LOIN
×2
VDLO 26
APPLICATIONS
ADMV1011
Point to point microwave radios
Figure 1.
Radars and electronic warfare systems
Instrumentation, automatic test equipment
GENERAL DESCRIPTION
The ADMV1011 is a compact, gallium arsenide (GaAs) design,
monolithic microwave integrated circuit (MMIC), double
sideband (DSB) upconverter in a RoHS compliant package
optimized for point to point microwave radio designs that
operates in the 17 GHz to 24 GHz frequency range.
IF1 and IF2 mixer inputs are provided and an external 90°
hybrid is needed to select the required sideband. The I/Q mixer
topology reduces the need for filtering the unwanted sideband.
The ADMV1011 is a much smaller alternative to hybrid style
DSB upconverter assemblies and it eliminates the need for wire
bonding by allowing the use of surface-mount manufacturing
assemblies.
The ADMV1011 provides 21 dB of conversion gain with 32 dBc
of sideband rejection for the lower sideband and 23 dBc of
sideband rejection for the upper sideband. The ADMV1011
uses a radio frequency (RF) amplifier preceded by an in
phase/quadrature (I/Q) double balanced mixer, where a driver
amplifier drives the local oscillator (LO) with a 2× multiplier.
The ADMV1011 upconverter comes in a compact, thermally
enhanced, 4.9 mm × 4.9 mm LCC package. The ADMV1011
operates over the −40°C to +85°C temperature range.
Rev. A
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rights of third parties that may result from its use. Specifications subject to change without notice. No
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Tel: 781.329.4700
Technical Support
©2017-2018 Analog Devices, Inc. All rights reserved.
www.analog.com
ADMV1011
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Performance vs. LO Power........................................................ 13
Leakage and Return Loss Performance................................... 14
M × N Spurious Performance................................................... 17
Theory of Operation ...................................................................... 18
LO Driver Amplifier .................................................................. 18
Mixer............................................................................................ 18
RF Amplifier ............................................................................... 18
Applications Information.............................................................. 19
Typical Application Circuit....................................................... 19
Finer Resolution Gain Regulation ........................................... 20
Evaluation Board Information ................................................. 22
Bill of Materials........................................................................... 25
Outline Dimensions....................................................................... 26
Ordering Guide .......................................................................... 26
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Lower Sideband Performance..................................................... 3
Upper Sideband Performance..................................................... 4
Absolute Maximum Ratings............................................................ 5
Thermal Resistance ...................................................................... 5
ESD Caution.................................................................................. 5
Pin Configuration and Function Descriptions............................. 6
Typical Performance Characteristics ............................................. 7
Lower Sideband.............................................................................. 7
Upper Sideband ............................................................................ 9
Performance vs. Gain Regulation............................................. 11
REVISION HISTORY
2/2018—Rev. 0 to Rev. A
Deleted Upper Sideband Section and Figure 60 to Figure 65 .........18
Changes to Figure 56...................................................................... 19
Added Finer Resolution Gain Regulation Section and Figure 57
to Figure 60; Renumbered Sequentially ...................................... 20
Added Figure 61 and Figure 62 .................................................... 21
Changes to Power-Off Sequence Section and 2× LO
Suppression Section ....................................................................... 22
Changes to Figure 65...................................................................... 24
Changers to Table 7........................................................................ 25
Changes to Ordering Guide.......................................................... 26
Changes to Features Section, General Description Section, and
Figure 1 .............................................................................................. 1
Changes to Table 1 and Table 2....................................................... 3
Changes to Table 3............................................................................ 4
Changes to Table 4............................................................................ 5
Add Thermal Resistance Section and Table 5; Renumbered
Sequentially ....................................................................................... 5
Changes to Figure 2 and Table 6..................................................... 6
Changes to Figure 46...................................................................... 14
Changes to Figure 47, Figure 51, and Figure 52 ......................... 15
Changes to M × N Spurious Performance Section .................... 17
Added Lower Sideband Section and Upper Sideband Section.......17
Deleted Spurious Performance Section, Lower Sideband Section,
and Figure 56 to Figure 59; Renumbered Sequentially.....................17
10/2017—Revision 0: Initial Version
Rev. A | Page 2 of 26
Data Sheet
ADMV1011
SPECIFICATIONS
Data specified at VDRF1 and VDRF2 = 5 V, VDLO = 3.5 V, IDRF1 = 220 mA, IDRF2 = 75 mA, −4 dBm ≤ LO ≤ +4 dBm, −40°C ≤ TA ≤
+85°C, taken with Mini-Circuits QCN-45+ power splitter/combiner, unless otherwise noted. VCTL2, VCTL3 = −5 V, unless otherwise noted.
Table 1.
Parameter
Symbol
Test Conditions/Comments
Min
Typ Max Unit
RF OUTPUT FREQUENCY
INPUT FREQUENCY
Local Oscillator
Intermediate Frequency
LO AMPLITUDE
POWER INTERFACE
Amplifier Bias Voltage
LO
17
24
GHz
LO
IF
With 2× multiplier
8
2
12
4
GHz
GHz
dBm
−4
0
+4
VDLO
VDRF1, VDRF2
3.5
5
V
V
RF
Amplifier Bias Current
LO
RF
IDLO
IDRF1
IDRF2
160
220
75
180
300
mA
mA
mA
Adjust VGRF1 between −1.8 V to −0.8 V to get IDRF1
Adjust VGRF2 between −1.8 V to −0.8 V to get IDRF1
Amplifier Gate Current
RF
IGRF1
IGRF2
VGRF1, VGRF2
<1
<1
mA
mA
V
RF Amplifier Gate Control
Voltage
RF Amplifier Gain Control
Voltage
−1.8
−5
−0.8
0
VCTL2, VCTL3
Maximum gain = −5 V, minimum gain = 0 V
V
Total Power Dissipation
2.1
W
LOWER SIDEBAND PERFORMANCE
Data specified at VDRF1 and VDRF2 = 5 V, VDLO = 3.5 V, IDRF1 = 220 mA, IDRF2 = 75 mA, −4 dBm ≤ LO ≤ +4 dBm, −40°C ≤ TA ≤
+85°C, taken with Mini-Circuits QCN-45+ power splitter/combiner, unless otherwise noted. VCTL2, VCTL3 = −5 V, unless otherwise noted.
Table 2.
Parameter
Symbol Test Conditions/Comments
Min Typ Max Unit
RF PERFORMANCE
Frequency
Radio Frequency
Local Oscillator
Intermediate Frequency
Conversion Gain
Dynamic Range
RF
LO
IF
17
8.5
2
15
30
20
12
4
GHz
GHz
GHz
21
32
14
14
33
26.5 dB
dB
16
22
VVA
SSB NF
VVA control slope > 35 mV/dB
With hybrid at maximum gain
With hybrid vs. gain regulation, gain control ≤ 25 dB
At output power (POUT) = 8 dBm at maximum gain
Single Sideband Noise Figure
dB
dB
dBm
Output Third-Order Intercept
IP3
31
Output Third-Order Intercept vs. Gain
Regulation
5 dB Attenuation
10 dB Attenuation
15 dB Attenuation
20 dB Attenuation
25 dB Attenuation
30 dB Attenuation
Output 1 dB Compression Point
Sideband Rejection
25.5 30
20 22
14.5 18
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dBc
9
25
3.5
−2
16
+12
P1dB
22.5 25
20 32
Gain regulation change from 0 dB to 31 dB
Rev. A | Page 3 of 26
ADMV1011
Data Sheet
Parameter
Leakage
Symbol Test Conditions/Comments
Min Typ Max Unit
2× LO to RF
Maximum conversion gain at 18 GHz
Vs. gain regulation
−5
+5
1
dBm
dB/dB
2× LO to IF
Return Loss
RF Output
LO Input
IF Input
IF Input Power
3× LO – 4 × IF Spur
1× LO + 2 × IF Spur
6× IF Spur
−40 −25 dBm
15
11
20
10
10
10
0
dB
dB
dB
dBm
dBc
dBc
dBc
LO = 0 dBm
−25
64
55
RF frequency (fRF) = 18 GHz, IF = 0 dBm
fRF = 18 GHz, IF = 0 dBm
fRF = 18 GHz, IF = 0 dBm
80
75
85
72
UPPER SIDEBAND PERFORMANCE
Data specified at VDRF1 and VDRF2 = 5 V, VDLO = 3.5 V, IDRF1 = 220 mA, IDRF2 = 75 mA, −4 dBm ≤ LO ≤ +4 dBm, −40°C ≤ TA ≤
+85°C, taken with Mini-Circuits QCN-45+ power splitter/combiner, unless otherwise noted. VCTL2, VCTL3 = −5 V, unless otherwise noted.
Table 3.
Parameter
Symbol Test Conditions/Comments
Min Typ Max Unit
RF PERFORMANCE
Frequency
Radio Frequency
Local Oscillator
Intermediate Frequency
Conversion Gain
Dynamic Range
RF
LO
IF
20
8
2
15
30
24
11
4
GHz
GHz
GHz
21
37
26.5 dB
dB
VVA
VVA control slope > 35 mV/dB
Single Sideband Noise Figure
SSB NF
With hybrid at maximum gain
With hybrid vs. gain regulation, gain control ≤ 25 dB
At output power (POUT) = 8 dBm
13.5 16
13.5 22
33
dB
dB
dBm
Output Third-Order Intercept
IP3
31
Output Third-Order Intercept vs.
Gain Regulation
5 dB Attenuation
10 dB Attenuation
15 dB Attenuation
20 dB Attenuation
25 dB Attenuation
30 dB Attenuation
Output 1 dB Compression Point
Sideband Rejection
Leakage
25.5 27
20 25
14.5 17
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dBc
9
3.5
−2
12
8
+7
P1dB
22.5 25
Gain regulation change from 0 dB to 31dB
20
23
2× LO to RF
Maximum conversion gain at 23 GHz
Vs. gain regulation
−5
+5
1
dBm
dB/dB
dBm
2× LO to IF
Return Loss
−40 −25
RF Output
LO Input
IF Input
IF Input Power
4× LO − 5 × IF Spur
4× LO − 4 × IF Spur
3× LO − 2 × IF Spur
1× LO + 4 × IF Spur
7× IF Spur
15
11
20
10
10
10
0
dB
dB
dB
dBm
dBc
dBc
dBc
dBc
dBc
LO = 0 dBm
−25
63
61
60
65
75
RF frequency (fRF) = 23 GHz, IF = 0 dBm
fRF = 23 GHz, IF = 0 dBm
fRF = 23 GHz, IF = 0 dBm
fRF = 23 GHz, IF = 0 dBm
fRF = 23 GHz, IF = 0 dBm
80
75
80
80
110
Rev. A | Page 4 of 26
Data Sheet
ADMV1011
ABSOLUTE MAXIMUM RATINGS
Stresses at or above those listed under Absolute Maximum
Table 4.
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
Parameter
Rating
Supply Voltage
VDLO
VDRF1 − VGRF1, VDRF2 − VGRF21
VGRF1, VGRF2
5.5 V
8 V
0 V
−6 V to +0.5 V
2 mA
175°C
2.64 W
VCTRL2, VCTRL3
THERMAL RESISTANCE
IF1/IF2 Source and Sink Current
Maximum Junction Temperature (TJ)
Maximum Power Dissipation
Thermal performance is directly linked to printed circuit board
(PCB) design and operating environment. Careful attention to
PCB thermal design is required.
Lifetime Maximum Junction Temperature (TJ) >1 million hours
Operating Temperature Range
Storage Temperature Range
Input Power
−40°C to +85°C
−65°C to +150°C
θJA is thermal resistance, junction to ambient (°C/W), and θJC is
thermal resistance, junction to case (°C/W).
LO
IF
15 dBm
15 dBm
260°C
Table 5.
Package Type
1
θJA
θJC
Unit
Lead Temperature (Soldering 60 sec)
Moisture Sensitivity Level (MSL)3
Electrostatic Discharge (ESD) Sensitivity
E-32-1
33.4
34
°C/W
MSL3
1 See JEDEC standard JESD51-2 for additional information on optimizing the
thermal impedance (printed circuit board (PCB) with 3 × 3 vias).
Field Induced Charge Device Model
(FICDM)
Human Body Model (HBM)
500 V
250 V
ESD CAUTION
1 The maximum VDRF voltage and the minimum VGRF voltage is determined
by this difference. If a maximum VDRF voltage of +5.5 V is required, then the
minimum VGRF voltage is −2.5 V.
2 To calculate power dissipation, which is a theoretical number, use the
following equation: (TJ − 85°C)/θJC.
3 Based on IPC/JEDEC J-STD-20 MSL classifications.
Rev. A | Page 5 of 26
ADMV1011
Data Sheet
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
GND
RFOUT
GND
1
2
3
4
5
6
7
8
24 NIC
23
NIC
22 NIC
ADMV1011
TOP VIEW
(Not to Scale)
NIC
NIC
NIC
GND
21
20
19
VGRF1
VCTL2
VCTL3
VGRF2
18 LOIN
17 NIC
NOTES
1. NIC = NOT INTERNALLY CONNECTED. IT IS RECOMMENDED TO GROUND THESE PINS ON THE PCB.
2. EXPOSED PAD. THE EXPOSED PAD MUST BE CONNECTED TO GND. GOOD RF AND THERMAL
GROUNDING IS RECOMMENDED.
Figure 2. Pin Configuration
Table 6. Pin Function Descriptions
Pin No.
1, 3, 14, 19
2
Mnemonic
Description
GND
RFOUT
NIC
Ground. These pins are grounded internally and must be grounded on the PCB.
RF Output. This pin is ac-coupled internally and matched to 50 Ω single ended.
Not Internally Connected. It is recommended to ground these pins on the PCB.
4, 10, 11, 15 to 17,
20 to 25, 27 to 30, 32
5, 8
VGRF1, VGRF2
Power Supply Voltage for the Gate of the RF Amplifier. Refer to the Applications Information
section for the required external components and biasing.
6, 7
9, 31
VCTL2, VCLT3
VDRF2, VDRF1
Gain Control Voltage. Refer to the Applications Information section for biasing.
Power Supply Voltage for the RF Amplifier. Refer to the Applications Information section for
the required external components and biasing.
12, 13
IF2, IF1
Quadrature IF Inputs. These pins are matched to 50 Ω single ended and are dc-coupled. No
external dc blocks required. To prevent device malfunction or failure, these pins must not
source or sink more than 2 mA of current.
18
26
LOIN
VDLO
Local Oscillator. This pin is ac-coupled and matched to 50 Ω single ended.
Power Supply Voltage for the LO Amplifier. Refer to the external Applications Information
section for the required external components and biasing.
EPAD
Exposed Pad. The exposed pad must be connected to GND. Good RF and thermal grounding is
recommended on the PCB.
Rev. A | Page 6 of 26
Data Sheet
ADMV1011
TYPICAL PERFORMANCE CHARACTERISTICS
LOWER SIDEBAND
Data specified at VDRF1 and VDRF2 = 5 V, VDLO = 3.5 V, IDRF1 = 220 mA, IDRF2 = 75 mA, TA = 25°C, LO = 0 dBm, IF frequency = 3 GHz,
IFx pin= −10 dBm, and taken with Mini-Circuits QCN-45+ power splitter/combiner as lower sideband, unless otherwise noted. VCTL2
and VCTL3 = −5 V, unless otherwise noted.
30
28
26
24
22
20
18
16
14
12
10
30
28
26
24
22
20
18
16
14
12
10
T
T
T
= +85°C
= +25°C
= –40°C
T
T
T
= +85°C
= +25°C
= –40°C
A
A
A
A
A
A
17.0
17.5
18.0
18.5
19.0
19.5
20.0
1.0
1.5
2.0
2.5
3.0
3.5
4.0
RF FREQUENCY (GHz)
IF FREQUENCY (GHz)
Figure 6. Conversion Gain vs. IF Frequency at Various Temperatures,
RF Frequency = 18 GHz
Figure 3. Conversion Gain vs. RF Frequency at Various Temperatures
55
55
50
45
40
35
30
25
20
15
50
45
40
35
30
25
20
15
10
5
T
T
T
= +85°C
= +25°C
= –40°C
A
A
A
T
T
T
= +85°C
= +25°C
= –40°C
A
A
A
10
5
0
1.0
0
17.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
17.5
18.0
18.5
19.0
19.5
20.0
IF FREQUENCY (GHz)
RF FREQUENCY (GHz)
Figure 7. Sideband Rejection vs. IF Frequency, RF Frequency = 18 GHz
Figure 4. Sideband Rejection vs. RF Frequency at Various Temperatures
40
39
38
37
36
35
34
33
32
31
30
29
40
39
38
37
36
35
34
33
32
31
30
29
T
T
T
= +85°C
= +25°C
= –40°C
T
T
T
= +85°C
= +25°C
= –40°C
A
A
A
A
A
A
28
27
26
25
28
27
26
25
1.0
1.5
2.0
2.5
3.0
3.5
4.0
17.0
17.5
18.0
18.5
19.0
19.5
20.0
IF FREQUENCY (GHz)
RF FREQUENCY (GHz)
Figure 8. Output IP3 vs. IF Frequency at Various Temperatures,
RF Frequency = 18 GHz
Figure 5. Output IP3 vs. RF Frequency at Various Temperatures,
POUT = 12 dBm
Rev. A | Page 7 of 26
ADMV1011
Data Sheet
30
28
26
24
22
20
18
30
28
26
24
22
20
18
16
14
12
10
16
T
T
T
= +85°C
= +25°C
= –40°C
T
T
T
= +85°C
= +25°C
= –40°C
A
A
A
A
A
A
14
12
10
17.0
17.5
18.0
18.5
19.0
19.5
20.0
1.0
1.5
2.0
2.5
3.0
3.5
4.0
RF FREQUENCY (GHz)
IF FREQUENCY (GHz)
Figure 9. Output P1dB vs. RF Frequency at Various Temperatures
Figure 11. Output P1dB vs. IF Frequency at Various Temperatures,
RF Frequency = 18 GHz
20
18
16
14
12
10
8
20
18
16
14
12
10
8
6
6
T
T
T
= +85°C
= +25°C
= –40°C
A
A
A
4
2
4
2
0
17.5
0
–4
18.0
18.5
19.0
19.5
20.0
–3
–2
–1
0
1
2
3
4
RF FREQUENCY (GHz)
LO POWER (dBm)
Figure 10. SSB Noise Figure vs. RF Frequency at Various Temperatures
Figure 12. SSB Noise Figure vs. LO Power, RF Frequency = 18 GHz
Rev. A | Page 8 of 26
Data Sheet
ADMV1011
UPPER SIDEBAND
Data specified at VDRF1 and VDRF2 = 5 V, VDLO = 3.5 V, IDRF1 = 220 mA, IDRF2 = 75 mA, TA = 25°C, LO = 0 dBm, IF frequency =
3 GHz, IFx pin = −10 dBm, and taken with Mini-Circuits QCN-45+ power splitter/combiner as upper sideband, unless otherwise noted.
VCTL2 and VCTL3 = −5 V, unless otherwise noted.
30
28
26
24
22
20
18
16
14
12
10
30
28
26
24
22
20
18
16
14
12
10
T
T
T
= +85°C
= +25°C
= –40°C
T
T
T
= +85°C
= +25°C
= –40°C
A
A
A
A
A
A
20.0
20.5
21.0
21.5
22.0
22.5
23.0
23.5
24.0
1.0
1.5
2.0
2.5
3.0
3.5
4.0
RF FREQUENCY (GHz)
IF FREQUENCY (GHz)
Figure 13. Conversion Gain vs. RF Frequency at Various Temperatures
Figure 16. Conversion Gain vs. IF Frequency at Various Temperatures,
RF Frequency = 23 GHz
45
40
35
30
25
20
15
45
T
T
T
= +85°C
= +25°C
= –40°C
A
A
A
40
35
30
25
20
15
10
5
T
T
T
= +85°C
= +25°C
= –40°C
A
A
A
10
5
0
20.0
0
1.0
20.5
21.0
21.5
22.0
22.5
23.0
23.5
24.0
1.5
2.0
2.5
3.0
3.5
4.0
RF FREQUENCY (GHz)
IF FREQUENCY (GHz)
Figure 14. Sideband Rejection vs. RF Frequency at Various Temperatures
Figure 17. Sideband Rejection vs. IF Frequency at Various Temperatures,
RF Frequency = 23 GHz
46
44
42
40
38
36
34
32
30
28
46
T
T
T
= +85°C
= +25°C
= –40°C
A
A
A
44
42
40
38
36
34
32
30
28
26
24
22
20
T
T
T
= +85°C
= +25°C
= –40°C
A
A
A
26
24
22
20
20.0
20.5
21.0
21.5
22.0
22.5
23.0
23.5
24.0
1.0
1.5
2.0
2.5
3.0
3.5
4.0
RF FREQUENCY (GHz)
IF FREQUENCY (GHz)
Figure 15. Output IP3 vs. RF Frequency at Various Temperatures,
IF Frequencies at POUT = 12 dBm
Figure 18. Output IP3 vs. IF Frequency at Various Temperatures,
RF Frequency = 23 GHz
Rev. A | Page 9 of 26
ADMV1011
Data Sheet
30
28
26
24
22
20
18
30
28
26
24
22
20
18
16
14
12
10
16
T
T
T
= +85°C
= +25°C
= –40°C
T
T
T
= +85°C
= +25°C
= –40°C
A
A
A
A
A
A
14
12
10
20.0
20.5
21.0
21.5
22.0
22.5
23.0
23.5
24.0
1.0
1.5
2.0
2.5
3.0
3.5
4.0
RF FREQUENCY (GHz)
IF FREQUENCY (GHz)
Figure 19. Output P1dB vs. RF Frequency at Various Temperatures
Figure 21. Output P1dB vs. IF Frequency at Various Temperatures,
RF Frequency = 23 GHz
20
19
18
17
16
15
14
13
12
11
10
9
20
19
18
17
16
15
14
13
12
11
10
9
8
8
7
7
6
6
5
4
3
5
4
3
T
T
T
= +85°C
= +25°C
= –40°C
A
A
A
2
2
1
1
0
20.0
0
–4
20.5
21.0
21.5
22.0
22.5
23.0
–3
–2
–1
0
1
2
3
4
RF FREQUENCY (GHz)
LO POWER (dBm)
Figure 20. SSB Noise Figure vs. RF Frequency at Various Temperatures
Figure 22. SSB Noise Figure vs. LO Power, RF Frequency = 23 GHz
Rev. A | Page 10 of 26
Data Sheet
ADMV1011
PERFORMANCE vs. GAIN REGULATION
Data specified at VDRF1 and VDRF2 = 5 V, VDLO = 3.5 V, IDRF1 = 220 mA, IDRF2 = 75 mA, TA = 25°C, LO = 0 dBm, IF frequency = 3 GHz,
and taken with Mini-Circuits QCN-45+ power splitter/combiner, unless otherwise noted. VCTL is varied for gain regulation.
30
25
20
15
10
5
30
25
20
15
10
5
0
0
–5
–10
–15
–20
T
T
T
= +85°C
= +25°C
= –40°C
T
T
T
= +85°C
= +25°C
= –40°C
A
A
A
A
A
A
–5
–10
–15
–5.0 –4.5 –4.0 –3.5 –3.0 –2.5 –2.0 –1.5 –1.0 –0.5
0
–5.0 –4.5 –4.0 –3.5 –3.0 –2.5 –2.0 –1.5 –1.0 –0.5
0
V
(V)
V
CTL
(V)
CTL
Figure 23. Conversion Gain vs. Control Voltage (VCTL) at Various
Temperatures, RF Frequency = 18 GHz, Lower Sideband
Figure 26. Conversion Gain vs. VCTL at Various Temperatures,
RF Frequency = 23 GHz, Upper Sideband
25
20
15
10
25
20
15
10
0dB
10.14dB
5
5
19.26dB
29.09dB
0dB
10.67dB
20.32dB
29.67dB
0
–5
0
–5
–10
–10
–15
17.0
–15
20.0
17.5
18.0
18.5
19.0
19.5
20.0
20.5
21.0
21.5
22.0
22.5
23.0
23.5
24.0
RF FREQUENCY (GHz)
RF FREQUENCY (GHz)
Figure 24. Conversion Gain vs. RF Frequency at Various Attenuation Levels,
Lower Sideband
Figure 27. Conversion Gain vs. RF Frequency at Various Attenuation Levels,
Upper Sideband
55
50
45
40
35
30
25
20
15
40
35
30
25
20
15
10
5
T
T
T
= +85°C
= +25°C
= –40°C
T
T
T
= +85°C
= +25°C
= –40°C
A
A
A
A
A
A
10
5
0
0
0
5
10
15
20
25
30
0
5
10
15
20
25
30
35
ATTENUATION (dB)
ATTENUATION (dB)
Figure 25. Sideband Rejection vs. Attenuation at Various Temperatures,
RF Frequency = 18 GHz, Lower Sideband
Figure 28. Sideband Rejection vs. Attenuation at Various Temperatures,
RF Frequency = 23 GHz, Upper Sideband
Rev. A | Page 11 of 26
ADMV1011
Data Sheet
45
40
35
30
25
20
15
45
40
35
30
25
20
15
10
5
0dB
10.14dB
19.26dB
29.09dB
0dB
10
5
10.67dB
20.32dB
29.67dB
0
17.0
0
20.0
17.5
18.0
18.5
19.0
19.5
20.0
20.5
21.0
21.5
22.0
22.5
23.0
23.5
24.0
RF FREQUENCY (GHz)
RF FREQUENCY (GHz)
Figure 29. Output IP3 vs. RF Frequency at Various Attenuation Levels,
Lower Sideband
Figure 32. Output IP3 vs. RF Frequency at Various Attenuation Levels,
Upper Sideband
45
45
T
T
T
= +85°C
= +25°C
= –40°C
T
T
T
= +85°C
= +25°C
= –40°C
A
A
A
A
A
A
40
35
30
25
20
15
10
5
40
35
30
25
20
15
10
5
0
0
0
5
10
15
20
25
30
0
5
10
15
20
25
30
ATTENUATION (dB)
ATTENUATION (dB)
Figure 30. Output IP3 vs. Attenuation at Various Temperatures,
RF Frequency = 18 GHz, Lower Sideband
Figure 33. Output IP3 vs. Attenuation at Various Temperatures,
RF Frequency = 23 GHz, Upper Sideband
20
18
16
14
12
10
8
20
18
16
14
12
10
8
6
6
T
T
T
= +85°C
= +25°C
= –40°C
T
T
T
= +85°C
= +25°C
= –40°C
A
A
A
A
A
A
4
2
4
2
0
–5.0
0
–5.0
–4.5
–4.0
–3.5
(V)
–3.0
–2.5
–2.0
–4.5
–4.0
–3.5
V (V)
CTL
–3.0
–2.5
–2.0
V
CTL
Figure 31. SSB Noise Figure vs. VCTL at Various Temperatures,
RF Frequency = 18 GHz, Lower Sideband
Figure 34. SSB Noise Figure vs. VCTL at Various Temperatures,
RF Frequency = 23 GHz, Upper Sideband
Rev. A | Page 12 of 26
Data Sheet
ADMV1011
PERFORMANCE vs. LO POWER
Data specified at VDRF1 and VDRF2 = 5 V, VDLO = 3.5 V, IDRF1 = 220 mA, IDRF2 = 75 mA, TA = 25°C, IF frequency = 3 GHz, and
taken with Mini-Circuits QCN-45+ power splitter/combiner, unless otherwise noted. VCTL2 and VCTL3 = −5 V, unless otherwise noted.
28
26
24
22
20
18
16
14
12
10
30
28
26
24
22
20
18
16
14
12
10
T
T
T
= +85°C
= +25°C
= –40°C
T
T
T
= +85°C
= +25°C
= –40°C
A
A
A
A
A
A
–4
–3
–2
–1
0
1
2
3
4
–4
–3
–2
–1
0
1
2
3
4
LO POWER (dBm)
LO POWER (dBm)
Figure 35. Conversion Gain vs. LO Power at Various Temperatures,
RF Frequency = 18 GHz, Lower Sideband
Figure 38. Conversion Gain vs. LO Power at Various Temperatures,
RF Frequency = 23 GHz, Upper Sideband
40
38
36
34
32
30
28
26
40
38
36
34
32
30
28
26
T
T
T
= +85°C
= +25°C
= –40°C
T
T
T
= +85°C
= +25°C
= –40°C
A
A
A
A
A
A
24
22
20
24
22
20
–4
–3
–2
–1
0
1
2
3
4
–4
–3
–2
–1
0
1
2
3
4
LO POWER (dBm)
LO POWER (dBm)
Figure 39. Output IP3 vs. LO Power at Various Temperatures,
RF Frequency = 23 GHz, Upper Sideband
Figure 36. Output IP3 vs. LO Power at Various Temperatures,
RF Frequency = 18 GHz, Lower Sideband
30
28
26
24
22
20
18
16
30
28
26
24
22
20
18
16
T
T
T
= +85°C
= +25°C
= –40°C
T
T
T
= +85°C
= +25°C
= –40°C
A
A
A
A
A
A
14
12
10
14
12
10
–4
–3
–2
–1
0
1
2
3
4
–4
–3
–2
–1
0
1
2
3
4
LO POWER (dBm)
LO POWER (dBm)
Figure 37. Output P1dB vs. LO Power at Various Temperatures,
RF Frequency = 18 GHz, Lower Sideband
Figure 40. Output P1dB vs. LO Power at Various Temperatures,
RF Frequency = 23 GHz, Upper Sideband
Rev. A | Page 13 of 26
ADMV1011
Data Sheet
LEAKAGE AND RETURN LOSS PERFORMANCE
Data specified at VDRF1 and VDRF2 = 5 V, VDLO = 3.5 V, IDRF1 = 220 mA, IDRF2 = 75 mA, TA = 25°C, LO = 0 dBm, and taken with
Mini-Circuits QCN-45+ power splitter/combiner, unless otherwise noted. VCTL2 and VCTL3 = −5 V unless otherwise noted.
0
–10
–20
–30
–40
–50
–60
–70
0
–10
–20
–30
–40
–50
–60
–70
T
T
T
= +85°C
= +25°C
= –40°C
T
T
T
= +85°C
= +25°C
= –40°C
A
A
A
A
A
A
LO FREQUENCY = 12GHz
LO FREQUENCY = 8GHz
–4
–3
–2
–1
0
1
2
3
4
7
8
9
10
11
12
13
14
LO POWER (dBm)
LO FREQUENCY (GHz)
Figure 44. LO to RF Feedthrough vs. LO Power at
Various Temperatures and LO Frequencies
Figure 41. LO to RF Feedthrough vs. LO Frequency at
Various Temperatures
0
–10
–20
–30
–40
–50
–60
0
–10
–20
–30
–40
–50
–60
T
T
T
= +85°C
= +25°C
= –40°C
T
T
T
= +85°C
= +25°C
= –40°C
A
A
A
A
A
A
SIDEBAND = LOWER
SIBEBAND = UPPER
SIDEBAND = LOWER
SIDEBAND = UPPER
–4
–3
–2
–1
0
1
7
8
9
10
11
12
13
14
LO POWER (dBm)
LO FREQUENCY (GHz)
Figure 45. LO to IF Feedthrough vs. LO Power at
Various Temperatures and Sidebands, LO Frequency = 10 GHz
Figure 42. LO to IF Feedthrough vs. LO Frequency at
Various Temperatures and Sidebands
0
0
–10
–20
–30
–40
–50
–60
SIDEBAND = LOWER
SIBEBAND = UPPER
T
T
T
= +85°C
= +25°C
= –40°C
T
T
T
= +85°C
= +25°C
= –40°C
A
A
A
A
A
A
–10
–20
–30
–40
–50
–60
–70
SIDEBAND = LOWER
SIBEBAND = UPPER
–5.0 –4.5 –4.0 –3.5 –3.0 –2.5 –2.0 –1.5 –1.0 –0.5
0
1.0
1.5
2.0
2.5
3.0
3.5
4.0
V
(V)
IF FREQUENCY (GHz)
CTL
Figure 43. LO to RF Feedthrough vs. IF Frequency at
Various Temperatures and Sidebands, IFx Pin = 0 dBm
Figure 46. LO to RF Feedthrough vs. VCTL at
Various Temperatures and Sidebands, IFx Pin = 0 dBm
Rev. A | Page 14 of 26
Data Sheet
ADMV1011
15
10
20
22GHz
10
0
5
–10
–20
–30
–40
–50
–60
–70
–80
0
T
T
T
= +85°C
= +25°C
= –40°C
A
A
A
–5
–10
–15
–20
–25
14GHz
T
T
T
= +85°C
= +25°C
= –40°C
A
A
A
6
7
8
9
10
11
12
13
26
24
–4
–3
–2
–1
0
1
2
3
4
LO POWER (dBm)
LO FREQUENCY (GHz)
Figure 47. 2× LO to RF Leakage vs. LO Frequency at
Various Temperatures, Without Nulling
Figure 50. 2× LO to RF Leakage vs. LO Power at
Various Temperatures and LO Frequencies, Without Nulling
20
10
0
PORT = LOWER
PORT = UPPER
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
V
V
V
V
V
V
= 0V
CTL
CTL
CTL
CTL
CTL
CTL
= –1.5V
= –2.0V
= –2.5V
= –3.0V
= –5.0V
12
14
16
18
20
22
24
12
14
16
18
20
22
24
26
2× LO FREQUENCY (GHz)
2× LO FREQUENCY (GHz)
Figure 48. 2× LO to RF Leakage vs. 2× LO Frequency at
Various Attenuation Levels (VCTL
Figure 51. 2× LO to IF Leakage vs. 2× LO Frequency for Upper Sideband and
Lower Sideband
)
0
–5
10
T
T
T
= +85°C
= +25°C
= –40°C
2× LO FREQUENCY = 18.07GHz
2× LO FREQUENCY = 22.97GHz
A
A
A
5
0
–5
–10
–15
–20
–25
–30
–35
–10
–15
–20
–25
–30
–35
–40
–45
–50
17
18
19
20
21
22
23
0
5
10
15
20
25
30
RF FREQUENCY (GHz)
ATTENUATION
Figure 49. RF Output Return Loss vs. RF Frequency at
Various Temperatures, LO Frequency = 10 GHz, 0 dBm
Figure 52. 2× LO to RF Leakage vs. Attenuation for Various Frequencies
Rev. A | Page 15 of 26
ADMV1011
Data Sheet
0
0
–5
–5
–10
–15
–20
–10
–15
–20
–25
–30
T
T
T
= +85°C
= +25°C
= –40°C
LO = +4dBm
LO = 0dBm
LO = –4dBm
A
A
A
–25
–30
7
8
9
10
11
12
13
7
8
9
10
11
12
13
LO FREQUENCY (GHz)
LO FREQUENCY (GHz)
Figure 53. LO Input Return Loss vs. LO Frequency at
Various Temperatures, LO = 0 dBm
Figure 55. LO Input Return Loss vs. LO Frequency at Various LO Powers
5
0
T
T
T
= +85°C
= +25°C
= –40°C
A
A
A
SIDEBAND = LOWER
SIBEBAND = UPPER
–5
–10
–15
–20
–25
–30
–35
–40
–45
–50
10
1010
2010
3010
4010
IF FREQUENCY (GHz)
Figure 54. IF Input Return Loss vs. IF Frequency at
Various Temperatures and Sidebands
Rev. A | Page 16 of 26
Data Sheet
ADMV1011
Upper Sideband
M × N SPURIOUS PERFORMANCE
Mixer spurious products are measured in dBc from the RF
output power level. Spurious values are measured using the
following equation: N × LO + M × IF. N/A means not applicable.
The frequencies are referred from the frequencies applied to the
pin of the ADMV1011.
Mixer spurious products are measured in dBc from the RF output
power level. N/A means not applicable.
Lower Sideband
Mixer spurious products are measured in dBc from the RF
output power level. Spurious values are measured using the
following equation: N × LO − M × IF. N/A means not applicable.
The frequencies are referred from the frequencies applied to the
pin of the ADMV1011.
IF = 2 GHz at 0 dBm, LO = 10.5 GHz at 0 dBm.
N × LO
1
2
3
4
5
50.5
58.2
69.5
81.7
91.1
93.9
22.3
0
68.5
81.9
90.1
95.3
102.8
101.4
53.7
65.6
47.6
78.5
83
N/A
N/A
N/A
N/A
N/A
N/A
0
1
2
3
4
5
IF = 2 GHz at 0 dBm, LO = 10 GHz at 0 dBm.
N × LO
41.1
41.2
59.9
70.4
1
2
3
4
5
M × IF
52.2
68.2
73.6
59
30.9
0
56.1
61.1
55.9
50.2
21.4
30.9
63.4
66.2
43.5
71.8
65.5
56.3
77.1
99.1
99
0
1
2
3
4
5
N/A
47.1
43.2
58.7
52.3
M × IF
101.4
99
IF = 3 GHz at 0 dBm, LO = 10 GHz at 0 dBm.
77.1
N/A
N × LO
63.2
1
2
3
4
5
50.9
58
30.2
0
54.7
82.2
90.9
98.2
101.3
N/A
72.1
67.1
48.5
92.3
N/A
N/A
78.4
N/A
N/A
N/A
N/A
N/A
0
1
2
3
4
5
IF = 3 GHz at 0 dBm, LO = 10.5 GHz at 0 dBm.
N × LO
74.9
87.1
79.4
N/A
58.3
66.6
100
N/A
1
2
3
4
5
M × IF
50.5
73
21.8
0
69.6
64.1
59.8
71.2
81.1
76
62.1
58.9
43.9
65.2
64.8
65
N/A
96.6
97.8
97.5
100.4
102.8
0
1
2
3
4
5
95.7
124.6
120.8
95.4
41.7
42.7
74.5
48.1
M × IF
IF = 4 GHz at 0 dBm, LO = 9.5 GHz at 0 dBm.
N × LO
1
2
3
4
5
53.3
58.1
64.8
80.6
96
47.1
0
42.1
79.6
97.9
94.8
98.3
94.8
55.9
79.7
49.8
95.8
N/A
N/A
94
0
1
2
3
4
5
IF = 4 GHz at 0 dBm, LO = 11 GHz at 0 dBm.
N/A
N/A
N/A
N/A
N/A
N × LO
63.7
62.4
103.5
100.6
1
2
3
4
5
M × IF
60.2
91.9
98.9
118.8
114
117.9
9.8
0
68.1
74.9
70
76.1
50.7
44.7
56.6
63.4
66.5
N/A
96.9
98.8
99.7
100.5
101.4
0
1
2
3
4
5
104.3
33.9
50.5
72.8
96.3
M × IF
70.8
81.9
99.5
Rev. A | Page 17 of 26
ADMV1011
Data Sheet
THEORY OF OPERATION
The ADMV1011 is a GaAs, MMIC, double sideband upconverter
in a RoHS compliant package optimized for upper sideband
and lower sideband point to point microwave radio applications
operating in the 17 GHz to 24 GHz output frequency range. The
ADMV1011 supports LO input frequencies of 8 GHz to 12 GHz
and IF input frequencies of 2 GHz to 4 GHz.
RF AMPLIFIER
The RF amplifier is a variable gain amplifier where the gain can
be adjusted by changing the control voltages (VCTL2 and
VCTL3). The RF amplifier requires two dc bias voltages
(VDRF1 and VDRF2) and two dc gate bias voltages (VGRF1
and VGRF2) to operate. Starting at −1.8 V at the gate supply
(VGRF1 and VGRF2), the RF amplifier is biased at 5 V (VDRF1
and VDRF2). Then, the gate bias (VGRF1 and VGRF2) is varied
until the desired RF amplifier bias current (IDRF1 and IDRF2)
is achieved. The desired RF amplifier bias current is 220 mA for
IDRF1 and 75 mA for IDRF2 under small signal conditions.
The ADMV1011 uses a variable gain RF amplifier and an I/Q
preceded by a double balanced mixer, where a driver amplifier
drives the LO (see Figure 1). The combination of design, process,
and packaging technology allows the functions of these
subsystems to be integrated into a single die, using mature
packaging and interconnection technologies to provide a high
performance, low cost design with excellent electrical,
The ADMV1011 has an internal band-pass filter between the
mixer and the RF driver amplifier that reduces LO leakage and
filters out the lower sideband at the RF output. The balanced
input drive allows exceptional linearity performance compared
to similar single-ended solutions.
mechanical, and thermal properties. In addition, the need for
external components is minimized, optimizing cost and size.
LO DRIVER AMPLIFIER
The LO driver amplifier takes a single LO input and doubles the
frequency, amplifying it to the desired LO signal level for the
mixer to operate optimally. The LO driver amplifier requires a
single dc bias voltage (VDLO), which draws about 160 mA at
3.5 V under the LO drive. The LO drive range of −4 dBm to
+4 dBm makes it compatible with Analog Devices, Inc.,
wideband synthesizer portfolio without the requirement for
an external LO driver amplifier.
The typical application circuit (see Figure 56) shows the
necessary external components on the bias lines to eliminate
any undesired stability problems for the RF amplifier and the
LO amplifier.
The ADMV1011 upconverter comes in a compact, thermally
enhanced, 4.9 mm × 4.9 mm, 32-terminal ceramic leadless chip
carrier (LCC) package. The ADMV1011 operates over the
−40°C to +85°C temperature range.
MIXER
The mixer is an I/Q double balanced mixer and reduces the
need for filtering unwanted sideband. An external 90° hybrid is
required to select the desired sideband of operation.
The ADMV1011 has been optimized to work with the
Mini-Circuits QCN-45+ RF 90° hybrid.
Rev. A | Page 18 of 26
Data Sheet
ADMV1011
APPLICATIONS INFORMATION
The evaluation board and the typical application circuit are
optimized for low-side LO (upper sideband) performance with
the Mini-Circuit QCN-45+ RF 90° hybrid.
TYPICAL APPLICATION CIRCUIT
The typical application circuit is shown in Figure 56. The
application circuit shown has been replicated for the evaluation
board circuit.
The ADMV1011 can support IF frequencies from 4 GHz to dc
because the I/Q mixers of the devices are double balanced.
VDRF1
VDRF1
5019
1
VDLO
VDLO
RF_OUT
1
C13
RF_OUT
1
5019
2
3 4
1µF
C11
25-146-1000-92
C23
AGND
1µF
C22
0.01µF
C12
VGRF1
VGRF1
5019
C7
C1
C17
100pF
100pF
AGND
1µF
0.01µF
100pF
AGND
AGND
AGND
VCTRL2
DUT
24
VCTRL2
VCTRL3
VGRF2
5019
C8
C10
1
100pF
0.33µF
GND
NIC
2
3
4
5
6
7
8
23
22
21
20
19
18
17
RFOUT
GND
NIC
NIC
AGND
NIC
NIC
ADMV1011AEZ
VGRF1
VCTL2
VCTL3
VGRF2
NIC
VCTRL3
5019
GND
LOIN
NIC
C9
C15
100pF
LO_IN
1
0.33µF
LO_IN
2
3
4
25-146-1000-92
AGND
AGND
VGRF2
5019
AGND
AGND
C6
C3
C16
1µF 0.01µF
100pF
AGND
VDRF2
VDRF2
5019
C18
C2
C19
1µF 0.01µF
100pF
AGND
L1
L2
VDI
VDQ
VDQ
VDI
5019
15nH
15nH
5019
C14
1µF
C26
C27
C5
220pF
220pF
1µF
T1
AGND
AGND
1
4
6
SUM_PORT
PORT_1
PORT_2
IF_INPUT_LSB
R4
3
1
IF_INPUT_LSB
50Ω_TERM
IF_INPUT_USB
1
0Ω
GND GND
R1
2
3
4
IF_INPUT_USB
2
5
QCN-45+
25-146-1000-92
0Ω
2
3 4
25-146-1000-92
AGND
AGND
AGND
Figure 56. Typical Application Circuit
Rev. A | Page 19 of 26
ADMV1011
Data Sheet
45
40
35
30
25
20
15
10
5
FINER RESOLUTION GAIN REGULATION
OUTPUT IP3 (dBm)
CONVERSION GAIN (dB)
The data shown in the Performance vs. Gain Regulation section
is shown based on VCTRL2 and VCTRL3 being equal. Finer
resolution of the gain regulation can be obtained if VCTRL2 and
VCTRL3 are used separately. Note that the overall dynamic
range stays the same. Figure 57 through Figure 60 show the
output IP3 and conversion gain when VCTRL2 and VCTRL3 are
used separately.
0
Figure 57 and Figure 58 show the upper sideband performance
for RFOUT at 23 GHz. Figure 59 and Figure 60 show the lower
sideband performance for RFOUT at 18 GHz. In Figure 57 and
Figure 59, VCTRL3 is held constant at −5 V, and VCTRL2 is
swept from −5 V to −0.75 V. When VCTRL2 = −0.75 V, VCTRL3
is swept from −5 V to −0.75 V. In Figure 58 and Figure 60,
VCTRL2 is held constant at −5 V, and VCTRL3 is swept from
−5 V to −0.75 V. When VCTRL3 = −0.75 V, VCTRL 2 is swept
from −5 V to −0.75 V.
–5
–10
–15
–20
VCTRL3 = –5V
VCTRL2 = –5V TO –0.75V
VCTRL2 = –0.75V
VCTRL3 = –5V TO –0.75V
V
(V)
CTRL
Figure 59. Output IP3 and Conversion Gain vs. VCTRL when VCTRL2 and
VCTRL3 Used Separately for Lower Sideband at RFOUT = 18 GHz,
TA = 25°C, LO = 0 dBm, IF = 3 GHz
45
40
35
30
25
20
15
10
5
45
OUTPUT IP3 (dBm)
CONVERSION GAIN (dB)
OUTPUT IP3 (dBm)
CONVERSION GAIN (dB)
40
35
30
25
20
15
10
5
0
0
–5
–10
–15
–20
–5
–10
VCTRL2 = –5V
VCTRL3 = –5V TO –0.75V
VCTRL3 = –0.75V
VCTRL2 = –5V TO –0.75V
VCTRL3 = –5V
VCTRL2 = –5V TO –0.75V
VCTRL2 = –0.75V
VCTRL3 = –5V TO –0.75V
–15
–20
V
(V)
CTRL
V
(V)
CTRL
Figure 60. Output IP3 and Conversion Gain vs. VCTRL when VCTRL2 and
VCTRL3 Used Separately for Lower Sideband at RFOUT = 18 GHz,
TA = 25°C, LO = 0 dBm, IF = 3 GHz
Figure 57. Output IP3 and Conversion Gain vs. VCTRL when VCTRL2 and
VCTRL3 Used Separately for the Upper Sideband at RFOUT = 23 GHz,
TA = 25°C, LO = 0 dBm, IF = 3 GHz
45
OUTPUT IP3 (dBm)
CONVERSION GAIN (dB)
40
35
30
25
20
15
10
5
0
–5
–10
VCTRL2 = –5V
VCTRL3 = –5V TO –0.75V
VCTRL3 = –0.75V
VCTRL2 = –5V TO –0.75V
–15
–20
V
(V)
CTRL
Figure 58. Output IP3 and Conversion Gain vs. VCTRL when VCTRL2 and
VCTRL3 Used Separately for Upper Sideband at RFOUT = 23 GHz,
TA = 25°C, LO = 0 dBm, IF = 3 GHz
Rev. A | Page 20 of 26
Data Sheet
ADMV1011
Figure 61 shows the conversion gain vs. VCTRL2 for different
VCTRL3 voltages at RFOUT = 23 GHz. Figure 61 shows 30 dB
attenuation can be obtained at VCTRL2 = −1 V and VCTRL3 =
−2 V. The overall attenuation range is 35 dB.
25
Figure 62 shows the conversion gain vs. VCTRL3 for different
VCTRL2 voltages at RFOUT = 23 GHz. Figure 62 shows 30 dB
attenuation can be obtained at VCTRL2 = −1 V and VCTRL3 =
−1 V. The overall attenuation range is 37 dB.
25
VCTRL2 = –5.00V
VCTRL2 = –3.00V
VCTRL2 = –2.00V
VCTRL2 = –1.75V
20
15
10
5
20
15
10
5
VCTRL3 = –5.00V
VCTRL3 = –3.00V
VCTRL3 = –2.00V
VCTRL3 = –1.75V
VCTRL3 = –1.50V
VCTRL3 = –1.25V
VCTRL3 = –1.00V
VCTRL3 = –0.50V
0
–5
0
–5
VCTRL2 = –1.50V
–10
–15
–20
–10
–15
–20
VCTRL2 = –1.25V
VCTRL2 = –1.00V
VCTRL2 = –0.50V
–5.0 –4.5 –4.0 –3.5 –3.0 –2.5 –2.0 –1.5 –1.0 –0.5
0
–5.0 –4.5 –4.0 –3.5 –3.0 –2.5 –2.0 –1.5 –1.0 –0.5
0
VCTRL2 (V)
VCTRL3 (V)
Figure 61. Conversion Gain vs. VCTRL2 at Different VCRTL3 Voltages
Figure 62. Conversion Gain vs. VCTRL3 at Different VCRTL2 Voltages
Rev. A | Page 21 of 26
ADMV1011
Data Sheet
7. Connect LOIN to the LO signal generator with a LO power
between −4 dBm to +4 dBm.
8. For the upper sideband, add a 0 Ω resistor (R1) and
remove the R4 resistor from the board. For the lower
sideband, add a 0 Ω resistor (R4) and remove the R1
resistor from the board.
EVALUATION BOARD INFORMATION
The circuit board used in the application must use RF circuit
design techniques. Signal lines must have 50 Ω impedance, and
the package ground leads and exposed pad must be connected
directly to the ground plane (see Figure 63 and Figure 64). Use a
sufficient number of via holes to connect the top and bottom
ground planes. The evaluation circuit board shown in Figure 65
is available from Analog Devices, upon request.
9. Apply the IF signal to the appropriate port.
Power-Off Sequence
Layout
Take the following steps to turn off the EVAL-ADMV1011:
Solder the exposed pad on the underside of the ADMV1011 to
a low thermal and electrical impedance ground plane. This pad
is typically soldered to an exposed opening in the solder mask
on the evaluation board. Connect these ground vias to all other
ground layers on the evaluation board to maximize heat
dissipation from the device package. Figure 63 shows the PCB
land pattern footprint for the EVAL-ADMV1011, and Figure 64
shows the solder paste stencil for the EVAL-ADMV1011.
1. Turn off the LO and IF signals.
2. Set VGRF1 and VGRF2 to −1.8 V.
3. Set VCTL2 and VCTL3 to 0 V.
4. Set the VDRF1 and VDRF2 supplies to 0 V and then turn
off the VDRF1 and VDRF2 supplies.
5. Set the VDLO supply to 0 V and then turn off the VDLO
supply.
6. Turn off the VGRF1, VGRF2, VCTL2, and VCTL3 supplies.
Power-On Sequence
2× LO Suppression
Take the following steps to turn on the EVAL-ADMV1011:
The EVAL-ADMV1011 can suppress the 2× LO signal through
the VDI and VDQ test points. The common mode of the two IF
signals is 0 V. Injecting a nonzero voltage at VDI and VDQ can
change the 2× LO level. The 2× LO signal is referenced from the
LOIN pin of the ADMV1011. The VDI and VDQ voltage needs
to be changed iteratively to get the desired level of 2 × LO
suppression. To prevent device malfunction or failure, the
current to the VDI and VDQ test points (IDI and IDQ) must
not source or sink more than 2 mA of current.
1. Power up VGRF1 andVGRF2 with a −1.8 V supply.
2. Power up VCTL2 and VCTL3 with a −5 V supply for
maximum conversion gain.
3. Power up VDRF1 and VDRF2 with a 5 V supply.
4. Power up VDLO with a 3.5 V supply.
5. Adjust the VGRF1 supply between −1.8 V to −0.8 V until
IDRF1 = 220 mA.
6. Adjust the VGRF2 supply between −1.8 V to −0.8 V until
IDRF2 = 75 mA.
Rev. A | Page 22 of 26
Data Sheet
ADMV1011
0.217" SQUARE
0.004" MASK/METAL OVERLAP
0.010" MINIMUM MASK WIDTH
SOLDER MASK
GROUND PAD
PAD SIZE
0.026" × 0.010"
PIN 1
0.197"
[0.50]
0.156"
MASK
OPENING
ø.034"
TYPICAL
VIA SPACING
ø.010"
TYPICAL VIA
0.010" REF
0.138" SQUARE MASK OPENING
0.02 × 45° CHAMFER FOR PIN 1
0.030"
MASK OPENING
0.146" SQUARE
GROUND PAD
Figure 63. PCB Land Pattern Footprint of the EVAL-ADMV1011
0.017
0.0197
TYP
0.219
SQUARE
0.132
SQUARE
0.017
0.027
TYP
R0.0040 TYP
132 PLCS
0.010
TYP
Figure 64. Solder Paste Stencil of the EVAL-ADMV1011
Rev. A | Page 23 of 26
ADMV1011
Data Sheet
NOTES
1. NOT ALL COMPONENTS OR BIAS LINES ARE USED ON THE EVALUATION BOARD.
Figure 65. EVAL-ADMV1011 Evaluation Board Top Layer
Rev. A | Page 24 of 26
Data Sheet
ADMV1011
BILL OF MATERIALS
Table 7.
Qty. Reference Designator
Description
Manufacturing/Part No.
1
4
7
Evaluation board
C1 to C3, C11
C10, C12, C15 to C17, C19, C22
PCB
Analog Devices/08_042363a
Murata/GRM155R71E103KA01D
TDK/C1005NP01H101J050BA
0.01 µF ceramic capacitors, X7R, 0402
100 pF multilayer ceramic capacitors, NP0,
high temperature, C0402
7
C5 to C7, C13, C14, C18, C23
1 µF monolithic ceramic capacitors, X5R,
C0603
Murata/GRM188R61E105KA12D
2
C8, C9
0.33 µF ceramic capacitors, X5R, C0603
AVX/0603YD334KAT2A
2
10
C26, C27
220 pF ceramic capacitors, C0G, 0402, C0402
Connector PCB test points, compact mini,
5019, CNKEY5019
Murata/GRM1555C1H221JA01D
Keystone Electronic Corp/5019
AGND, VDI, VDQ, VDLO, VDRF1,
VDRF2, VGRF1, VGRF2, VCTL2 to
VCTL3
4
LO_IN, RF_OUT,
IF_INPUT_LSB, IF_INPUT_USB
Connector PCB SMA, K_SRI-NS,
CNSMAL460W295H156
SRI Connector Gage/25-146-1000-92
2
2
L1, L2
R1, R4
15 nH inductor chips, 0402, L0402-2
0 Ω resistors, chip surface-mounted diode
jumper, 0402
Coilcraft/0402HP-15NXJLU
Panasonic/ERJ-2GE0R00X
1
1
1
R2
R3
T1
50 Ω resistor, high frequency chip, R0402
50 Ω resistor, high frequency chip, 0402, R0402
Transformer power splitter/combiner,
2500 to 4500 MHz, TSML126W63H42
Vishay Precision Group/FC0402E50R0BST1
Vishay Precision Group/FC0402E50R0FST1
Mini-Circuits/QCN-45+
Heatsink
Heatsink
114622-A/111332
Rev. A | Page 25 of 26
ADMV1011
Data Sheet
OUTLINE DIMENSIONS
5.05
4.90 SQ
4.75
0.36
0.30
0.24
PIN 1
0.08
REF
INDICATOR
PIN 1
32
25
24
1
0.50
BSC
3.60
3.50 SQ
3.40
EXPOSED
PAD
17
8
16
9
0.38
0.32
0.26
0.20 MIN
BOTTOM VIEW
3.50 REF
TOP VIEW
SIDE VIEW
1.10
1.00
0.90
4.10 REF
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
SEATING
PLANE
SECTION OF THIS DATA SHEET.
Figure 66. 32-Terminal Ceramic Leadless Chip Carrier [LCC]
(E-32-1)
Dimensions shown in millimeters
ORDERING GUIDE
Model1
Temperature Range
Package Body Material Lead Finish
Package Description Package Option
ADMV1011AEZ
ADMV1011AEZ-R7 −40°C to +85°C
ADM1011-EVALZ
−40°C to +85°C
Alumina Ceramic
Alumina Ceramic
Gold Over Nickel
Gold Over Nickel
32-Terminal LCC
32-Terminal LCC
Evaluation Board
E-32-1
E-32-1
1 Z = RoHS Compliant Part.
©2017-2018 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D15776-0-2/18(A)
Rev. A | Page 26 of 26
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