ADN8831 [ADI]
Thermoelectric Cooler (TEC) Controller; 热电冷却器（ TEC ）控制器
| 型号： | ADN8831 |
| 厂家： | 
ADI |
| 描述： | Thermoelectric Cooler (TEC) Controller |
| 文件： | 总11页 (文件大小：504K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Thermoelectric Cooler (TEC)
Controller
Preliminary Technical Data
ADN8831
FEATURES
GENERAL DESCRIPTION
True current sensing and over current protection
Separate heating and cooling current limits
High efficiency: >90%
Long-term temperature stability: 0.1°C
Temperature lock indication
The ADN8831 is a monolithic controller that drives a
Thermoelectric Cooler (TEC) to stabilize the temperature of a
laser diode or a passive component used in
telecommunications equipment.
Temperature monitoring output
This device relies on a Negative Temperature Coefficient
(NTC) thermistor or a positive temperature coefficient RTD
device to sense the temperature of the object attached to the
TEC. The target temperature is set with an analog input
voltage either from a DAC or with an external resistor divider.
Oscillator synchronization with an external signal
Clock phase adjustment for multiple controllers
Programmable switching frequency up to 1MHz
Programmable maximum TEC voltage
Low noise: <0.05% TEC current ripple
TEC current monitoring
The loop is stabilized by a PID compensation amplifier with
high stability and low noise. The compensation network can
be adjusted by the user to optimize temperature settling time.
The component values for this network can be calculated
based on the thermal transfer function of the laser diode or
obtained from the look-up table given in the applications
notes.
Compact 5mm x 5mm LFCSP
APPLICATIONS
Thermoelectric Cooler (TEC) temperature control
Resistive heating element control
Temperature-Stabilization Substrate (TSS) control
Voltage outputs are provided to monitor both the temperature
of the object and the voltage across the TEC. A 2.5V voltage
reference is provided for the thermistor temperature sensing
bridge.
FUNCTIONAL BLOCK DIAGRAM
Thermistor
An external sense resistor provides true current sensing.
Current limits for both heating and cooling can be set
independently.
PID
Error
Input
MOSFET
Drivers
Limiter
Compensation
Network
Amplifier
Temp
Controls
Set Input
2.5V
Reference
Oscillator
Heating
ILim
Cooling
ILim
VLim
Freq/Phase
Control
Rev. PrC
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.326.8703
www.analog.com
© 2004 Analog Devices, Inc. All rights reserved.
ADN8831
PRELIMINARY TECHNICAL DATA
TABLE OF CONTENTS
Theory of Operation 9
Specifications 3
Introduction...................................................................................9
Outline Dimensions 10
Absolute Maximum Ratings 5
Pin Configuration......................................................................... 6
Pin Descriptions ........................................................................... 6
Ordering Guide 11
REVISION HISTORY
Revision PrC
7/03—Data Sheet Changed from REV PrB to REV PrC.
Rev. C | Page 2 of 11
PRELIMINARY TECHNICAL DATA
ADN8831
SPECIFICATIONS
Table 1. ADN8831—Electrical Characteristics (V+ = 3.0 V to 5.5 V, TA = 25°C, unless otherwise noted.)
Parameter
TEMPERATURE STABILITY
Long Term Stability
Symbol
Conditions
Min
Typ
Max
0.01
Unit
10 kΩ thermistor with α = -4.4% at 25C
CL = 3,300 pF
°C
PWM OUTPUT DRIVERS
Output Transition Time
Nonoverlapping Clock Delay
Output Resistance
tR, tF
20
65
6
ns
ns
Ω
50
0
RO(N1,P1)
I = 10 mA
L
Output Voltage Swing
Output Voltage Ripple
Output Current Ripple
LINEAR OUTPUT AMPLIFIER
Output Resistance
SFB
VLIM = 0 V
VDD
V
∆SFB
∆ITEC
fCLK = 1 MHz
fCLK = 1 MHz
0.2
0.2
%
%
RO, LNGATE
RO, LPGATE
I
I
= 2 mA
= 2 mA
85
178
Ω
Ω
OUT
OUT
Output Voltage Swing
POWER SUPPLY
LFB
0
VDD
5.5
V
Power Supply Voltage
VDD
ISY
3.0
V
Supply Current
PWM not switching
-40C ≤ TA ≤ +85
8
12
15
mA
mA
Shutdown Current
ISD
ISS
SD
5
2
µA
µA
SYNCIN/ = 0 V
Soft-Start Charging Current
Undervoltage Lockout
Standby Current
UVLO
ISB
Low to high threshold
2.5
1
2.7
V
SD
SINCIN/ = VDD, SS/SB = 0 V
mA
Standby Threshold
VSB
SD
200
300
mV
SYNCIN/ = VDD
ERROR AMPLIFIERS
Input Offset Voltage
V
V
VCM1 = 1.5 V, VIN1P – VIN1M
10
10
100
100
µV
µV
OS1
OS2
V
CM2 = 1.5 V, VIN2P – VIN2M
Input Voltage Range
VCM1,2
0
0
VDD
V
Common-Mode Rejection Ratio
Output Voltage Range
CMRR1,2
VOUT1,2
120
120
2
dB
V
VDD
Power Supply Rejection Ratio
PSRR1,2
3.0 V ≤ VDD ≤ 5.0 V
dB
Output Current
Gain Bandwidth Product
OSCILLATOR
IOUT1,2
-5
+5
mA
GBW1,2
MHz
Sync Range
fCLK
fCLK
SD
200
800
1,000
1,250
KHz
kHz
SYNCIN/ connected to external clock
Oscillator Frequency
COMPOSC = VDD, RFREQ = 150kΏ,
1,000
SD
SYNCIN/ = VDD
Free-Run Oscillation Frequency
fCLK
COMPOSC = VDD
,
100
25
1000
335
KHz
SD
SYNCIN/ = VDD
0.1 V ≤ VPHASE ≤ 2.4 V
PHASE = open
Phase Adjustment Range
Phase Adjustment Default
ΦCLK
ΦCLK
°
°
180
REFERENCE VOLTAGE
Reference voltage
VREF
IREF < 2mA
2.37
2.47
2.57
0.2
V
LOGIC OUTPUTS
Logic Low Output Level
Logic High Outut Threshold
TEMPGD, SYNCOUT
V
V
VDD
-
0.2V
Rev. C | Page 3 of 11
ADN8831
PRELIMINARY TECHNICAL DATA
Table 2. ADN8831—Electrical Characteristics (V+ = 3.0 V to 5.5 V, TA = 25°C, unless otherwise noted.)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
TEC CURRENT MEASUREMENT
ITEC Gain
AV,ITEC
VITEC
VITEC/(VLFB-VCS)
98
0
100
102
VDD
VDD
1.3
V/V
V
ITEC Output Range
ITEC Input Range
VCS, VLFB
VITEC, B
IOUT,TEC
0
V
ITEC Bias Voltage
VLFB = VCS = 0
VVTEC/(VLFB-VSFB
1.2
1.25
1
V
ITEC Output Current
TEC VOLTAGE MEASUREMENT
VTEC Gain
mA
AV,VTEC
VVTEC
VVTEC,B
IVTEC
)
0.23
0
0.25
0.27
2.5
V/V
V
VTEC Output Range
VTEC Bias Voltage
VTEC Output Current
VOLTAGE LIMIT
VLFB = VSFB = 2.5V
1.2
1.25
1
1.3
V
mA
VLIM Gain
AV,LIM
VSFB/VVLIM
5
V/V
V
VLIM Input Range
VLIM Input Current, cooling
VLIM Input Current, heating
VVLIM
0
VDD
IVLIM,COOL
IVLIM,HEAT
IVLIM,HEAT
VOUT2 < 1.25V
VOUT2 >1.25V
IVLIM/IFREQ
100
nA
mA
A/A
IFREQ
1.0
VLIM Input Current Accuracy,
heating
0.9
1.1
CURRENT LIMIT
ILIMC Input Voltage Range
ILIMH Input Voltage Range
ILIMC Limit Threshold
ILIMH Limit Threshold
TEMPERATURE GOOD
High Threshold
VILIMC
1.25
0
VDD
V
V
V
V
VILIMH
1.25
2.02
0.52
VTH,ILIMC
VTH,ILIMH
VITEC = 2.0V
VITEC = 0.5V
1.98
0.48
2.0
0.5
VOUT1,TH1
VOUT1,TH2
IN2M tied to OUT2, VIN2P = 1.5V
IN2M tied to OUT2, VIN2P = 1.5V
1.525
1.530
V
V
Low Threshold
1.470 1.475
Rev.Pr C | Page 4 of 11
PRELIMINARY TECHNICAL DATA
ABSOLUTE MAXIMUM RATINGS
ADN8831
Table 3. Absolute Maximum Ratings (at 25°C, unless
otherwise noted)
Table 2. Thermal Resistance
1
Package Type
Unit
θJA
θJC
Parameter
Rating
32-lead LFCSP (ACP)
35
10
°C/W
Supply Voltage
6 V
Input Voltage
GND to Vs + 0.3V
–65°C to +150°C
–40°C to +85°C
125°C
Storage Temperature Range
Operating Temperature Range
Operating Junction Temperature
1 θJA is specified for the worst-case conditions, i.e., θJA is specified for device
soldered in circuit board for surface mount packages.
Lead Temperature Range (Soldering, 60 Sec) 300°C
Rev. C | Page 5 of 11
ADN8831
PRELIMINARY TECHNICAL DATA
Pin Configuration
Pin Descriptions
Pin No.
Mneumonic
Type
Description
1
ILIMC
IN1P
Analog Input
Analog Input
Analog Input
Analog Output
Analog Input
Analog Input
Analog Output
Analog Output
Power
Analog input sets TEC cooling current protection limit.
Non-inverting input to error amplifier.
Inverting input to error amplifier.
2
3
IN1M
OUT1
IN2P
4
Output of error amplifer.
5
Non-inverting input to compensation amplifier.
Inverting input to compensation amplifier.
Output of compensation amplifier.
6
IN2M
OUT2
VREF
7
8
2.5V Voltage Reference output.
9
AVDD
PHASE
TMPGD
Power for non-driver sections. 3.0 V min; 5.5V max.
Sets SYNCOUT clock phase relative to SYNCIN clock.
10
11
Analog Input
Digital Output
Indicates when thermistor temperature is within 0.01°C if target temperature as
set by TEMPSET voltage.
12
13
14
AGND
FREQ
Ground
Analog ground. Connect to low noise ground.
Sets switching frequency with an external resistor.
Analog Input
Analog Input
SB
SS/
Sets soft-start time for output voltage. Pull low to put ADN8831 into standby mode
(VTEC = 0V).
15
16
SYNCO
Digital Output
Digital Input
Phase adjustment clock output. Phase set from PHASE pin. Used to drive SYNCIN of
other ADN8831 devices.
SD
SYNCI/
Optional clock input. If not connected, clock frequency is set by FREQ pin. Pull low
to put ADN8831 into shutdown mode.
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
COMPOSC
PVDD
SPGATE
SWITCH
SNGATE
PGND
SFB
Analog Output
Power
Comensation for oscillator; connect capacitor to ground.
Power for output driver sections. 3.0V min; 5.5V max.
Drives PWM output external PMOS gate.
Connects to PWM FET drains.
Analog Output
Analog Input
Analog Output
Ground
Drives PWM output external NMOS gate.
Power ground. External NMOS devices connect to PGND. Connect to digital ground.
PWM feedback. Typically connects to TEC- pin of TEC.
Comensation for switching amplifier.
Analog Input
Analog Input
Analog Ouput
Analog Output
Analog Input
Analog Input
Analog Ouput
Analog Ouput
Analog Input
Analog Input
COMPSW
LPGATE
LNGATE
LFB
Drives linear output external PMOS gate.
Drives linear output external NMOS gate.
Linear feedback. Will typically connect to TEC+ pin of TEC.
Connect to output current sense resistor.
Indicates TEC current.
CS
ITEC
VTEC
Indicates TEC voltage.
VLIM
Sets maximum TEC voltage.
ILIMH
Sets TEC heating current protection limit.
Rev.Pr C | Page 6 of 11
PRELIMINARY TECHNICAL DATA
ADN8831
DETAILED BLOCK DIAGRAM
Figure 2. Detailed Block Diagram
Rev. C | Page 7 of 11
ADN8831
PRELIMINARY TECHNICAL DATA
TYPICAL APPLICATION CIRCUIT
Figure 3. Typical Application Circuit I
Rev.Pr C | Page 8 of 11
PRELIMINARY TECHNICAL DATA
ADN8831
THEORY OF OPERATION
Introduction
ADN8831 to provide efficiency of >90%, while minimizing
external filtering component count. The ADN8831 requires
only one inductor and one capacitor to filter the switching
frequency of the switched output. For most applications, a
4.7uH inductor, a 22uF capacitor and a switching frequency of
1MHz maintains less than 0.5% worst-case output voltage ripple
across the TEC.
The ADN831 is a thermoelectric cooler (TEC) controller used
to set and stabilize the temperature of the TEC. A voltage
applied to the input of the ADN8831 corresponds to a target
temperature set-point. Using a thermistor to monitor the
current temperature of the target object, the ADN8831 applies
the appropriate current to the TEC to pump heat either towards
or away from the target object until the set-point temperature is
reached.
The switched output is controlled by the ADN8831’s oscillator.
A single resistor on the FREQ pin (pin #13) sets the switching
frequency from 100kHz to 1MHz. The clock output is available
at the SYNCO pin (pin #15). Connecting SYNCO to the SYNI
pin of another ADN8831 allows multiple ADN8831s to be
driven using a single clock.
Self correcting auto-zero amplifiers (chop1 and chop2) are used
in the input and compesation stages of the aDN8831 to provide
a maximum offset voltage of 100uV over time and temperature.
This results in a final temperature accuracy of 0.01C in typical
applications, eliminating the ADN8831 as an error source in the
temperature control loop.
The clock phase can be changed using a simple resistor divider
at the PHASE pin )pin #10). Phase adjustment allows two or
more ADN8831 devices to operate from the same clock
frequency and not have all outputs switch simultaneously,
which could create excessive power supply ripple. Details of
how to adjust the clock frequency and phase are provided in the
Setting the Frequency section.
The TEC is driven differentially using an H-bridge
configuration. The ADN8831 drives external transistors that are
used to provide the current to the TEC. The maximum voltage
across the TEC and current flowing through the TEC can be set
using the VLIM and ILIM pins. Additional details are provided
in the Setting Voltage and Current Limits section.
The logic output of the TEMPGD pin (pin #11) indicates when
the target temperature is reached. Shutdown, standby, and true
current-sensing are also provided by the ADN8831 to protect
from catastrophic system failures that could damage the TEC.
One side of the H-bridge uses a switched output, while the
other is linear. This proprietary configuration allows the
Rev. C | Page 9 of 11
ADN8831
PRELIMINARY TECHNICAL DATA
OUTLINE DIMENSIONS
Figure 1. 32-Lead Lead Frame Chip Scale Package [LFCSP]
(CP-32)
Dimensions Shown in Millimeters
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the
human body and test equipment and can discharge without detection. Although these products feature
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev.Pr C | Page 10 of 11
PRELIMINARY TECHNICAL DATA
ADN8831
ORDERING GUIDE
Table 3.
Model
Temperature Range
-40°C to +85°C
Package Description
Package Option
ADN8831ACP
ADN8831-EVAL
32-Lead Lead Frame Chip Scale Package
Evaluation Board
CP-32
-40°C to +85°C
©
2003 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective companies.
PR04663-0-2/04(PrC)
Rev. C | Page 11 of 11
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