ADP3205 [ADI]
Multiphase IMVP-IV Core Controller for Mobile CPUs; 多相IMVP -IV核心控制器的移动处理器
| 型号： | ADP3205 |
| 厂家： | 
ADI |
| 描述： | Multiphase IMVP-IV Core Controller for Mobile CPUs |
| 文件： | 总1页 (文件大小：71K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Multiphase IMVP-IV
Core Controller for Mobile CPUs
ADP3205
FEATURES
GENERAL DESCRIPTION
Pin Programmable 1-, 2-, or 3-Phase Operation
Excellent Static and Dynamic Current Sharing
Superior Load Transient Response when Used with
ADOPT™ Optimal Positioning Technology
Noise-Blanking for Speed and Stability
Synchronous Rectification Control for Optimized Light
Load Efficiency
Soft DAC Output Voltage Transition for VID Change
Cycle-by-Cycle Current Limiting
Latched or Hiccup Current Overload Protection
Masked Power Good during Output Voltage Transients
Soft Start-Up without Power-On In-Rush Current Surge
2-Level Overvoltage and Reverse-Voltage Protection
The ADP3205 is a 1-, 2-, or 3-phase hysteretic peak current mode
dc-to-dc buck converter controller dedicated to powering a mobile
processor’s core. The chip optimized low voltage design runs from
the 3.3 V system supply. The chip contains a precision 6-bit DAC
whose nominal output voltage is set by VID code. The ADP3205
features high speed operation to allow a minimized inductor size
that results in the fastest possible change of current to the output.
To further minimize the number of output capacitors, the con-
verter features active voltage positioning enhanced with ADOPT
optimal compensation to ensure a superior load transient response.
The output signals interface with ADP3415 MOSFET drivers,
which that are optimized for high speed and high efficiency. The
ADP3205 is capable of providing synchronous rectification control
to extend battery lifetime in light load conditions.
APPLICATIONS
IMVP-IV CPU Core DC-to-DC Converters
Programmable Output Power Supplies
The ADP3205 is specified over the extended commercial temperature
range of 0°C to 100°C and is available in a 40-lead LFCSP package.
FUNCTIONAL BLOCK DIAGRAM
DRV3 DRVLSD3
DRV2 DRVLSD2
DRV1 DRVLSD1
36
39
38
37
35
34
ADP3205
33
CS3
CS2
CS1
TSYNC
CURRENT
SENSE
MUX
40
VDACREF
VBG
HYSTERESIS SET
AND
CLIM SET
PSI
HYSSET
CLIM/ZCS
CMP
CS+
CS–
HYS/CLIM
CONTROL
AND
CS MUX/
PHASE CONTROL
CORE
CMP
RAMP
REG
DRVCTRL
VBG
DPSHIFT
SET
DPSHIFT
DPSLP
VREF
VREF
BOOT
BOOTSET
DPRSET
REF
MUX
DACREF
DPRSLP
DACREFFB
VID5
VID4
DAC
RES
VID3
NETWORK
VID2
VID1
VID0
CORE ABOVE CMP
CORE BELOW CMP
PWRGD
COREFB
PRWGD
VBG
VREF
MASKING
CLKEN
TPWRGD
DPWRGD
DRVCTRL
MASK
PRWGD
DELAY
COREGD
PWRGD
LATCH
DVP CMP
VOV
BOOT
EOFSS
ALARM
LATCHEN
OVP
LATCH
19
SS
SS/LATCH-OFF
TIMER
RVP
LATCH
SD
VREF
VBG
BAND GAP
AND
REF AMP
UVLO CMP
BIAS ENABLER
ALARM RST
VRV
VCC 22
GND
RVP CMP
RST
CLAMP
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, norforanyinfringementsofpatentsorotherrightsofthirdpartiesthat
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
www.analog.com
© 2003 Analog Devices, Inc. All rights reserved.
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