CN-0082 [ADI]

Creating a Constant Envelope Signal Using the ADL5331 RFVGA and AD8319 Log Detector; 创建一个恒定包络信号使用ADL5331 RFVGA和AD8319对数检测器
CN-0082
型号: CN-0082
厂家: ADI    ADI
描述:

Creating a Constant Envelope Signal Using the ADL5331 RFVGA and AD8319 Log Detector
创建一个恒定包络信号使用ADL5331 RFVGA和AD8319对数检测器

文件: 总4页 (文件大小:270K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
Circuit Note  
CN-0082  
Devices Connected/Referenced  
ADL5331 RF Variable Gain Amplifier (VGA)  
Circuit Designs Using Analog Devices Products  
Apply these product pairings quickly and with confidence.  
For more information and/or support call 1-800-AnalogD  
(1-800-262-5643) or visit www.analog.com/circuit.  
AD8319  
AD5621  
45-dB RF Log Detector/Controller  
12-Bit nanoDAC®  
Creating a Constant Envelope Signal Using the ADL5331 RFVGA  
and AD8319 Log Detector  
CIRCUIT FUNCTION AND BENEFITS  
CIRCUIT DESCRIPTION  
Overall performance of a transmitter, wired or wireless, is a strong  
function of the output power of the amplifier. If the signal is weak,  
bit error rate (BER) or modulation error rate (MER) will degrade  
due to low SNR. If the signal is too strong, distortion will cause the  
same issues. This circuit uses the ADL5331 VGA, the AD8319  
power detector, and the AD5621 low power nanoDAC to generate  
output power control accurate to 12 bits. The AD8319 has very  
high temperature stability to compensate for any gain variation  
over temperature of the VGA, resulting in very accurate power  
control over a wide temperature range. Because the AD8319  
control input VSET and the output VOUT are related to the RF input  
on a volts/dB scale and the AD5621 nanoDAC has a linear transfer  
function, the resulting output power control will be a linear-in-dB  
vs. DAC input code.  
The ADL5331 variable gain amplifier provides accurate gain  
control. However, more precise regulation of output power is  
achieved with an automatic gain control (AGC) loop. Figure 1  
shows the ADL5331 operating in an AGC loop. The addition of  
the AD8319 log amp allows the AGC to have improved  
temperature stability over a wide output power control range.  
To operate the ADL5331 VGA in an AGC loop, a sample of the  
output RF is back to the detector (typically using a directional  
coupler and additional attenuation). A setpoint voltage is  
applied by the AD5621 DAC to the VSET input of the detector  
while VOUT is connected to the GAIN pin of the ADL5331.  
Based on the detector’s defined linear-in-dB relationship  
between VOUT and the RF input signal, the detector adjusts the  
voltage on the GAIN pin (the detector’s VOUT pin is an error  
+5V  
+5V  
RF INPUT  
SIGNAL  
RF OUTPUT  
SIGNAL  
120nH  
100pF  
120nH  
VPOS  
100pF  
COMM  
OPHI  
INHI  
ADL5331  
100pF  
INLO  
OPLO  
23dB  
DIRECTIONAL  
COUPLER  
100pF  
ETC1-1-13  
(M/A-COM)  
ETC1-1-13  
(M/A-COM)  
GAIN  
+5V  
+5V  
SETPOINT  
VOLTAGE  
VDD  
SYNC  
SCLK  
SDIN  
VOUT  
VSET  
VPOS  
1nF  
1nF  
1kΩ  
AD5621  
VOUT  
220pF  
INHI  
12-BIT DAC  
GND  
490Ω  
AD8319  
LOG AMP  
CLPF INLO  
COMM  
Figure 1. ADL5331 Operating in an Automatic Gain Control Loop in Combination  
with the AD8319 and AD5621 (Simplified Schematic)  
Rev. 0  
“Circuits from the Lab” from Analog Devices have been designed and built by Analog Devices  
engineers. Standard engineering practices have been employed in the design and construction of  
each circuit, and their function and performance have been tested and verified in a lab environment  
at room temperature. However, you are solely responsible for testing the circuit and determining its  
suitability and applicability for your use and application. Accordingly, in no event shall Analog  
Devices be liable for direct, indirect, special, incidental, consequential or punitive damages due to  
anycause whatsoever connectedto the use ofany“Circuit fromthe Lab. (Continued on last page)  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.461.3113  
www.analog.com  
©2009 Analog Devices, Inc. All rights reserved.  
 
CN-0082  
Circuit Note  
20  
10  
5.0  
amplifier output) until the level at the RF input corresponds to  
the applied setpoint voltage. GAIN settles to a value that results  
in the correct balance between the input signal level at the  
detector and the setpoint voltage.  
POWER OUT  
STRAIGHT LINE  
ERROR  
2.5  
0
0
The basic connections for operating the ADL5331 in an AGC  
loop with the AD8319 are shown in Figure 1. The AD8319 is a  
1 MHz to 10 GHz precision demodulating logarithmic  
amplifier. It offers a detection range of 45 dB with 0.5 dB  
temperature stability. The VOUT pin of the AD8319 controls the  
GAIN (gain control) pin of the ADL5331. When the AD8319 is  
in controller mode, as it is in this application, VOUT on the  
AD8319 can drive the ADL5331 GAIN pin over its full linear  
range of 0 V to 1.4 V. Under very low power RF in conditions,  
outside the linear control range of the loop, VOUT on the  
AD8319 may be driven to its maximum value very close to  
–10  
–20  
–30  
–40  
–2.5  
–5.0  
3524  
1024  
1524  
2024  
2524  
3024  
AD5621 DAC CODE  
Figure 2. ADL5331 Power Out vs. AD5621 DAC Code with  
RF Input Signal = 0 dBm  
V
POS. To avoid overdrive recovery issues with the ADL5331  
20  
10  
5.0  
2.5  
0
GAIN input, a voltage divider can be placed between VOUT on  
the AD8319 and GAIN on the ADL5331. This may have a slight  
effect on the overall speed of the loop, for instance, when the  
input power to the ADL5331 is stepped.  
POWER OUT  
STRAIGHT LINE  
ERROR  
0
A coupler/attenuation of 23 dB is used to match the desired  
output power range from the VGA to the linear operating  
range of the AD8319. In this case, the desired output power  
range of the VGA is −15 dBm to +15 dBm. With the given  
attenuator/coupler, the range of power to the AD8319 RF input  
is −8 dBm to −38 dBm, within the specified range of −3 dBm to  
−43dBm for a 1 dB error.  
–10  
–20  
–30  
–40  
–2.5  
–5.0  
The detector’s error amplifier uses CLFP, a ground-referenced  
capacitor pin, to integrate the error signal (in the form of a  
current). A capacitor must be connected to CLFP to set the  
loop bandwidth and to ensure loop stability.  
1280  
1780  
2280  
2780  
3280  
3780  
AD5621 DAC CODE  
Figure 3. ADL5331 Power Out vs. AD5621 DAC Code with  
RF Input Signal = −10 dBm  
Figure 2, Figure 3, and Figure 4 show the transfer function of  
the ADL5331 output power vs. the AD5621 DAC code for a  
100 MHz sine wave with an input power of 0 dBm, −10 dBm,  
and −20 dBm. Note that the power control of the AD8319 has a  
negative sense. Decreasing the DAC code, which corresponds  
to demanding a higher signal from the ADL5331, tends to  
increase GAIN.  
20  
10  
5.0  
2.5  
0
POWER OUT  
STRAIGHT LINE  
ERROR  
0
–10  
–20  
–30  
–40  
In order for the AGC loop to remain in equilibrium, the  
AD8319 must track the envelope of the ADL5331 output signal  
and provide the necessary voltage levels to the ADL5331’s gain  
control input. Figure 5 shows an oscilloscope screenshot of the  
AGC loop in Figure 1. A 100 MHz sine wave with 50% AM  
modulation is applied to the ADL5331. The output signal from  
the ADL5331 is a constant envelope sine wave with amplitude  
corresponding to a setpoint voltage at the AD8319 of 1.5 V.  
Also shown is the gain control response of the AD8319 to the  
changing input envelope.  
–2.5  
–5.0  
1280  
1780  
2280  
2780  
3280  
3780  
AD5621 DAC CODE  
Figure 4. ADL5331 Power Out vs. AD5621 DAC Code with  
RF Input Signal = −20 dBm  
Rev. 0 | Page 2 of 4  
 
 
 
Circuit Note  
CN-0082  
T
T
AM MODULATED INPUT  
CURS1 POS  
4.48µs  
1
CURS2 POS  
2.4µs  
t1: 4.48µs  
t2: 2.4µs  
Δt: –2.08µs  
1/Δt: –480.8kHz  
AD8319 OUTPUT  
2
2
3
MEAN(C1) 440.3mV  
AMPL(C1) 3.36V  
AMPL(C2) 900mV  
ADL5331 OUTPUT  
B
CH2 500mV  
M 4.0µs 12.5MS/s 80.0ns/pt  
CH1 150mV  
W
CH1 250mV CH2 200mV  
CH3 250mV Ω  
M2.00ms  
A CH4  
1.80V  
CH3 200mV Ω  
A
T
0.00000s  
Figure 6. Oscilloscope Screenshot Showing the ADL5331 Output  
Figure 5. Oscilloscope Screenshot Showing an  
AM Modulated Input Signal  
Figure 6 shows the response of the AGC RF output to a pulse  
on VSET. As VSET decreases to 1 V, the AGC loop responds with  
an RF burst. Response time and the amount of signal  
integration are controlled by the capacitance at the AD8319  
CLFP pin—a function analogous to the feedback capacitor  
around an integrating amplifier. An increase in the capacitance  
results in a slower response time.  
LEARN MORE  
MT-031 Tutorial, Grounding Data Converters and Solving the  
Mystery of"AGND" and "DGND." Analog Devices.  
MT-073 Tutorial, High Speed Variable Gain Amplifiers. Analog  
Devices.  
MT-077 Tutorial, Log Amp Basics. Analog Devices.  
MT-078 Tutorial, High Speed Log Amps. Analog Devices.  
MT-101 Tutorial, Decoupling Techniques. Analog Devices.  
The circuit must be constructed on a multilayer PC board with  
a large area ground plane. Proper layout, grounding, and  
decoupling techniques must be used to achieve optimum  
performance (see Tutorial MT-031 and Tutorial MT-101 and  
the ADL5331and AD8319 evaluation board layouts).  
Whitlow, Dana. Design and Operation of Automatic Gain  
Control Loops for Receivers in Modern Communications  
Systems. ChapterVIII, Analog Devices Wireless  
Seminar (2006).  
On the underside of the ADL5331 and AD8319 chip scale  
packages, there is an exposed compressed paddle. This paddle is  
internally connected to the chip’s ground. Solder the paddle to  
the low impedance ground plane on the printed circuit board to  
ensure the specified electrical performance and to provide  
thermal relief. It is also recommended that the ground planes  
on all layers under the paddle be stitched together with vias to  
reduce thermal impedance.  
Data Sheets and Evaluation Boards  
AD5621 Data Sheet.  
AD8318 Data Sheet.  
AD8319 Data Sheet.  
AD8319 Evaluation Board.  
AD8368 Data Sheet.  
COMMON VARIATIONS  
This circuit can be used to implement a constant power out  
function (fixed setpoint with variable input power) or a variable  
power out function (variable setpoint with fixed or variable  
input power). If a higher output power control range is desired,  
the AD8318 log amp (60 dB power detection range) can be used  
in place of the AD8319. For a constant output power function,  
the lower dynamic range of the AD8319 will be adequate since  
the loop will always servo the detectors input power to a  
constant level.  
ADL5331 Data Sheet.  
ADL5331 Evaluation Board.  
REVISION HISTORY  
7/09—Revision 0: Initial Version  
The ADL5331 VGA, which is optimized for transmit  
applications, can also be replaced by the AD8368 VGA. The  
AD8368 is optimized for low frequency receive applications up  
to 800 MHz and provides 34 dB of linear-in-dB voltage-  
controlled variable gain.  
Rev. 0 | Page 3 of 4  
 
 
CN-0082  
Circuit Note  
(Continued from first page) "Circuits from the Lab" are intended only for use with Analog Devices products and are the intellectual property of Analog Devices or its licensors. While you may  
use the "Circuits from the Lab" in the design of your product, no other license is granted by implication or otherwise under any patents or other intellectual property by application or use of  
the "Circuits from the Lab". Information furnished by Analog Devices is believed to be accurate and reliable. However, "Circuits from the Lab" are supplied "as is" and without warranties of any  
kind, express, implied, or statutory including, but not limited to, any implied warranty of merchantability, noninfringement or fitness for a particular purpose and no responsibility is assumed  
by Analog Devices for their use, nor for any infringements of patents or other rights of third parties that may result from their use. Analog Devices reserves the right to change any "Circuits  
from the Lab" at any time without notice, but is under no obligation to do so. Trademarks and registered trademarks are the property of their respective owners.  
©2009Analog Devices, Inc. All rights reserved. Trademarks and  
registered trademarks are the property of their respective owners.  
CN08323-0-7/09(0)  
Rev. 0 | Page 4 of 4  

相关型号:

CN-0109

Low Jitter Sampling Clock Generator for High Performance ADCs
ADI

CN-0121

Synchronizing Multiple AD9910 1 GSPS Direct Digital Synthesizers
ADI

CN-0134

Broadband Low Error Vector Magnitude (EVM) Direct Conversion Transmitter
ADI

CN-0140

High Performance, Dual Channel IF Sampling Receiver
ADI

CN-0144

Broadband Low Error Vector Magnitude Direct Conversion Transmitter Using LO Divide-by-2 Modulator
ADI

CN-0147

Powering a Fractional-N Voltage Controlled Oscillator with Low Noise LDO Regulators for Reduced Phase Noise
ADI

CN-0150

Software-Calibrated, 1 MHz to 8 GHz, 60 dB RF Power Measurement System Using a Logarithmic Detector
ADI

CN-0164

Low Power, Long Range, ISM Wireless Measuring Node
ADI

CN-0171

Low Noise, Low Distortion Single-Ended Input Drive Circuit for Differential Input IF Sampling ADCs
ADI

CN-0174

Low Noise, 12 GHz, Microwave Fractional-N Phase-Locked Loop Using an Active Loop Filter and RF Prescaler
ADI

CN-0178

Software-Calibrated, 50 MHz to 9 GHz, RF Power Measurement System
ADI

CN-0187

Crest Factor, Peak, and RMS RF Power Measurement Circuit Optimized for High Speed, Low Power, and Single 3.3 V Supply
ADI