ARF475FL [ADPOW]
RF POWER MOSFET N-CHANNEL ENHANCEMENT MODE; RF功率MOSFET N沟道增强模式
| 型号： | ARF475FL |
| 厂家： | 
ADVANCED POWER TECHNOLOGY |
| 描述： | RF POWER MOSFET N-CHANNEL ENHANCEMENT MODE |
| 文件： | 总4页 (文件大小：91K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Common Source
Push-Pull Pair
ARF475FL
D
G
S
S
S
S
G
D
RF POWER MOSFET
N-CHANNEL ENHANCEMENT MODE
165V 300W 150MHz
TheARF475FLisamatchedpairofRFpowertransistorsinacommonsourceconfiguration.Itisdesignedforhighvoltage
push-pull or parallel operation in narrow band ISM and MRI power amplifiers up to 150 MHz.
• Specified150Volt, 128MHzCharacteristics:
• High Performance Push-Pull RF Package.
•
•
•
Output Power = 900 Watts Peak
Gain = 15dB (Class AB)
Efficiency = 50% min
• High Voltage Breakdown and Large SOA
for Superior Ruggedness.
• Low Thermal Resistance.
MAXIMUM RATINGS
All Ratings: T = 25°C unless otherwise specified.
C
Symbol Parameter
ARF475FL
500
UNIT
Volts
Amps
VDSS
Drain-Source Voltage
VDGO
ID
Drain-Gate Voltage
500
Continuous Drain Current @ TC = 25°C
Gate-Source Voltage
(each device)
10
VGS
PD
±30
Volts
Total Device Dissipation @ TC = 25°C
483
Watts
TJ,TSTG
TL
-55 to 175
300
Operating and Storage Junction Temperature Range
Lead Temperature: 0.063" from Case for 10 Sec.
°C
STATIC ELECTRICAL CHARACTERISTICS (each device)
Symbol Characteristic / Test Conditions
MIN
TYP
MAX
UNIT
BVDSS
Drain-Source Breakdown Voltage (VGS = 0V, ID = 250 µA)
500
Volts
1
VDS
2.9
4
On State Drain Voltage (ID(ON) = 5A, VGS = 10V)
(ON)
25
Zero Gate Voltage Drain Current (VDS = VDSS, VGS = 0V)
Zero Gate Voltage Drain Current (VDS = 50V, VGS = 0, TC = 125°C)
Gate-Source Leakage Current (VGS = ±30V, VDS = 0V)
Forward Transconductance (VDS = 15V, ID = 5A)
IDSS
µA
250
±100
IGSS
gfs
nA
3
0.9
2
3.6
3.3
mhos
gfs1 gfs2
1.1
4
Forward Transconductance Match Ratio (VDS = 15V, ID = 5A)
Gate Threshold Voltage (VDS = VGS, ID = 200mA)
/
VGS
(TH)
Volts
∆VGS
0.2
Gate Threshold Voltage Match (VDS = VGS, ID = 200mA)
(TH)
THERMAL CHARACTERISTICS
Symbol Characteristic
MIN
TYP
MAX
UNIT
RθJC
RθCS
Junction to Case
0.31
°C/W
Case to Sink (Use High Efficiency Thermal Joint Compound and Planar Heat Sink Surface.)
0.1
CAUTION: These Devices are Sensitive to Electrostatic Discharge. Proper Handling Procedures Should Be Followed.
APT Website - http://www.advancedpower.com
DYNAMIC CHARACTERISTICS (per section)
ARF475FL
UNIT
Symbol
Ciss
Coss
Crss
td(on)
tr
Characteristic
Test Conditions
GS = 0V
MIN
TYP
780
125
7
MAX
900
150
10
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-on Delay Time
Rise Time
V
pF
VDS = 50V
f = 1MHz
5.1
4.1
12
10
VGS = 15V
VDD = 250V
8
ns
ID = ID[Cont.] @ 25°C
td(off)
tf
Turn-off Delay Time
Fall Time
18
RG = 1.6 Ω
4.0
7
FUNCTIONAL CHARACTERISTICS (Push-Pull Configuration)
Symbol Characteristic
Test Conditions
MIN
14
TYP
16
MAX
UNIT
dB
f = 128 MHz
GPS
Common Source Amplifier Power Gain
Drain Efficiency
Idq = 15mA
VDD = 150V
η
50
55
Pout = 900W
%
PW = 3ms
10% duty cycle
ψ
Electrical Ruggedness VSWR 5:1
No Degradation in Output Power
1
Pulse Test: Pulse width < 380 µS, Duty Cycle < 2%.
APT Reserves the right to change, without notice, the specifications and information contained herein.
Per transistor section unless otherwise specified.
3000
30
25
20
15
10
12V
C
iss
1000
500
11V
10V
C
oss
100
50
9V
8V
7V
C
rss
10
5
0
1
.1
1
10
100 200
0
5
10
15
20
25
30
VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
VDS,DRAIN-TO-SOURCEVOLTAGE(VOLTS)
Figure 2, Typical Capacitance vs. Drain-to-Source Voltage
Figure1,TypicalOutputCharacteristics
30
25
20
15
10
1.10
1.05
1.00
V
> I (ON) x
R
(ON)MAX.
DS
DS
D
250µSEC. PULSE TEST
@ <0.5 % DUTY CYCLE
T
= -55°C
J
T
= +25°C
J
0.95
0.90
T
= -55°C
J
5
0
T
= +125°C
2
J
0
4
6
8
10
-50 -25
0
25
TC,CASETEMPERATURE(°C)
Figure4,TypicalThresholdVoltagevsTemperature
50
75 100 125 150
VGS,GATE-TO-SOURCEVOLTAGE(VOLTS)
Figure 3, Typical Transfer Characteristics
ARF475FL
0.35
0.30
0.25
0.20
0.15
0.10
D = 0.9
0.7
0.5
Note:
t
0.3
1
t
2
SINGLEPULSE
t
0.05
0
1
Duty Factor D =
Peak T = P x Z
/
t
0.1
2
+ T
J
DM θJC
C
0.05
-5
-4
-3
-2
-1
10
10
10
10
10
1.0
RECTANGULARPULSEDURATION(SECONDS)
FIGURE5a,MAXIMUMEFFECTIVETRANSIENTTHERMALIMPEDANCE,JUNCTION-TO-CASEvsPULSEDURATION
RC MODEL
Junction
temp. (°C)
0.142
0.169
0.00719
0.0856
Power
(watts)
Case temperature. (°C)
Figure5b,TRANSIENT THERMAL IMPEDANCE MODEL
Table 1 - Typical Series Equivalent Large Signal Input - Output Impedance
Freq. (MHz)
Z
(Ω) gate to gate
ZOL (Ω) drain - drain
in
30
60
90
120
150
5.2 -j10
1.37 -j5.2
.53 -j2.6
.25 -j1.0
.25 +j0.2
41 -j20
26 -j25
16 -j23
10 -j20
6.7 -j17
Z
- Gate -gate shunted with 25
Ω
I
= 15mA each side
in
DQ
ZOL - Conjugate of optimum load for 600 Watts peak output at V = 150V
dd
25% duty cycle and PW = 5ms
ARF475FL
+
Vdd
-
128MHz Test amplifier
Po = 900W @150V
3ms pulse 10% Duty Cycle
+
L3
C11
Vg1
R3
L2
TL3
C10
C5
C6
R1
T2
TL5
C3
C4
T1
T3
J1
TL1
C2
C7
C8
L1
J2
C1
TL2
R4
C9
R2
TL4
TL6
C1 25pF poly trimmer
C2 750pF ATC 700B
DUT
Vg2
C3-4 2200pF NPO 500V chip
C5-10 10nF 500V chip
C11 1000uF 250V electroytic
L1 30nH 1.5t #18 enam .375" dia
L2 680nH 12t #24 enam .312" dia
R1-2 3.1Ω : 3 parallel 22Ω 1W 2512 SMT
R3-4 2.2kΩ 1/4W axial
T1 1:1 balun 50Ω coax on Fair-Rite 2843000102 core
T2 4:1 25Ω coax on 2843000102 Fair-Rite balun core
T3 1:1 coax balun RG-303 on 2861006802 Fair-Rite core
TL1-2 Printed line L= 0.75" w =.23"
L3 2t #20 on Fair-Rite 2643006302 bead, ~ 2uH
TL3-6 Printed line L= 0.65" w =.23"
0.23" wide stripline on FR-4 board is ~ 30Ω Z
o
Peak Output Power vs. Vdd and Duty Cycle
Notes:
900
800
700
600
500
400
300
200
100
0
1.2
The value of L1 must be adjusted as the supply voltage is
changed to maintain resonance in the output circuit. At
128MHz its value changes from approximately 40nH at
100V to 30nH at 150V.
1
Max
Duty Cycle
0.8
0.6
0.4
0.2
0
With the 50Ω drain-to-drain load, the duty cycle above
100V must be reduced to insure power dissipation is
within the limits of the device. Maximum pulse length
should be 100mS or less. See transient thermal
impedance, figure 5.
P
Watts
o
.050
.050
80
100
120
140
160
Drain Supply Voltage Vdd
S
D1
D2
S
.125R
4 pls
.325
.125dia
4 pls
Thermal Considerations and Package Mounting:
.570
The rated power dissipation is only available when the package
ARF475
.320
mounting surface is at 25°C and the junction temperature is 175°C.
The thermal resistance between junctions and case mounting sur-
face is 0.3°C/W. When installed, an additional thermal impedance
of 0.1°C/W between the package base and the mounting surface is
typical. Insure that the mounting surface is smooth and flat. Ther-
mal joint compound must be used to reduce the effects of small sur-
face irregularities. Use the minimum amount necessary to coat the
surface. The heatsink should incorporate a copper heat spreader to
obtain best results.
1.250
S
G1
G2
S
.225
.225
The package design clamps the ceramic base to the heatsink. A
clamped joint maintains the required mounting pressure while al-
lowing for thermal expansion of both the base and the heat sink.
Four 4-40 (M3) screws provide the required mounting force. T = 6
in-lb (0.68N-m).
.200
.300
.005 .040
1.500
HAZARDOUS MATERIAL WARNING
The white ceramic portion of the device between leads and mounting surface is beryllium oxide, BeO. Beryllium oxide dust is toxic when inhaled. Care must be taken during
handling and mounting to avoid damage to this area. These devices must never be thrown away with general industrial or domestic waste.
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