AWT6632P9 [ANADIGICS]

HELP3DC UMTS1900 (Band 2) LTE/WCDMA/CDMA Linear PA Module; HELP3DC UMTS1900 (频段2 ) LTE / WCDMA / CDMA线性功率放大器模块
AWT6632P9
型号: AWT6632P9
厂家: ANADIGICS, INC    ANADIGICS, INC
描述:

HELP3DC UMTS1900 (Band 2) LTE/WCDMA/CDMA Linear PA Module
HELP3DC UMTS1900 (频段2 ) LTE / WCDMA / CDMA线性功率放大器模块

放大器 功率放大器 CD LTE
文件: 总14页 (文件大小:861K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
AWT6632  
HELP3DCTM UMTS1900 (Band 2)  
LTE/WCDMA/CDMA Linear PA Module  
DATA SHEET - Rev 2.1  
FEATURES  
CDMA/EVDO, WCDMA/HSPA, LTE Compliant  
3rd Generation HELPTM technology  
ꢀ HighꢀEfficiency:ꢀ(R99ꢀwaveform)  
                   
•ꢀꢀ40ꢀ%ꢀ@ꢀPOUT = +29 dBm  
A
W
T6632  
•ꢀꢀ22ꢀ%ꢀ@ꢀPOUT = +16.75 dBm  
SimplerꢀCalibrationꢀwithꢀonlyꢀ2ꢀBiasꢀModes  
Optimized for SMPS Supply  
ꢀ LowꢀQuiescentꢀCurrent:ꢀ8ꢀmA  
ꢀ LowꢀLeakageꢀCurrentꢀinꢀShutdownꢀMode:ꢀ<5ꢀµA  
ꢀ InternalꢀVoltageꢀRegulatorꢀ  
Integratedꢀ“daisyꢀchainable”ꢀdirectionalꢀcouplersꢀ  
withꢀCPLIN and CPLOUTꢀPorts  
10 Pin 3 mm x 3 mm x 1 mm  
Surface Mount Module  
Optimized for a 50 ꢀSystemꢀ  
ꢀ LowꢀProfileꢀMiniatureꢀSurfaceꢀMountꢀPackage  
ꢀ InternalꢀDCꢀblocksꢀonꢀIN/OUTꢀRFꢀports  
ꢀ 1.8ꢀVꢀControlꢀLogic  
ruggedness.Therearetwoselectablebiasmodesꢀ  
thatꢀ optimizeꢀ efficiencyꢀ forꢀ differentꢀ outputꢀ powerꢀ  
levels,ꢀandꢀaꢀshutdownꢀmodeꢀwithꢀlowꢀleakageꢀcurrent,ꢀ  
whichꢀincreasesꢀhandsetꢀtalkꢀandꢀstandbyꢀtime.ꢀTheꢀ  
self-containedꢀꢀ3ꢀmmꢀxꢀ3ꢀmmꢀxꢀ1ꢀmmꢀsurfaceꢀmountꢀ  
packageꢀincorporatesꢀmatchingꢀnetworksꢀoptimizedꢀforꢀ  
outputꢀpower,ꢀefficiency,ꢀandꢀlinearityꢀinꢀaꢀ50ꢀꢀsystem.  
ꢀ RoHSꢀCompliantꢀPackage,ꢀ260ꢀoC MSL-3  
APPLICATIONS  
ꢀ WirelessꢀHandsetsꢀandꢀDataꢀDevicesꢀfor:  
WCDMA/HSPA/LTE PCS Band 2  
ꢀꢀCDMA/EVDOꢀBandclassꢀ1ꢀ&ꢀ14  
ꢀꢀBandꢀ25ꢀLTEꢀDevices  
GND at Slug (pad)  
1
2
3
4
5
10  
9
V
BATT  
VCC  
PRODUCT DESCRIPTION  
TheAWT6632ꢀPAꢀisꢀdesignedꢀtoꢀprovideꢀhighlyꢀlinearꢀ  
outputforWCDMA,CDMAandLTEhandsetsandꢀ  
datadeviceswithhighefficiencyatbothhighandꢀ  
lowꢀ powerꢀ modes.ꢀ Thisꢀ HELP3DCTM PA can be  
usedꢀ withꢀ anꢀ externalꢀ switchꢀ modeꢀ powerꢀ supplyꢀ  
(SMPS)ꢀtoꢀimproveꢀitsꢀefficiencyꢀandꢀreduceꢀcurrentꢀ  
consumptionꢀ furtherꢀ atꢀ mediumꢀ andꢀ lowꢀ outputꢀ  
powers.Adaisychainable”ꢀ directionalꢀ couplerisꢀ  
integratedinthemodulethuseliminatingtheneedꢀ  
ofꢀexternalꢀcouplers.ꢀTheꢀdeviceꢀisꢀmanufacturedꢀonꢀ  
anꢀadvancedꢀInGaPꢀHBTꢀMMICꢀtechnologyꢀofferingꢀ  
state-of-the-artreliability,temperaturestability,andꢀ  
CPL  
RFIN  
RFOUT  
CPLIN  
GND  
Bias Control  
8
V
MODE2 (N/C)  
Voltage Regulation  
7
V
MODE1  
6
VEN  
CPLOUT  
Figure 1: Block Diagram  
02/2012  
AWT6632  
1
2
10  
9
V
BATT  
V
CC  
RFIN  
RFOUT  
3
8
VMODE2 (N/C)  
CPLIN  
4
5
7
6
V
MODE1  
GND  
VEN  
CPLOUT  
Figure 2: Pinout (X-ray Top View)  
Table 1: Pin Description  
PIN  
1
NAME  
DESCRIPTION  
Battery Voltage  
RFꢀInput  
V
BATT  
2
RFIN  
3
VMODE2 (N/C) No Connection  
4
V
MODE1  
Mode Control Voltage 1  
PA Enable Voltage  
Coupler Output  
Ground  
5
V
EN  
6
CPLOUT  
GND  
7
8
CPLIN  
RFOUT  
Coupler Input  
9
RFꢀOutput  
10  
V
CC  
Supply Voltage  
DATA SHEET - Rev 2.1  
2
02/2012  
AWT6632  
ELECTRICAL CHARACTERISTICS  
Table 2: Absolute Minimum and Maximum Ratings  
PARAMETER  
MIN  
0
MAX  
+5  
UNIT  
V
Supply Voltage (VCC  
)
Battery Voltage (VBATT  
)
0
+6  
V
ControlꢀVoltagesꢀ(VMODE1, VENABLE  
)
0
+3.5  
+10  
+150  
V
RFꢀInputꢀPowerꢀ(PIN  
)
-
dBm  
°C  
Storage Temperature (TSTG  
)
-40  
Stresses in excess of the absolute ratings may cause permanent damage.  
Functional operation is not implied under these conditions. Exposure  
to absolute ratings for extended periods of time may adversely affect  
reliability.  
Table 3: Operating Ranges  
PARAMETER  
OperatingꢀFrequencyꢀ(f)  
Supply Voltage (VCC)  
Battery Voltage (VBATT)  
MIN  
1850  
+0.5  
+3.1  
TYP  
MAX UNITS  
COMMENTS  
-
1915  
MHz  
V
+3.4 +4.35  
+3.4 +4.35  
POUT < +29.0 dBm  
V
POUT < +29.0 dBm  
+1.35  
0
+1.8  
0
+3.1  
+0.5  
PAꢀ“on”  
PAꢀ“shutꢀdown”  
Enable Voltage (VENABLE)  
V
V
+1.35  
0
+1.8  
0
+3.1  
+0.5  
LowꢀBiasꢀMode  
HighꢀBiasꢀMode  
Mode Control Voltage (VMODE1)  
RFꢀOutputꢀPowerꢀ(POUT)  
ꢀꢀR99ꢀWCDMA,ꢀHPM  
ꢀꢀHSPAꢀ(MPRꢀ=ꢀ0),ꢀHPM  
LTE, HPM  
ꢀꢀR99ꢀWCDMA,ꢀLPM  
ꢀꢀHSPAꢀ(MPRꢀ=ꢀ0),ꢀLPM  
LTE, LPM  
28.2ꢀ(1)  
27.2 (1)  
27.2 (1)  
29.0  
28.0  
28.0  
29.0  
28.0  
28.0  
3GPPꢀTSꢀ34.121-1,ꢀRelꢀ8  
Table C.11.1.3, for WCDMA  
Subtestꢀ1  
dBm  
15.95 (1) 16.75 16.75  
14.95ꢀ(1) 15.75 15.75  
14.95ꢀ(1) 15.75 15.75  
TSꢀ36.101ꢀRelꢀ8ꢀforꢀLTE  
CDMAꢀOutputꢀPower  
HPM  
LPM  
27.4ꢀ(1)  
14.95ꢀ(1) 15.75  
28.2  
-
-
dBm  
°C  
CDMA2000,ꢀRC-1  
CaseꢀTemperatureꢀ(TC)  
-30  
-
+90  
The device may be operated safely over these conditions; however, parametric performance is guaranteed only  
over the conditions defined in the electrical specifications.  
Notes:  
(1) For operation at Vcc = +3.1 V, Pout is derated by 0.8 dB.  
DATA SHEET - Rev 2.1  
3
02/2012  
AWT6632  
Table 4: Electrical Specifications - WCDMA Operation (R99 waveform)  
(TC  
= +25 °C, VCC = VBATT = +3.4 V, VENABLE = +1.8 V, 50 system)  
COMMENTS  
PARAMETER  
MIN  
TYP  
MAX  
UNIT  
P
OUT  
V
MODE1  
25  
12  
27  
14  
29  
16  
+29.0 dBm  
0 V  
Gain  
dB  
dBc  
dBc  
%
+16.75 dBm  
1.8 V  
-
-
-42  
-40  
-39  
-37  
+29.0 dBm  
+16.75 dBm  
0 V  
1.8 V  
ACLR1 at 5 MHz offset (1)  
ACLR2 at 10 MHz offset  
Power-Added Efficiency (1)  
-
-
-55  
-55  
-48  
-48  
+29.0 dBm  
+16.75 dBm  
0 V  
1.8 V  
36  
20  
40  
23  
-
-
+29.0 dBm  
+16.75 dBm  
0 V  
1.8 V  
Quiescent Current (Icq)  
Low Bias Mode  
-
-
10  
15  
mA  
mA  
VMODE1 = +1.8 V  
Mode Control Current  
0.2  
0.4  
through VMODE pin, VMODE1 = +1.8 V  
Enable Current  
BATT Current  
-
-
0.3  
2.5  
0.5  
5
mA  
mA  
through VENABLE pin  
through VBATT pin, VMODE1 = +1.8 V  
V
V
BATT = +4.2 V, VCC = +4.2 V,  
ENABLE = 0 V, VMODE1 = 0 V  
Leakage Current  
-
3
4
µA  
-
-
-134  
-140  
-
-
dBm/Hz  
dBm/Hz  
P
P
OUT < +29.0 dBm, VMODE1 = 0V  
Noise in Receive Band(2)  
OUT < 16.75 dBm, VMODE1 = +1.8 V  
Harmonics  
2fo  
3fo, 4fo  
-
-
-39  
-60  
-35  
-50  
P
OUT < +29.0 dBm  
dBc  
Input Impedance  
Coupling Factor  
Directivity  
-
-
-
2:1  
20  
22  
-
-
-
VSWR  
dB  
dB  
698 MHz to 2620 MHz  
Pin 6 to 8  
Shutdown Mode  
Coupler In - Out  
Daisy Chain Insertion Loss  
-
0.25  
-
dB  
P
OUT < +29.0 dBm  
In-band load VSWR < 5:1  
Out-of-band load VSWR < 10:1  
Applies over all operating  
conditions  
Spurious Output Level  
(all spurious outputs)  
-
-
-70  
dBc  
Load mismatch stress with no  
permanent degradation or failure  
8:1  
-
-
-
-
VSWR Applies over full operating range  
Deg  
Phase Delta (HPM-LPM)  
10  
Notes:  
(1) ACLR and Efficiency measured at 1880 MHz.  
(2) Noise measured at 1930 MHz to 1990 MHz.  
DATA SHEET - Rev 2.1  
4
02/2012  
AWT6632  
Table 5: Electrical Specifications - LTE Operation (RB = 12, START = 0, QPSK)  
(T  
C
= +25 °C, VBATT = VCC = +3.4 V, VENABLE = +1.8 V, 50 system)  
COMMENTS  
PARAMETER  
MIN  
TYP  
MAX  
UNIT  
P
OUT  
V
MODE1  
24  
12  
26.5  
14  
29  
16  
+28.0 dBm  
0 V  
Gain  
dB  
dBc  
dBc  
dBc  
%
+15.75 dBm  
1.8 V  
ACLR E-UTRA  
at  
-
-
-39  
-38  
-36  
-35  
+28.0 dBm  
+15.75 dBm  
0 V  
1.8 V  
10 MHz offset  
ACLR1 UTRA (1)  
at  
-
-
-40  
-39  
-37  
-36  
+28.0 dBm  
+15.75 dBm  
0 V  
1.8 V  
7.5 MHz offset  
ACLR2 UTRA  
at  
-
-
-62  
-62  
-58  
-58  
+28.0 dBm  
+15.75 dBm  
0 V  
1.8 V  
12.5 MHz offset  
33  
17  
36  
20  
-
-
+28.0 dBm  
+15.75 dBm  
0 V  
1.8 V  
Power-Added Efficiency (1)  
P
OUT +28.0 dBm  
Spurious Output Level  
(all spurious outputs)  
In-band load VSWR < 5:1  
-
-
-
<-70  
-
dBc  
Out-of-band load VSWR < 10:1  
Applies over all operating conditions  
Load mismatch stress with no  
permanent degradation or failure  
8:1  
VSWR Applies over full operating range  
Notes:  
(1) ACLR and Efficiency measured at 1880 MHz.  
DATA SHEET - Rev 2.1  
5
02/2012  
AWT6632  
Table 6: Electrical Specifications - CDMA Operation (CDMA 2000, RC-1)  
(T  
C
= +25 °C, VCC = VBATT = +3.4 V, VENABLE = +1.8 V, 50 system)  
COMMENTS  
PARAMETER  
MIN  
TYP  
MAX  
UNIT  
P
OUT  
V
MODE1  
24  
12  
26  
14  
28  
16  
+28.2 dBm  
+15.75 dBm  
0 V  
1.8 V  
Gain  
dB  
Adjacent Channel Power  
at +1.25 MHz offset(1)  
-
-
-50  
-50  
-46  
-46  
+28.2 dBm  
+15.75 dBm  
0 V  
1.8 V  
dBc  
Primary Channel BW = 1.23 MHz  
Adjacent Channel BW = 30 kHz  
Adjacent Channel Power  
at + 1.98 MHz offset (1)  
-
-
-55  
-60  
-51  
-56  
+28.2 dBm  
0 V  
dBc  
%
Primary Channel = 1.23 MHz  
Adjacent Channel = 30 kHz  
+15.75 dBm  
1.8 V  
-
-
37  
20  
-
-
+28.2 dBm  
+15.75 dBm  
0 V  
1.8 V  
Power-Added Efficiency (1)  
P
OUT < +28.2 dBm  
Spurious Output Level  
(all spurious outputs)  
In-band load VSWR < 5:1  
-
-
-
<-70  
-
dBc  
Out-of-band load VSWR < 10:1  
Applies over all operating ranges  
Load mismatch stress with no  
permanent degradation or failure  
8:1  
VSWR Applies over full operating range  
Notes:  
(1) ACPR and Efficiency measured at 1880 MHz.  
DATA SHEET - Rev 2.1  
6
02/2012  
AWT6632  
APPLICATION INFORMATION  
Toꢀ ensureproperperformance,ꢀ referꢀ toꢀ allꢀ relatedꢀ logiclevel(seeOperatingRangestable)toVMODE1  
.
Applicationꢀ Notesꢀ onꢀ theꢀANADIGICSꢀ webꢀ site:ꢀ TheꢀBiasꢀControlꢀtableꢀlistsꢀtheꢀrecommendedꢀmodesꢀ  
http://www.anadigics.com  
ofoperationforvariousapplications.VMODE2isnotꢀ  
necessaryꢀforꢀthisꢀPA.  
Shutdown Mode  
Thepoweramplifiermaybeplacedinashutdownꢀ Twoꢀoperatingꢀmodesꢀareꢀavailableꢀtoꢀoptimizeꢀcurrentꢀ  
modeꢀ byꢀ applyingꢀ logicꢀ lowꢀ levelsꢀ (seeꢀ Operatingꢀ consumption.ꢀHighꢀBias/HighꢀPowerꢀoperatingꢀmodeꢀ  
Rangesꢀtable)ꢀtoꢀtheꢀVENABLE and VMODE1ꢀvoltages.  
isꢀforꢀPOUTꢀlevelsꢀ> 15.75 dBm. At around 16.75 dBm  
outputꢀ power,ꢀ theꢀ PAꢀ shouldꢀ beꢀ “Modeꢀ Switched”ꢀ  
toꢀ ꢀ Lowꢀ powerꢀ modeꢀ forꢀ lowestꢀ quiescentꢀ currentꢀ  
consumption.  
Bias Modes  
TheꢀpowerꢀamplifierꢀmayꢀbeꢀplacedꢀinꢀeitherꢀaꢀLowꢀBiasꢀ  
modeꢀorꢀaꢀHighꢀBiasꢀmodeꢀbyꢀapplyingꢀtheꢀappropriateꢀ  
Vcontrols  
Venable/Vmode(s)  
Rise/Fall Max 1µS  
Defined at 10% to 90%  
of Min/Max Voltage  
On Sequence Start  
T_0N=0µ  
Off Sequence Start  
T_0FF=0µ  
ON Sequence  
OFF Sequence  
RFIN  
notes 1,2  
V
EN  
VCC  
note 1  
T_0N+1µS  
T_0N+3µS  
T_0FF+2µS T_0FF+3µS  
Referenced After 90%of Rise  
Time  
Referenced Before10%of Fall  
Time  
Figure 3: Recommended ON/OFF Timing Sequence  
Notes:  
(1) Level might be changed after RF is ON.  
(2) RF OFF defined as PIN ≤ -30 dBm.  
(3) Switching simultaneously between VMODE and VEN is not recommended.  
Table 7: Bias Control  
P
OUT  
BIAS  
MODE  
Application  
V
ENABLE  
V
MODE1  
V
CC  
V
BATT  
LEVELS  
Highꢀpower  
(HighꢀBiasꢀMode)  
>+15.75 dBm  
High  
Low  
+1.8ꢀV  
+1.8ꢀV  
0 V  
0 V  
1.5ꢀ-ꢀ4.35ꢀV  
0.5ꢀ-ꢀ4.35ꢀV  
0.5ꢀ-ꢀ4.35ꢀV  
> 3.1 V  
> 3.1 V  
> 3.1 V  
Med/lowꢀpower  
(LowꢀBiasꢀMode)  
+16.75 dBm  
+1.8ꢀV  
Shutdown  
-
Shutdown  
0 V  
DATA SHEET - Rev 2.1  
7
02/2012  
AWT6632  
VBATT  
VCC  
C2  
0.1µF  
C1  
C3  
C5  
2.2 µF  
GND at slug  
33pF  
2.2µFceramic  
1
2
10  
9
V
BATT  
V
CC  
RFIN  
RFIN  
RFOUT  
RFOUT  
3
4
5
8
7
6
CPLIN  
GND  
V
V
V
MODE2 (N/C)  
CPLIN  
V
MODE1  
MODE1  
CPLOUT  
V
EN  
CPLOUT  
EN  
Figure 4: Evaluation Circuit Schematic  
RFOUT  
C3  
C6  
C1  
C2  
RFIN  
C4  
CPLIN  
Figure 5: Evaluation Board Layout  
DATA SHEET - Rev 2.1  
8
02/2012  
AWT6632  
HELP3DCTM  
TheꢀAWT6632poweramplifiermoduleisbasedonꢀ whichꢀ eliminatesꢀ theꢀ needꢀ forꢀ anꢀ externalꢀ constantꢀ  
ANADIGICS proprietary HELP3DC™ technology. voltageꢀ source.ꢀ Theꢀ PAꢀ isꢀ turnꢀ on/offꢀ isꢀ controlledꢀ  
TheꢀPAꢀisꢀdesignedꢀtoꢀoperateꢀupꢀtoꢀ17ꢀdBmꢀinꢀtheꢀlowꢀ by VENpin.ꢀAsingleVMODE control logic (VMODE1)isꢀ  
powerꢀmode,ꢀthusꢀeliminatingꢀtheꢀneedꢀforꢀthreeꢀgainꢀ neededꢀ toꢀ operateꢀ thisꢀ device.ꢀ AWT6632ꢀ requiresꢀ  
states,ꢀ whileꢀ stillꢀ maintainingꢀ lowꢀ quiescentꢀ currentꢀ onlyꢀ twoꢀ calibrationꢀ sweepsꢀ forꢀ systemꢀ calibration,ꢀ  
andꢀhighꢀefficiencyꢀinꢀlowꢀandꢀmediumꢀpowerꢀlevels.ꢀ thusꢀsavingꢀcalibrationꢀtime.ꢀ  
Averageꢀ weightedꢀ efficiencyꢀ canꢀ beꢀ increasedꢀ byꢀ  
usingꢀanꢀexternalꢀswitchꢀmodeꢀpowerꢀsupplyꢀ(SMPS)ꢀ Figure5showsoneapplicationexampleonmobileꢀ  
orꢀDC/DCꢀconverterꢀtoꢀreduceꢀVCC.  
board.C1andC2areRFbypasscapsandshouldꢀ  
beꢀ placedꢀ nearbyꢀ pinꢀ 1ꢀ andꢀ pinꢀ 10.ꢀ Bypassꢀ capsꢀ  
Theꢀdirectionalꢀ“daisyꢀchainable”ꢀcouplerꢀisꢀintegratedꢀ C4ꢀandꢀC5ꢀmayꢀnotꢀbeꢀneeded.ꢀAlsoꢀaꢀ“T”ꢀmatchingꢀ  
withinꢀtheꢀPAꢀmodule,ꢀthereforeꢀthereꢀisꢀnoꢀneedꢀforꢀ topologyꢀ isꢀ recommendedꢀ atꢀ PAꢀ RFINꢀ andꢀ RFOUT  
externalꢀcouplers.  
portsꢀtoꢀprovideꢀmatchingꢀbetweenꢀinputꢀTXꢀFilterꢀandꢀ  
Duplexerꢀ/ꢀIsolator.  
TheAWT6632ꢀ hasꢀ anꢀ integratedꢀ voltageꢀ regulator,ꢀ  
SMPS  
VBATT  
C6  
C1  
C2  
C3  
GND  
at slug  
GND  
GND  
GND  
GND  
RFOUT  
VCC  
RFOUT  
VBATT  
RFIN  
RFIN  
TX filter  
Duplexer  
Output  
Matching  
Input  
Matching  
VMODE2  
CPLIN  
50Ω  
VMODE1  
VEN  
GND  
CPLOUT  
C5  
GND  
GND  
BB  
To  
Detector  
PA_R0  
PA_0N  
C4  
GND  
Figure 6: Typical Application Circuit  
DATA SHEET - Rev 2.1  
9
02/2012  
AWT6632  
PERFORMANCE DATA:  
Figure 8: WCDMA Gain (dB) over Voltage  
Figure 7: WCDMA Gain (dB) over Temperature  
(VBATT = VCC = 3.4 V)  
(TC = 25 8C)  
30  
30  
-30Cꢀ3.4Vcc  
25C 3.2Vcc  
25Cꢀ3.4Vcc  
25Cꢀ4.2Vcc  
25C 3.0Vcc  
25Cꢀ3.4Vccꢀ  
25  
90Cꢀ3.4Vccꢀ  
25  
20  
15  
10  
20  
15  
10  
5
0
5
10  
15  
20  
25  
30  
0
5
10  
15  
20  
25  
30  
Pout(dBm)  
Pout(dBm)  
Figure 9: WCDMA PAE (%) over Temperature  
Figure 10: WCDMA PAE (%) over Voltage  
(VBATT = VCC = 3.4 V)  
(TC = 25 8C)  
50  
50  
45  
40  
35  
30  
25  
20  
15  
10  
5
-30ꢀ3.4cc  
25C 3.2Vcc  
25Cꢀ3.4Vcc  
25Cꢀ4.2Vcc  
25C 3.0Vcc  
45  
25Cꢀ3.4Vcc  
40  
90Cꢀ3.4Vcc  
35  
30  
25  
20  
15  
10  
5
0
0
0
5
10  
15  
20  
25  
30  
0
5
10  
15  
20  
25  
30  
Pout(dBm)  
Pout(dBm)  
Figure 11: WCDMA ACLR1 (dBc) over Temperature  
(VBATT = VCC = 3.4 V)  
Figure 12: WCDMA ACLR1 (dBc) over Temperature  
(TC = 25 8C)  
-25  
-25  
-30Cꢀ3.4Vcc  
25Cꢀ3.4Vcc  
25C 3.2Vcc  
-30  
-30  
90Cꢀ3.4Vccꢀ  
25Cꢀ3.4Vcc  
25Cꢀ4.2Vccꢀ  
-35  
-35  
25C 3.0Vcc  
-40  
-45  
-50  
-55  
-40  
-45  
-50  
-55  
0
5
10  
15  
20  
25  
30  
0
5
10  
15  
20  
25  
30  
Pout(dBm)  
Pout(dBm)  
DATA SHEET - Rev 2.1  
10  
02/2012  
AWT6632  
PACKAGE OUTLINE  
Figure 13: Package Outline - 10 Pin 3 mm x 3 mm x 1 mm Surface Mount Module  
Part Number  
6632  
LLLLNN  
YYWWCC  
Pin 1 Identifier  
Lot Number  
Date Code  
YY=Year; WW=Work week  
Country Code (CC)  
Figure 14: Branding Specification Package  
DATA SHEET - Rev 2.1  
11  
02/2012  
AWT6632  
PCB AND STENCIL DESIGN GUIDELINE  
Figure 15: Recommended PCB Layout Information  
DATA SHEET - Rev 2.1  
12  
02/2012  
AWT6632  
COMPONENT PACKAGING  
Pin 1  
Figure 16: Carrier Tape  
Figure 17: Reel  
DATA SHEET - Rev 2.1  
13  
02/2012  
AWT6632  
ORDERING INFORMATION  
TEMPERATURE  
PACKAGE  
DESCRIPTION  
ORDER NUMBER  
COMPONENT PACKAGING  
RANGE  
RoHSꢀCompliantꢀ10ꢀPin  
3ꢀmmꢀxꢀ3ꢀmmꢀxꢀ1ꢀmm TapeꢀandꢀReel,ꢀ2500ꢀpiecesꢀperꢀReel  
AWT6632Q7  
-30 oC to +90 oC  
Surface Mount Module  
RoHSꢀCompliantꢀ10ꢀPin  
3ꢀmmꢀxꢀ3ꢀmmꢀxꢀ1ꢀmm PartialꢀTapeꢀandꢀReel  
Surface Mount Module  
AWT6632P9  
-30 oC to +90 oC  
anaDigiCS, iꢀc.  
141 Mount Bethel Road  
Warren, New Jersey 07059, U.S.A.  
Tel: +1 (908) 668-5000  
Fax: +1 (908) 668-5132  
URL: http://www.anadigics.com  
iMPOrTanT nOTiCE  
ANADIGICS, Inc. reserves the right to make changes to its products or to discontinue any product at any time without notice.  
The product specifications contained in Advanced Product Information sheets and Preliminary Data Sheets are subject to  
change prior to a product’s formal introduction. Information in Data Sheets have been carefully checked and are assumed  
to be reliable; however, ANADIGICS assumes no responsibilities for inaccuracies. ANADIGICS strongly urges customers  
to verify that the information they are using is current before placing orders.  
warning  
ANADIGICS products are not intended for use in life support appliances, devices or systems. Use of anANADIGICS product  
in any such application without written consent is prohibited.  
DATA SHEET - Rev 2.1  
14  
02/2012  

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