AOD4184_09 [AOS]

40V N-Channel MOSFET; 40V N沟道MOSFET
AOD4184_09
型号: AOD4184_09
厂家: ALPHA & OMEGA SEMICONDUCTORS    ALPHA & OMEGA SEMICONDUCTORS
描述:

40V N-Channel MOSFET
40V N沟道MOSFET

文件: 总6页 (文件大小:292K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
AOD4184/AOI4184  
40V N-Channel MOSFET  
General Description  
Product Summary  
VDS  
The AOD4184/AOI4184 used advanced trench technology  
and design to provide excellent RDS(ON) with low gate  
charge. With the excellent thermal resistance of the DPAK  
package, those devices are well suited for high current  
load applications.  
40V  
50A  
ID (at VGS=10V)  
< 8mΩ  
RDS(ON) (at VGS=10V)  
< 11mΩ  
RDS(ON) (at VGS = 4.5V)  
100% UIS Tested  
100% Rg Tested  
TO252  
DPAK  
TO-251A  
IPAK  
D
TopView  
Bottom View  
Top View  
Bottom View  
D
D
D
G
S
G
S
G
S
D
D
S
G
G
S
Absolute Maximum Ratings TA=25°C unless otherwise noted  
Parameter  
Symbol  
VDS  
Maximum  
40  
Units  
Drain-Source Voltage  
V
VGS  
ID  
IDM  
IDSM  
±20  
Gate-Source Voltage  
V
A
TC=25°C  
50  
40  
Continuous Drain  
Current  
Pulsed Drain Current C  
TC=100°C  
120  
6.5  
TA=25°C  
TA=70°C  
Continuous Drain  
Current  
Avalanche Current C  
Avalanche energy L=0.1mH C  
A
5
IAS, IAR  
35  
A
EAS, EAR  
61  
mJ  
TC=25°C  
50  
PD  
W
Power Dissipation B  
Power Dissipation A  
TC=100°C  
TA=25°C  
TA=70°C  
25  
2.3  
PDSM  
W
1.5  
TJ, TSTG  
Junction and Storage Temperature Range  
-55 to 175  
°C  
Thermal Characteristics  
Parameter  
Symbol  
Typ  
Max  
22  
55  
3
Units  
°C/W  
°C/W  
°C/W  
Maximum Junction-to-Ambient A  
18  
44  
t 10s  
RθJA  
Maximum Junction-to-Ambient A D  
Maximum Junction-to-Case  
Steady-State  
Steady-State  
RθJC  
2.4  
Rev0 : April 2009  
www.aosmd.com  
Page 1 of 6  
AOD4184/AOI4184  
Electrical Characteristics (TJ=25°C unless otherwise noted)  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Units  
STATIC PARAMETERS  
BVDSS  
Drain-Source Breakdown Voltage  
ID=250µA, VGS=0V  
40  
V
VDS=40V, VGS=0V  
1
5
IDSS  
Zero Gate Voltage Drain Current  
µA  
TJ=55°C  
IGSS  
Gate-Body leakage current  
Gate Threshold Voltage  
On state drain current  
VDS=0V, VGS= ±20V  
VDS=VGS ID=250µA  
VGS=10V, VDS=5V  
100  
2.6  
nA  
V
VGS(th)  
ID(ON)  
1.7  
2.2  
120  
A
V
GS=10V, ID=20A  
6.7  
11  
8
mΩ  
mΩ  
RDS(ON)  
TJ=125°C  
Static Drain-Source On-Resistance  
13  
11  
VGS=4.5V, ID=15A  
VDS=5V, ID=20A  
IS=1A,VGS=0V  
8.5  
37  
gFS  
VSD  
IS  
Forward Transconductance  
Diode Forward Voltage  
S
V
A
0.72  
1
Maximum Body-Diode Continuous Current  
20  
DYNAMIC PARAMETERS  
Ciss  
Coss  
Crss  
Rg  
Input Capacitance  
120  
150  
80  
1500 1800  
pF  
pF  
pF  
VGS=0V, VDS=20V, f=1MHz  
VGS=0V, VDS=0V, f=1MHz  
Output Capacitance  
Reverse Transfer Capacitance  
Gate resistance  
215  
135  
3.5  
280  
190  
5
2
SWITCHING PARAMETERS  
Qg(10V)  
Total Gate Charge  
Total Gate Charge  
Gate Source Charge  
Gate Drain Charge  
Turn-On DelayTime  
Turn-On Rise Time  
Turn-Off DelayTime  
Turn-Off Fall Time  
21  
10  
27.2  
13.6  
4.5  
33  
16  
nC  
nC  
nC  
nC  
ns  
Qg(4.5V)  
Qgs  
Qgd  
tD(on)  
tr  
V
GS=10V, VDS=20V, ID=20A  
6.4  
6.4  
VGS=10V, VDS=20V, RL=1,  
17.2  
29.6  
16.8  
ns  
R
GEN=3Ω  
tD(off)  
tf  
ns  
ns  
trr  
IF=20A, dI/dt=100A/µs  
IF=20A, dI/dt=100A/µs  
20  
18  
Body Diode Reverse Recovery Time  
Body Diode Reverse Recovery Charge  
29  
26  
38  
34  
ns  
Qrr  
nC  
A. The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The  
Power dissipation PDSM is based on R θJA and the maximum allowed junction temperature of 150°C. The value in any given application depends on  
the user's specific board design, and the maximum temperature of 175°C may be used if the PCB allows it.  
B. The power dissipation PD is based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper  
dissipation limit for cases where additional heatsinking is used.  
C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=175°C. Ratings are based on low frequency and duty cycles to keep initial  
TJ =25°C.  
D. The RθJA is the sum of the thermal impedence from junction to case RθJC and case to ambient.  
E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max.  
F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming  
a maximum junction temperature of TJ(MAX)=175°C. The SOA curve provides a single pulse rating.  
G. These tests are performed with the device mounted on 1 in2 FR-4 board with 2oz. Copper, in a still air environment with TA=25°C.  
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING  
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,  
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.  
Rev 0 : Aug 2009  
www.aosmd.com  
Page 2 of 6  
AOD4184/AOI4184  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
120  
100  
80  
60  
40  
20  
0
100  
80  
60  
40  
20  
0
10V  
5V  
VDS=5V  
4V  
3.5V  
125°C  
25°C  
VGS=3V  
2
2.5  
3
3.5  
4
4.5  
0
1
2
3
4
5
VGS(Volts)  
VDS (Volts)  
Figure 2: Transfer Characteristics (Note E)  
Fig 1: On-Region Characteristics (Note E)  
10  
9
2.2  
2
VGS=4.5V  
VGS=10V  
ID=20A  
1.8  
1.6  
1.4  
1.2  
1
8
7
VGS=4.5V  
VGS=10V  
6
ID=15A  
0.8  
0.6  
5
-50 -25  
0
25 50  
75 100 125 150 175  
0
5
10  
15  
20  
25  
30  
ID (A)  
Temperature (°C)  
Figure 3: On-Resistance vs. Drain Current and  
Gate Voltage (Note E)  
Figure 4: On-Resistance vs. Junction Temperature  
(Note E)  
25  
1.0E+02  
ID=20A  
1.0E+01  
20  
15  
10  
5
125°C  
1.0E+00  
1.0E-01  
1.0E-02  
1.0E-03  
1.0E-04  
1.0E-05  
25°C  
125°C  
25°C  
2
4
6
8
10  
0.0  
0.2  
0.4  
0.6  
0.8  
1.0  
1.2  
VGS (Volts)  
VSD (Volts)  
Figure 5: On-Resistance vs. Gate-Source Voltage  
(Note E)  
Figure 6: Body-Diode Characteristics  
(Note E)  
Rev 0 : Aug 2009  
www.aosmd.com  
Page 3 of 6  
AOD4184/AOI4184  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
10  
2500  
2000  
1500  
1000  
500  
VDS=20V  
ID=20A  
8
Ciss  
6
4
Coss  
Crss  
2
0
0
0
5
10  
15  
Qg (nC)  
20  
25  
30  
0
10  
20  
VDS (Volts)  
30  
40  
Figure 7: Gate-Charge Characteristics  
Figure 8: Capacitance Characteristics  
1000  
800  
600  
400  
200  
0
1000.0  
100.0  
10.0  
1.0  
TJ(Max)=175°C  
TC=25°C  
10µs  
RDS(ON)  
limited  
100µs  
1ms  
10ms  
DC  
0.1  
TJ(Max)=175°C  
TC=25°C  
0.0  
0.01  
0.1  
1
10  
100  
1E-05 0.0001 0.001 0.01  
0.1  
1
10  
VDS (Volts)  
Pulse Width (s)  
Figure 9: Maximum Forward Biased Safe  
Operating Area (Note F)  
Figure 10: Single Pulse Power Rating Junction-to-  
Case (Note F)  
10  
1
In descending order  
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse  
D=Ton/T  
J,PK=TC+PDM.ZθJC.RθJ  
RθJC=3°C/W  
T
0.1  
P
Single Pulse  
0.0001  
T
T
0.01  
0.00001  
0.001  
0.01  
0.1  
1
Pulse Width (s)  
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)  
Rev 0 : Aug 2009  
www.aosmd.com  
Page 4 of 6  
AOD4184/AOI4184  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
100  
60  
50  
40  
30  
20  
10  
0
TA=25°C  
TA=100°C  
TA=125°C  
TA=150°C  
0.00001  
10  
0
25  
50  
75  
100  
125  
150  
175  
0.000001  
0.0001  
0.001  
Time in avalanche, tA (s)  
TCASE (°C)  
Figure 12: Single Pulse Avalanche capability (Note  
C)  
Figure 13: Power De-rating (Note F)  
1000  
100  
10  
60  
50  
40  
30  
20  
10  
0
TA=25°C  
1
0.001  
0.1  
10  
1000  
0
25  
50  
75  
100  
125  
150  
175  
TCASE (°C)  
Pulse Width (s)  
Figure 14: Current De-rating (Note F)  
Figure 15: Single Pulse Power Rating Junction-to-  
Ambient (Note H)  
10  
1
In descending order  
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse  
D=Ton/T  
T
J,PK=TA+PDM.ZθJA.RθJA  
RθJA=55°C/W  
0.1  
0.01  
PD  
Ton  
Single Pulse  
0.01  
T
0.001  
0.00001  
0.0001  
0.001  
0.1  
1
10  
100  
1000  
Pulse Width (s)  
Figure 16: Normalized Maximum Transient Thermal Impedance (Note H)  
Rev 0 : Aug 2009  
www.aosmd.com  
Page 5 of 6  
AOD4184/AOI4184  
Gate Charge Test Circuit & Waveform  
Vgs  
Qg  
10V  
+
VDC  
+
Qgs  
Qgd  
Vds  
VDC  
-
-
DUT  
Vgs  
Ig  
Charge  
Resistive Switching Test Circuit & Waveforms  
RL  
Vds  
Vds  
90%  
10%  
+
DUT  
Vdd  
Vgs  
VDC  
Rg  
-
Vgs  
Vgs  
td(on)  
t
r
td(off)  
t
f
ton  
toff  
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms  
L
EAR= 1/2 LIA2R  
BVDSS  
Vds  
Id  
Vgs  
Vds  
+
Vgs  
Vdd  
I AR  
VDC  
Id  
Rg  
-
DUT  
Vgs  
Vgs  
Diode Recovery Test Circuit & Waveforms  
Q rr = - Idt  
Vds +  
Vds -  
Ig  
DUT  
Vgs  
trr  
L
Isd  
I F  
Isd  
Vgs  
dI/dt  
I RM  
+
Vdd  
VDC  
Vdd  
-
Vds  
Rev 0 : Aug 2009  
www.aosmd.com  
Page 6 of 6  

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