AOD4185_12 [AOS]

P-Channel Enhancement Mode Field Effect Transistor; P沟道增强型场效应晶体管
AOD4185_12
型号: AOD4185_12
厂家: ALPHA & OMEGA SEMICONDUCTORS    ALPHA & OMEGA SEMICONDUCTORS
描述:

P-Channel Enhancement Mode Field Effect Transistor
P沟道增强型场效应晶体管

晶体 晶体管 场效应晶体管
文件: 总6页 (文件大小:275K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
AOD4185/AOI4185  
P-Channel Enhancement Mode Field Effect Transistor  
General Description  
Features  
The AOD4185/AOI4185 uses advanced trench  
technology to provide excellent RDS(ON) and low gate  
charge. With the excellent thermal resistance of the  
DPAK/IPAK package, this device is well suited for high  
current applications.  
VDS (V) = -40V  
ID = -40A  
RDS(ON) < 15m(VGS = -10V)  
RDS(ON) < 20m(VGS = -4.5V)  
(VGS = -10V)  
100% UIS Tested!  
100% Rg Tested!  
-RoHS Compliant  
-Halogen Free*  
TO252  
DPAK  
TO-251A  
IPAK  
D
Bottom View  
Top View  
Top View  
Bottom View  
D
D
D
D
G
S
G
S
G
S
S
G
D
D
G
S
Absolute Maximum Ratings TC=25°C unless otherwise noted  
Parameter  
Symbol  
Maximum  
Units  
Drain-Source Voltage  
VDS  
-40  
V
Gate-Source Voltage  
Continuous Drain  
Current B,H  
Pulsed Drain Current C  
Avalanche Current C  
VGS  
±20  
-40  
V
TC=25°C  
TC=100°C  
ID  
-31  
A
IDM  
IAR  
EAR  
-115  
-42  
Repetitive avalanche energy L=0.1mH C  
88  
mJ  
W
°C  
TC=25°C  
62.5  
31  
PD  
Power Dissipation B  
TC=100°C  
TA=25°C  
2.5  
PDSM  
Power Dissipation A  
1.6  
TA=70°C  
Junction and Storage Temperature Range  
TJ, TSTG  
-55 to 175  
Thermal Characteristics  
Parameter  
Symbol  
Typ  
15  
41  
2
Max  
20  
Units  
°C/W  
°C/W  
°C/W  
Maximum Junction-to-Ambient A,G  
t 10s  
RθJA  
Maximum Junction-to-Ambient A,G  
Maximum Junction-to-Case D,F  
Steady-State  
Steady-State  
50  
2.4  
RθJC  
Alpha & Omega Semiconductor, Ltd.  
www.aosmd.com  
AOD4185/AOI4185  
Electrical Characteristics (TJ=25°C unless otherwise noted)  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Units  
STATIC PARAMETERS  
ID=-250µA, VGS=0V  
BVDSS  
Drain-Source Breakdown Voltage  
-40  
V
VDS=-40V, VGS=0V  
-1  
-5  
IDSS  
Zero Gate Voltage Drain Current  
µA  
TJ=55°C  
VDS=0V, VGS= ±20V  
VDS=VGS ID=-250µA  
VGS=-10V, VDS=-5V  
VGS=-10V, ID=-20A  
IGSS  
Gate-Body leakage current  
Gate Threshold Voltage  
On state drain current  
±100  
-3  
nA  
V
VGS(th)  
ID(ON)  
-1.7  
-1.9  
-115  
A
12.5  
19  
15  
23  
20  
RDS(ON)  
Static Drain-Source On-Resistance  
TJ=125°C  
mΩ  
VGS=-4.5V, ID=-15A  
VDS=-5V, ID=-20A  
IS=-1A,VGS=0V  
16  
gFS  
VSD  
IS  
Forward Transconductance  
Diode Forward Voltage  
50  
S
V
A
-0.72  
-1  
Maximum Body-Diode Continuous Current  
-20  
DYNAMIC PARAMETERS  
Ciss  
Coss  
Crss  
Rg  
Input Capacitance  
2550  
280  
190  
4
pF  
pF  
pF  
VGS=0V, VDS=-20V, f=1MHz  
GS=0V, VDS=0V, f=1MHz  
Output Capacitance  
Reverse Transfer Capacitance  
Gate resistance  
V
2.5  
6
SWITCHING PARAMETERS  
Qg (-10V) Total Gate Charge  
Qg (-4.5V) Total Gate Charge  
42  
18.6  
7
55  
nC  
VGS=-10V, VDS=-20V,  
ID=-20A  
Qgs  
Qgd  
tD(on)  
tr  
Gate Source Charge  
Gate Drain Charge  
Turn-On DelayTime  
Turn-On Rise Time  
Turn-Off DelayTime  
Turn-Off Fall Time  
nC  
nC  
ns  
ns  
ns  
ns  
8.6  
9.4  
20  
V
GS=-10V, VDS=-20V, RL=1,  
RGEN=3Ω  
tD(off)  
tf  
55  
30  
trr  
IF=-20A, dI/dt=100A/µs  
IF=-20A, dI/dt=100A/µs  
38  
49  
Body Diode Reverse Recovery Time  
Body Diode Reverse Recovery Charge  
ns  
Qrr  
47  
nC  
A: The value of RθJA is measured with the device in a still air environment with T A =25°C. The power dissipation PDSM and current rating IDSM are  
based on TJ(MAX)=150°C, using steady state junction-to-ambient thermal resistance.  
B. The power dissipation PD is based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper  
dissipation limit for cases where additional heatsinking is used.  
C: Repetitive rating, pulse width limited by junction temperature TJ(MAX)=175°C.  
D. The RθJA is the sum of the thermal impedence from junction to case RθJC and case to ambient.  
E. The static characteristics in Figures 1 to 6 are obtained using <300 µs pulses, duty cycle 0.5% max.  
F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming a  
maximum junction temperature of TJ(MAX)=175°C. The SOA curve provides a single pulse rating.  
G. These tests are performed with the device mounted on 1 in2 FR-4 board with 2oz. Copper, in a still air environment with TA=25°C.  
H. The maximum current rating is limited by bond-wires.  
*This device is guaranteed green after data code 8X11 (Sep 1ST 2008).  
Rev4: April, 2012  
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING  
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,  
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.  
Alpha & Omega Semiconductor, Ltd.  
www.aosmd.com  
AOD4185/AOI4185  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
120  
100  
80  
60  
40  
20  
0
100  
VDS=-5V  
-6.0V  
-10V  
-4.5V  
-4.0V  
80  
60  
40  
20  
0
`
125°C  
VGS=-3.5V  
25°  
0
1
2
3
4
5
1.5  
2
2.5  
3
3.5  
4
4.5  
5
-VDS (Volts)  
-VGS(Volts)  
Figure 1: On-Region Characteristics  
Figure 2: Transfer Characteristics  
24  
2
1.8  
1.6  
1.4  
1.2  
1
22  
20  
18  
16  
14  
12  
10  
VGS=-10V  
ID=-20A  
VGS=-4.5V  
VGS=-10V  
VGS=-4.5V  
ID=-15A  
0.8  
0.6  
0
10  
20  
30  
40  
50  
60  
-50 -25  
0
25 50 75 100 125 150 175 200  
-ID (A)  
Temperature (°C)  
Figure 4: On-Resistance vs. Junction Temperature  
Figure 3: On-Resistance vs. Drain Current and  
Gate Voltage  
100  
45  
40  
35  
30  
25  
20  
15  
10  
ID=-20A  
10  
1
0.1  
125°C  
125°C  
25°C  
0.01  
25°C  
0.001  
0.0001  
0.00001  
3
4
5
6
7
8
9
10  
0.0  
0.2  
0.4  
-VSD (Volts)  
Figure 6: Body-Diode Characteristics  
0.6  
0.8  
1.0  
1.2  
-VGS (Volts)  
Figure 5: On-Resistance vs. Gate-Source Voltage  
Alpha & Omega Semiconductor, Ltd.  
www.aosmd.com  
AOD4185/AOI4185  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
3500  
10  
8
VDS=-20V  
ID=-20A  
3000  
2500  
2000  
1500  
1000  
500  
Ciss  
6
4
Crss  
2
Coss  
0
0
0
5
10  
15  
-VDS (Volts)  
Figure 8: Capacitance Characteristics  
20  
25  
30  
35  
40  
0
5
10  
15  
20  
Qg (nC)  
Figure 7: Gate-Charge Characteristics  
25  
30  
35  
40  
45  
10000  
1000  
100  
1000  
100  
10  
TJ(Max)=175°  
C
10µs  
RDS(ON)  
limited  
100µs  
1ms  
10ms  
1
DC  
TJ(Max)=175°C  
TC=25°C  
0.1  
10  
0.1  
1
10  
100  
0.00001 0.0001  
0.001  
0.01  
0.1  
1
-VDS (Volts)  
Pulse Width (s)  
Figure 10: Single Pulse Power Rating Junction-to-  
Case (Note F)  
Figure 9: Maximum Forward Biased  
Safe Operating Area (Note F)  
10  
D=Ton/T  
TJ,PK=Tc+PDM.ZθJC.RθJC  
In descending order  
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse  
RθJC=2.4°C/W  
1
0.1  
PD  
Ton  
T
Single Pulse  
0.01  
0.00001  
0.0001  
0.001  
Pulse Width (s)  
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)  
0.01  
0.1  
1
Alpha & Omega Semiconductor, Ltd.  
www.aosmd.com  
AOD4185/AOI4185  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
70  
60  
50  
40  
30  
20  
10  
0
50  
40  
30  
20  
10  
0
0
25  
50  
75  
TCASE (°C)  
Figure 12: Power De-rating (Note B)  
100  
125  
150  
175  
0
25  
50  
75  
100  
125  
150  
175  
TCASE (°C)  
Figure 13: Current De-rating (Note B)  
10000  
TJ(Max)=150°  
C
1000  
100  
10  
1
0.0001  
0.001  
0.01  
0.1  
Pulse Width (s)  
1
10  
100  
1000  
Figure 14: Single Pulse Power Rating Junction-to-Ambient (Note G)  
10  
1
D=Ton/T  
TJ,PK=TA+PDM.ZθJA.RθJA  
θJA=50°C/W  
In descending order  
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse  
R
0.1  
PD  
0.01  
Ton  
T
Single Pulse  
0.001  
0.00001  
0.0001  
0.001  
0.01  
Pulse Width (s)  
Figure 15: Normalized Maximum Transient Thermal Impedance (Note G)  
0.1  
1
10  
100  
1000  
Alpha & Omega Semiconductor, Ltd.  
www.aosmd.com  
AOD4185/AOI4185  
Gate Charge Test Circuit & Waveform  
Vgs  
Qg  
-
-10V  
-
VDC  
Qgs  
Qgd  
+
Vds  
VDC  
+
DUT  
Vgs  
Ig  
Charge  
Resistive Switching Test Circuit & Waveforms  
RL  
Vds  
toff  
ton  
t
td(off)  
td(on)  
t
r
f
Vgs  
-
90%  
10%  
DUT  
Vdd  
Vgs  
VDC  
+
Rg  
Vgs  
Vds  
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms  
EAR= 1/2 LIA2R  
L
Vds  
Id  
Vgs  
Vds  
-
BVDSS  
Vgs  
Vdd  
VDC  
+
Id  
Rg  
I AR  
DUT  
Vgs  
Vgs  
Diode Recovery Test Circuit & Waveforms  
Qrr = - Idt  
Vds +  
DUT  
Vgs  
trr  
Vds -  
L
-Isd  
-IF  
Isd  
Vgs  
dI/dt  
-IRM  
+
Vdd  
VDC  
Vdd  
-
-Vds  
Ig  
Alpha & Omega Semiconductor, Ltd.  
www.aosmd.com  

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