AON6816 [AOS]

30V Dual N-Channel AlphaMOS; 30V双N沟道AlphaMOS
AON6816
型号: AON6816
厂家: ALPHA & OMEGA SEMICONDUCTORS    ALPHA & OMEGA SEMICONDUCTORS
描述:

30V Dual N-Channel AlphaMOS
30V双N沟道AlphaMOS

文件: 总6页 (文件大小:287K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
AON6816  
30V Dual N-Channel AlphaMOS  
General Description  
Product Summary  
VDS  
• Latest Trench Power AlphaMOS (αMOS LV) technology  
• Very Low RDS(on) at 4.5VGS  
• Low Gate Charge  
• ESD protection  
• RoHS and Halogen-Free Compliant  
30V  
ID (at VGS=10V)  
RDS(ON) (at VGS=10V)  
RDS(ON) (at VGS = 4.5V)  
16A  
< 6.1m  
< 9.5mΩ  
Typical ESD protection  
HBM Class 2  
Application  
• DC/DC Converters  
100% UIS Tested  
100% Rg Tested  
D1  
D2  
Top View  
DFN5X6 EP2  
1
8
7
6
5
S1  
D1  
D1  
D2  
D2  
2
G1  
G1  
G2  
3
S2  
4
G2  
S1  
S2  
Absolute Maximum Ratings TA=25°C unless otherwise noted  
Parameter  
Symbol  
Maximum  
Units  
Drain-Source Voltage  
VDS  
30  
V
Gate-Source Voltage  
VGS  
±20  
V
A
TC=25°C  
16  
Continuous Drain  
CurrentG  
ID  
TC=100°C  
13  
Pulsed Drain Current C  
IDM  
64  
TA=25°C  
TA=70°C  
17  
Continuous Drain  
Current  
IDSM  
A
14  
Avalanche Current C  
IAS  
35  
A
mJ  
V
Avalanche energy L=0.05mH C  
EAS  
31  
VDS Spike  
100ns  
VSPIKE  
36  
TC=25°C  
TC=100°C  
TA=25°C  
TA=70°C  
21  
PD  
W
Power Dissipation B  
Power Dissipation A  
8
2.8  
PDSM  
W
°C  
1.8  
Junction and Storage Temperature Range  
TJ, TSTG  
-55 to 150  
Thermal Characteristics  
Parameter  
Symbol  
Typ  
35  
65  
5
Max  
45  
80  
6
Units  
°C/W  
°C/W  
°C/W  
Maximum Junction-to-Ambient A  
Maximum Junction-to-Ambient A D  
Maximum Junction-to-Case  
t
10s  
RθJA  
Steady-State  
Steady-State  
RθJC  
Rev0: Mar 2012  
www.aosmd.com  
Page 1 of 6  
AON6816  
Electrical Characteristics (TJ=25°C unless otherwise noted)  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max Units  
STATIC PARAMETERS  
ID=250µA, VGS=0V  
BVDSS  
Drain-Source Breakdown Voltage  
30  
V
VDS=30V, VGS=0V  
1
IDSS  
Zero Gate Voltage Drain Current  
µA  
TJ=55°C  
5
VDS=0V, VGS= ±20V  
VDS=VGS,ID=250µA  
VGS=10V, ID=16A  
IGSS  
Gate-Body leakage current  
Gate Threshold Voltage  
±10  
2.2  
6.2  
8.4  
9.6  
µA  
VGS(th)  
1.2  
1.8  
5
V
mΩ  
RDS(ON)  
Static Drain-Source On-Resistance  
TJ=125°C  
6.8  
7.5  
62  
VGS=4.5V, ID=15A  
VDS=5V, ID=16A  
IS=1A,VGS=0V  
mΩ  
S
gFS  
VSD  
IS  
Forward Transconductance  
Diode Forward Voltage  
0.7  
1
V
Maximum Body-Diode Continuous CurrentG  
16  
A
DYNAMIC PARAMETERS  
Ciss  
Coss  
Crss  
Rg  
Input Capacitance  
1540  
485  
448  
1.7  
pF  
pF  
pF  
VGS=0V, VDS=15V, f=1MHz  
Output Capacitance  
Reverse Transfer Capacitance  
Gate resistance  
VGS=0V, VDS=0V, f=1MHz  
0.8  
2.6  
SWITCHING PARAMETERS  
Qg(10V) Total Gate Charge  
33.4  
19.7  
3.3  
15.0  
7
45  
27  
nC  
nC  
nC  
nC  
ns  
Qg(4.5V) Total Gate Charge  
VGS=10V, VDS=15V, ID=16A  
Qgs  
Qgd  
tD(on)  
tr  
Gate Source Charge  
Gate Drain Charge  
Turn-On DelayTime  
Turn-On Rise Time  
Turn-Off DelayTime  
Turn-Off Fall Time  
VGS=10V, VDS=15V, RL=0.9,  
RGEN=3Ω  
8.3  
24  
ns  
tD(off)  
tf  
ns  
10  
ns  
trr  
IF=16A, dI/dt=500A/µs  
IF=16A, dI/dt=500A/µs  
Body Diode Reverse Recovery Time  
Body Diode Reverse Recovery Charge  
15.2  
22.2  
ns  
Qrr  
nC  
A. The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The  
Power dissipation PDSM is based on R θJA and the maximum allowed junction temperature of 150°C. The value in any given application depends  
on the user's specific board design.  
B. The power dissipation PD is based on TJ(MAX)=150°C, using junction-to-case thermal resistance, and is more useful in setting the upper  
dissipation limit for cases where additional heatsinking is used.  
C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C. Ratings are based on low frequency and duty cycles to keep  
initial TJ =25°C.  
D. The RθJA is the sum of the thermal impedance from junction to case RθJC and case to ambient.  
E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max.  
F. These curves are based on the junction-to-case thermal impedance which is measured with the device mounted to a large heatsink, assuming  
a maximum junction temperature of TJ(MAX)=150°C. The SOA curve provides a single pulse rating.  
G. The maximum current rating is package limited.  
H. These tests are performed with the device mounted on 1 in2 FR-4 board with 2oz. Copper, in a still air environment with TA=25°C.  
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL  
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING  
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,  
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.  
Rev0: Mar 2012  
www.aosmd.com  
Page 2 of 6  
AON6816  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
30  
20  
10  
0
30  
20  
10  
0
3.5V  
VDS=5V  
4.5V  
10V  
3V  
125°C  
25°C  
VGS=2.5V  
0
1
2
3
4
5
0
1
2
3
4
5
VGS(Volts)  
VDS (Volts)  
Fig 1: On-Region Characteristics (Note E)  
Figure 2: Transfer Characteristics (Note E)  
10  
8
1.6  
1.4  
1.2  
1
VGS=10V  
ID=16A  
VGS=4.5V  
6
VGS  
=4.5V  
ID=15A  
4
VGS=10V  
2
0.8  
0
5
10  
ID (A)  
15  
20  
0
25  
50  
75  
100 125 150 175 200  
Temperature (°C)  
Figure 3: On-Resistance vs. Drain Current and Gate  
Voltage (Note E)  
Figure 4: On-Resistance vs. JunctionTemperature  
(Note E)  
1.0E+02  
1.0E+01  
11  
9.5  
8
ID=16A  
1.0E+00  
125°C  
125°C  
1.0E-01  
1.0E-02  
1.0E-03  
1.0E-04  
1.0E-05  
6.5  
5
25°C  
25°C  
3.5  
2
2
4
6
8
10  
0.0  
0.2  
0.4  
VSD (Volts)  
Figure 6: Body-Diode Characteristics (Note E)  
0.6  
0.8  
1.0  
1.2  
VGS (Volts)  
Figure 5: On-Resistance vs. Gate-Source Voltage  
(Note E)  
Rev0: Mar 2012  
www.aosmd.com  
Page 3 of 6  
AON6816  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
10  
2500  
VDS=15V  
ID=16A  
8
2000  
1500  
1000  
500  
0
Ciss  
6
4
Coss  
2
Crss  
0
0
5
10  
15  
20  
25  
30  
35  
0
5
10  
15  
20  
25  
30  
VDS (Volts)  
Qg (nC)  
Figure 8: Capacitance Characteristics  
Figure 7: Gate-Charge Characteristics  
200  
160  
120  
80  
1000.0  
100.0  
10.0  
1.0  
TJ(Max)=150°C  
TC=25°C  
10µs  
RDS(ON)  
100µs  
1ms  
DC  
10ms  
100ms  
TJ(Max)=150°C  
TC=25°C  
0.1  
40  
0.0  
0
0.01  
0.1  
1
10  
100  
0.0001  
0.001  
0.01  
0.1  
1
10  
VDS (Volts)  
Pulse Width (s)  
Figure 9: Maximum Forward Biased Safe  
Operating Area (Note F)  
Figure 10: Single Pulse Power Rating Junction-to-Case  
(Note F)  
10  
1
D=Ton/T  
TJ,PK=TC+PDM.ZθJC.RθJC  
In descending order  
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse  
RθJC=6°C/W  
0.1  
PD  
0.01  
0.001  
Ton  
T
Single Pulse  
0.01  
1E-05  
0.0001  
0.001  
0.1  
1
10  
Pulse Width (s)  
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)  
Rev0: Mar 2012  
www.aosmd.com  
Page 4 of 6  
AON6816  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
25  
20  
20  
15  
10  
5
15  
10  
5
0
0
0
25  
50  
75  
TCASE (°C)  
100  
125  
150  
0
25  
50  
75  
TCASE (°C)  
100  
125  
150  
Figure 12: Power De-rating (Note F)  
Figure 13: Current De-rating (Note F)  
10000  
TA=25°C  
1000  
100  
10  
1
1E-05  
0.001  
0.1  
10  
1000  
Pulse Width (s)  
Figure 14: Single Pulse Power Rating Junction-to-  
Ambient (Note H)  
10  
1
D=Ton/T  
TJ,PK=TA+PDM.ZθJA.RθJA  
In descending order  
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse  
RθJA=80°C/W  
0.1  
0.01  
PD  
Ton  
Single Pulse  
0.01  
T
0.001  
0.0001  
0.001  
0.1  
1
10  
100  
Pulse Width (s)  
Figure 15: Normalized Maximum Transient Thermal Impedance (Note H)  
Rev0: Mar 2012  
www.aosmd.com  
Page 5 of 6  
AON6816  
Gate Charge Test Circuit & Waveform  
Vgs  
Qg  
10V  
+
VDC  
+
Qgs  
Qgd  
Vds  
VDC  
-
-
DUT  
Vgs  
Ig  
Charge  
Resistive Switching Test Circuit & Waveforms  
RL  
Vds  
Vds  
90%  
10%  
+
DUT  
Vdd  
Vgs  
VDC  
Rg  
-
Vgs  
Vgs  
td(on)  
t
r
td(off)  
t
f
ton  
toff  
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms  
L
EAR= 1/2 LIA2R  
BVDSS  
Vds  
Id  
Vgs  
Vds  
+
Vgs  
Vdd  
I AR  
VDC  
Id  
Rg  
-
DUT  
Vgs  
Vgs  
Diode Recovery Test Circuit & Waveforms  
Qrr = - Idt  
Vds +  
Vds -  
Ig  
DUT  
Vgs  
trr  
L
Isd  
I F  
Isd  
Vgs  
dI/dt  
I RM  
+
Vdd  
VDC  
Vdd  
-
Vds  
Rev0: Mar 2012  
www.aosmd.com  
Page 6 of 6  

相关型号:

AON6850

100V Dual N-Channel MOSFET
AOS

AON6884

40V Dual N-Channel MOSFET
AOS

AON6906A

30V Dual Asymmetric N-Channel MOSFET
AOS

AON6908A

30V Dual Asymmetric N-Channel MOSFET
AOS

AON6910A

30V Dual Asymmetric N-Channel MOSFET
AOS

AON6912A

30V Dual Asymmetric N-Channel MOSFET
AOS

AON6918

25V Dual Asymmetric N-Channel MOSFET
AOS

AON6920

30V Dual Asymmetric N-Channel MOSFET
AOS

AON6922

25V Dual Asymmetric N-Channel MOSFET
AOS

AON6924

30V Dual Asymmetric N-Channel MOSFET
AOS

AON6926

30V Dual Asymmetric N-Channel MOSFET
AOS

AON6928

30V Dual Asymmetric N-Channel AlphaMOS
AOS