AON7200 [AOS]

30V N-Channel MOSFET; 30V N沟道MOSFET
AON7200
型号: AON7200
厂家: ALPHA & OMEGA SEMICONDUCTORS    ALPHA & OMEGA SEMICONDUCTORS
描述:

30V N-Channel MOSFET
30V N沟道MOSFET

文件: 总6页 (文件大小:227K)
中文:  中文翻译
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AON7200  
30V N-Channel MOSFET  
General Description  
Product Summary  
VDS  
30V  
The AON7200 uses trench MOSFET technology that is  
uniquely optimized to provide the most efficient high  
frequency switching performance. Conduction and  
switching losses are minimized due to an extremely low  
combination of RDS(ON) and Crss.  
ID (at VGS=10V)  
RDS(ON) (at VGS=10V)  
RDS(ON) (at VGS = 4.5V)  
40A  
< 8m  
< 11mΩ  
100% UIS Tested  
100% Rg Tested  
DFN 3x3 EP  
D
Top View  
Bottom View  
Top View  
1
8
7
6
5
2
3
4
G
S
Pin 1  
Absolute Maximum Ratings TA=25°C unless otherwise noted  
Parameter  
Symbol  
Maximum  
Units  
Drain-Source Voltage  
VDS  
30  
V
V
Gate-Source Voltage  
VGS  
±20  
40  
TC=25°C  
Continuous Drain  
Current G  
ID  
TC=100°C  
31  
A
Pulsed Drain Current C  
IDM  
146  
15.8  
12.7  
28  
TA=25°C  
TA=70°C  
Continuous Drain  
Current  
Avalanche Current C  
Repetitive avalanche energy L=0.1mH C  
IDSM  
A
IAS, IAR  
A
EAS, EAR  
39  
mJ  
TC=25°C  
Power Dissipation B  
TC=100°C  
62  
PD  
W
25  
TA=25°C  
3.1  
PDSM  
W
°C  
Power Dissipation A  
2
TA=70°C  
Junction and Storage Temperature Range  
TJ, TSTG  
-55 to 150  
Thermal Characteristics  
Parameter  
Symbol  
Typ  
30  
Max  
Units  
°C/W  
°C/W  
°C/W  
Maximum Junction-to-Ambient A  
Maximum Junction-to-Ambient A D  
Maximum Junction-to-Case  
t
10s  
40  
75  
2
RθJA  
Steady-State  
Steady-State  
60  
RθJC  
1.6  
Rev 5: Jul 2011  
www.aosmd.com  
Page 1 of 6  
AON7200  
Electrical Characteristics (TJ=25°C unless otherwise noted)  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max Units  
STATIC PARAMETERS  
ID=250µA, VGS=0V  
BVDSS  
Drain-Source Breakdown Voltage  
30  
V
VDS=30V, VGS=0V  
1
IDSS  
Zero Gate Voltage Drain Current  
µA  
5
TJ=55°C  
VDS=0V, VGS= ±20V  
VDS=VGS ID=250µA  
VGS=10V, VDS=5V  
VGS=10V, ID=20A  
IGSS  
Gate-Body leakage current  
Gate Threshold Voltage  
On state drain current  
100  
2.4  
nA  
V
VGS(th)  
ID(ON)  
1.3  
1.85  
146  
A
6.7  
9.2  
9
8
11  
11  
mΩ  
RDS(ON)  
Static Drain-Source On-Resistance  
TJ=125°C  
VGS=4.5V, ID=15A  
mΩ  
S
VDS=5V, ID=20A  
gFS  
VSD  
IS  
Forward Transconductance  
Diode Forward Voltage  
60  
0.7  
IS=1A,VGS=0V  
1
V
Maximum Body-Diode Continuous Current  
30  
A
DYNAMIC PARAMETERS  
Ciss  
Coss  
Crss  
Rg  
Input Capacitance  
870  
340  
22  
1090 1300  
pF  
pF  
pF  
VGS=0V, VDS=15V, f=1MHz  
Output Capacitance  
Reverse Transfer Capacitance  
Gate resistance  
490  
38  
640  
53  
VGS=0V, VDS=0V, f=1MHz  
0.4  
0.9  
1.4  
SWITCHING PARAMETERS  
Qg(10V) Total Gate Charge  
12  
5
16  
7
20  
9
nC  
nC  
nC  
nC  
ns  
Qg(4.5V) Total Gate Charge  
VGS=10V, VDS=15V, ID=20A  
Qgs  
Qgd  
tD(on)  
tr  
Gate Source Charge  
Gate Drain Charge  
Turn-On DelayTime  
Turn-On Rise Time  
Turn-Off DelayTime  
Turn-Off Fall Time  
2
2.5  
2.5  
5
3
1.5  
3.5  
VGS=10V, VDS=15V, RL=0.75,  
RGEN=3Ω  
2
ns  
tD(off)  
tf  
16  
2
ns  
ns  
trr  
IF=20A, dI/dt=500A/µs  
IF=20A, dI/dt=500A/µs  
10  
20  
Body Diode Reverse Recovery Time  
Body Diode Reverse Recovery Charge  
13  
25  
16  
30  
ns  
Qrr  
nC  
A. The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The  
Power dissipation PDSM is based on R θJA t 10s value and the maximum allowed junction temperature of 150°C. The value in any given  
application depends on the user's specific board design.  
B. The power dissipation PD is based on TJ(MAX)=150°C, using junction-to-case thermal resistance, and is more useful in setting the upper  
dissipation limit for cases where additional heatsinking is used.  
C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C. Ratings are based on low frequency and duty cycles to keep  
initial TJ =25°C.  
D. The RθJA is the sum of the thermal impedence from junction to case RθJC and case to ambient.  
E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max.  
F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming  
a maximum junction temperature of TJ(MAX)=150°C. The SOA curve provides a single pulse rating.  
G. The maximum current rating is limited by bond-wires.  
H. These tests are performed with the device mounted on 1 in2 FR-4 board with 2oz. Copper, in a still air environment with TA=25°C.  
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING  
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,  
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.  
Rev 5: Jul 2011  
www.aosmd.com  
Page 2 of 6  
AON7200  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
80  
60  
40  
20  
0
50  
40  
30  
20  
10  
0
10V  
4V  
VDS=5V  
4.5V  
3.5V  
125°C  
VGS=3V  
25°C  
1
1.5  
2
2.5  
3
3.5  
4
0
1
2
3
4
5
VGS(Volts)  
VDS (Volts)  
Fig 1: On-Region Characteristics (Note E)  
Figure 2: Transfer Characteristics (Note E)  
1.6  
1.4  
1.2  
1
15  
VGS=10V  
ID=20A  
12  
9
VGS=4.5V  
VGS=4.5V  
ID=15A  
6
VGS=10V  
3
0.8  
0
0
25  
50  
75  
100  
125  
150  
175  
0
5
10  
15  
ID (A)  
20  
25  
30  
Temperature (°C)  
Figure 3: On-Resistance vs. Drain Current and Gate  
Voltage (Note E)  
Figure 4: On-Resistance vs. JunctionTemperature  
(Note E)  
40  
35  
30  
25  
20  
15  
10  
5
1.0E+02  
1.0E+01  
1.0E+00  
1.0E-01  
1.0E-02  
1.0E-03  
1.0E-04  
1.0E-05  
ID=20A  
125°C  
25°C  
125°C  
25°C  
0
2
4
6
8
10  
0.0  
0.2  
0.4  
VSD (Volts)  
Figure 6: Body-Diode Characteristics (Note E)  
0.6  
0.8  
1.0  
1.2  
VGS (Volts)  
Figure 5: On-Resistance vs. Gate-Source Voltage  
(Note E)  
Rev 5: Jul 2011  
www.aosmd.com  
Page 3 of 6  
AON7200  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
10  
1800  
1600  
1400  
1200  
1000  
800  
600  
400  
200  
0
VDS=15V  
ID=20A  
8
Ciss  
6
4
Coss  
2
Crss  
0
0
3
6
9
12  
15  
18  
0
5
10  
15  
20  
25  
30  
Qg (nC)  
VDS (Volts)  
Figure 7: Gate-Charge Characteristics  
Figure 8: Capacitance Characteristics  
500  
400  
300  
200  
100  
0
1000.0  
100.0  
10.0  
1.0  
TJ(Max)=150°C  
TC=25°C  
10µs  
100µs  
RDS(ON)  
1ms  
1s  
DC  
TJ(Max)=150°C  
TC=25°C  
0.1  
0.0  
0.01  
0.1  
1
10  
100  
0.00001 0.0001 0.001  
0.01  
0.1  
1
10  
VDS (Volts)  
Pulse Width (s)  
Figure 9: Maximum Forward Biased Safe  
Operating Area (Note F)  
Figure 10: Single Pulse Power Rating Junction-to-  
Case (Note F)  
10  
In descending order  
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse  
D=Ton/T  
TJ,PK=TC+PDM.ZθJC.RθJC  
RθJC=2°C/W  
1
0.1  
PD  
Ton  
T
Single Pulse  
0.0001  
0.01  
0.00001  
0.001  
0.01  
0.1  
1
10  
100  
Pulse Width (s)  
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)  
Rev 5: Jul 2011  
www.aosmd.com  
Page 4 of 6  
AON7200  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
100  
30  
25  
20  
15  
10  
5
TA=25°C  
TA=100°C  
TA=150°C  
TA=125°C  
0
10  
0.000001  
0
25  
50  
75  
100  
125  
150  
0.00001  
0.0001  
0.001  
Time in avalanche, tA (s)  
TCASE (°C)  
Figure 13: Power De-rating (Note F)  
Figure 12: Single Pulse Avalanche capability  
(Note C)  
1000  
50  
40  
30  
20  
10  
0
TA=25°C  
100  
10  
1
0
25  
50  
75  
100  
125  
150  
0.0001 0.001 0.01  
0.1  
1
10  
100 1000  
TCASE (°C)  
Pulse Width (s)  
Figure 14: Current De-rating (Note F)  
Figure 15: Single Pulse Power Rating Junction-to-  
Ambient (Note H)  
10  
1
In descending order  
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse  
D=Ton/T  
TJ,PK=TA+PDM.ZθJA.RθJA  
RθJA=75°C/W  
0.1  
PD  
0.01  
0.001  
Single Pulse  
Ton  
T
0.00001  
0.0001  
0.001  
0.01  
0.1  
1
10  
100  
1000  
Pulse Width (s)  
Figure 16: Normalized Maximum Transient Thermal Impedance (Note H)  
Rev 5: Jul 2011  
www.aosmd.com  
Page 5 of 6  
AON7200  
Gate Charge Test Circuit & Waveform  
Vgs  
Qg  
10V  
+
VDC  
+
Qgs  
Qgd  
Vds  
VDC  
-
-
DUT  
Vgs  
Ig  
Charge  
Resistive Switching Test Circuit & Waveforms  
RL  
Vds  
Vds  
90%  
10%  
+
DUT  
Vdd  
Vgs  
VDC  
Rg  
-
Vgs  
Vgs  
td(on)  
t
r
td(off)  
t
f
ton  
toff  
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms  
L
EAR= 1/2 LIA2R  
BVDSS  
Vds  
Id  
Vgs  
Vds  
+
Vgs  
Vdd  
I AR  
VDC  
Id  
Rg  
-
DUT  
Vgs  
Vgs  
Diode Recovery Test Circuit & Waveforms  
Qrr = - Idt  
Vds +  
Vds -  
Ig  
DUT  
Vgs  
trr  
L
Isd  
I F  
Isd  
Vgs  
dI/dt  
I RM  
+
Vdd  
VDC  
Vdd  
-
Vds  
Rev 5: Jul 2011  
www.aosmd.com  
Page 6 of 6  

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