AOT500L [AOS]
N-Channel Enhancement Mode Field Effect Transistor; N沟道增强型网络场效晶体管
| 型号： | AOT500L |
| 厂家： | 
ALPHA & OMEGA SEMICONDUCTORS |
| 描述： | N-Channel Enhancement Mode Field Effect Transistor |
| 文件： | 总7页 (文件大小：454K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
AOT500L
N-Channel Enhancement Mode Field Effect Transistor
General Description
Features
AOT500 uses an optimally designed temperature
compensated gate-drain zener clamp. Under overvoltage
conditions, the clamp activates and turns on the MOSFET,
safely dissipating the energy in the MOSFET.
The built in resistor guarantees proper clamp operation
under all circuit conditions, and the MOSFET never goes
into avalanche breakdown. Advanced trench technology
provides excellent low Rdson, gate charge and body diode
characteristics, making this device ideal for motor and
inductive load control applications.
VDS (V) = Clamped
ID = 80A (VGS = 10V)
RDS(ON) < 5.3 mΩ (VGS = 10V)
100% UIS tested
100% Rg tested
Standard Product AOT500 is Pb-free (meets ROHS &
Sony 259 specifications)
D
TO220
Top View
Bottom View
D
10Ω
D
G
S
G
D
D
S
G
S
Absolute Maximum Ratings TA=25°C unless otherwise noted
Parameter
Drain-Source Voltage
Gate-Source Voltage
Symbol
VDS
Maximum
clamped
clamped
80
Units
V
V
VGS
TC=25°C
Continuous Drain
Current G
A
TC=100°C
ID
57
Continuous Drain Gate Current
Continuouse Gate Source Current
Pulsed Drain Current C
Avalanche Current L=100uHH
Repetitive avalanche energy H
TC=25°C
IDG
IGS
IDM
IAR
EAR
+50
mA
+50
250
A
A
50
125
mJ
115
PD
W
°C
Power Dissipation B
58
TC=100°C
Junction and Storage Temperature Range
TJ, TSTG
-55 to 175
Thermal Characteristics
Parameter
Maximum Junction-to-Ambient A
Maximum Junction-to-Case B
Symbol
Typ
Max
Units
Steady-State
Steady-State
RθJA
RθJC
60
0.7
75
1.3
°C/W
°C/W
Alpha & Omega Semiconductor, Ltd.
www.aosmd.com
AOT500
Electrical Characteristics (TJ=25°C unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
STATIC PARAMETERS
ID=10mA, VGS=0V
ID=1A, VGS=0V
BVDSS(z) Drain-Source Breakdown Voltage
BVCLAMP Drain-Source Clamping Voltage
33
36
V
V
44
30
IDSS(z)
BVGSS
IGSS
Zero Gate Voltage Drain Current
Gate-Source Voltage
VDS=16V, VGS=0V
µA
V
VDS=0V, ID=250µA
VDS=0V, VGS=±10V
VDS=VGS, ID=250µA
20
Gate-Body leakage current
Gate Threshold Voltage
On state drain current
10
3
µΑ
V
VGS(th)
ID(ON)
1.5
2
V
GS=10V, VDS=5V
250
A
VGS=10V, ID=30A
4.1
6.2
95
5.3
RDS(ON)
Static Drain-Source On-Resistance
mΩ
TJ=125°C
VDS=5V, ID=30A
IS=1A, VGS=0V
gFS
VSD
IS
Forward Transconductance
Diode Forward Voltage
S
V
A
0.7
1
Maximum Body-Diode Continuous Current
80
DYNAMIC PARAMETERS
Ciss
Coss
Crss
Rg
Input Capacitance
4200
765
340
13
5500
pF
pF
pF
Ω
VGS=0V, VDS=15V, f=1MHz
Output Capacitance
Reverse Transfer Capacitance
Gate resistance
VGS=0V, VDS=0V, f=1MHz
30
89
SWITCHING PARAMETERS
Qg(10V) Total Gate Charge
Qg(4.5V) Total Gate Charge
69
34
12
15
25
35
150
62
60
84
nC
nC
nC
nC
ns
VGS=10V, VDS=15V, ID=30A
Qgs
Qgd
tD(on)
tr
Gate Source Charge
Gate Drain Charge
Turn-On DelayTime
Turn-On Rise Time
Turn-Off DelayTime
Turn-Off Fall Time
V
GS=10V, VDS=15V, RL=0.5Ω,
ns
RGEN=3Ω
tD(off)
tf
ns
ns
trr
IF=30A, dI/dt=100A/µs
IF=30A, dI/dt=100A/µs
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
78
ns
Qrr
nC
A: The value of R θJA is measured with the device in a still air environment with TA =25°C.
B. The power dissipation PD is based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper
dissipation limit for cases where additional heatsinking is used.
C: Repetitive rating, pulse width limited by junction temperature TJ(MAX)=175°C.
D. The R θJA is the sum of the thermal impedence from junction to case R θJC and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300 µs pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming a
maximum junction temperature of TJ(MAX)=175°C.
G. The maximum current rating is limited by bond-wires.
H. EAR and IAR are based on a 100uH inductor with Tj(start) = 25C for each pulse.
Rev 2: Dec 2010
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Alpha & Omega Semiconductor, Ltd.
www.aosmd.com
AOT500
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
250
200
150
100
50
100
80
60
40
20
0
5V
6V
VDS=5V
10V
4.5V
7V
4V
V
=3.5V
GS
25°C
125°C
-40°C
3.5
0
0
1
2
3
4
5
1
1.5
2
2.5
3
4
VDS (Volts)
Fig 1: On-Region Characteristics
VGS(Volts)
Figure 2: Transfer Characteristics
5
2
VGS=10V
1.8
1.6
1.4
1.2
1
VGS=10V
ID=30A
4.5
4
3.5
3
0.8
0.6
0
5
10
15
20
25
30
-50 -25
0
25 50 75 100 125 150 175 200
Temperature (°C)
ID (A)
Figure 4: On-Resistance vs. Junction
Temperature
Figure 3: On-Resistance vs. Drain Current and
Gate Voltage
14
12
10
8
100
10
1
ID=30A
125°C
0.1
25°C
125°C
0.01
0.001
6
-40°C
4
25°C
0.0001
-1. -1. -1. -1. -0. -0. -0. -0. 0.0 0.2 0.4 0.6 0.8 1.0 1.2
2
6
4
2
0
8
6
4
2
2
5
8
11
14
17
20
VSD (Volts)
Figure 6: Body-Diode Characteristics
VGS (Volts)
Figure 5: On-Resistance vs. Gate-Source Voltage
Alpha & Omega Semiconductor, Ltd.
AOT500
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
7000
10
8
VDS=30V
ID=30A
6000
5000
4000
3000
2000
1000
0
Ciss
6
4
Crss
Coss
2
0
0
10
20
30
Qg (nC)
Figure 7: Gate-Charge Characteristics
40
50
60
70
0
5
10
15
20
25
30
VDS (Volts)
Figure 8: Capacitance Characteristics
1000
100
10
10000
1000
100
TJ(Max)=175°C
TA=25°C
10µs
RDS(ON)
100µs
1ms
10ms
TJ(Max)=175°C
TC=25°C
DC
1
0.00001 0.0001 0.001
0.01
0.1
1
0.1
1
10
100
VDS (Volts)
Pulse Width (s)
Figure 10: Single Pulse Power Rating Junction-
to-Case (Note F)
Figure 9: Maximum Forward Biased
Safe Operating Area (Note E)
10
1
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
D=Ton/T
TJ,PK=TC+PDM.ZθJC.RθJC
RθJC=1.3°C/W
0.1
PD
Single Pulse
Ton
T
0.01
0.00001
0.0001
0.001
0.01
Pulse Width (s)
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)
0.1
1
10
100
Alpha & Omega Semiconductor, Ltd.
AOT500
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
1000
100
10
120
100
80
60
40
20
0
L ID
tA =
BV −VDD
TC=25°C
0
25
50
75
CASE (°C)
Figure 13: Power De-rating (Note B)
100
125
150
175
10
100
Time in avalanche, tA (us)
Figure 12: Single Pulse Avalanche capability
1000
T
100
80
60
40
20
0
0
25
50
75
100
125
150
175
TCASE (°C)
Figure 14: Current De-rating (Note B)
Alpha & Omega Semiconductor, Ltd.
AOT500
TYPICAL PROTECTION CHARACTERISTICS
2.00
Trench BV
1.50
1.00
0.50
0.00
BVCLAMP
D
+
Vz
-
BVDSS(Z)
R
+
-
30
35
40
45
G
+
V
DS (Volts)
Fig 15: BVCLAMP Characteristic
VPLATEAU
This device uses built-in Gate to Source and Gate to Drain zener
protection. While the Gate-Source zener protects against excessive
VGS conditions, the Gate to Drain protection, clamps the VDS well
below the device breakdown, preventing an avalanche condition
within the MOSFET as a result of voltage over-shoot at the Drain
electrode.
S
-
It is designed to breakdown well before the device breakdown.
During such an event, current flows through the zener clamp, which
is situated internally between the Gate to Drain. This current flows at
BVDSS(Z), building up the VGS internal to the device. When the
current level through the zener reaches approximately 300mA, the
VGS is approximately equal to VGS(PLATEAU), allowing significant
channel conduction and thus clamping the Drain to Source voltage.
The VGS needed to turn the device on is controlled with an internally
lumped gate resistor R approximately equal to 10Ω.
60.00
BVCLAMP25oC
50.00
40.00
30.00
20.00
10.00
0.00
BVCLAMP 100oC
VGS(PLATEAU)= 10Ω x 300mA =3V
It can also be said that the VDS during clamping is equal to:
BVDSS = BVCLAMP + VGS(PLATEAU)
0.00E+00 2.50E-06 5.00E-06 7.50E-06 1.00E-05
Additional power loss associated with the protection circuitry can be
considered negligible when compare to the conduction losses of the
MOSFET itself;
Time in Avalanche (Seconds)
Fig 16: Unclamped Inductive Switching
EX:
PL=30µAmax x 16V=0.48mW (Zener leakage loss)
Fig16: The built-in Gate to Drain clamp prevents the device from
going into Avalanche by setting the clamp voltage well below the
actual breakdown of the device. When the Drain to Gate voltage
approaches the BV clamp, the internal Gate to Source voltage is
charged up and channel conduction occurs, sinking the current
safely through the device. The BVCLAMP is virtually temperature
independent, providing even greater protection during normal
operation.
PL(rds)=102A x 6mΩ=300mW (MOSFET loss)
Alpha & Omega Semiconductor, Ltd.
AOT500
Gate Charge Test Circuit & Waveform
Vgs
Qg
10V
+
VDC
+
Qgs
Qgd
Vds
VDC
-
-
DUT
Vgs
Ig
Charge
Resistive Switching Test Circuit & Waveforms
RL
Vds
Vds
90%
10%
+
DUT
Vdd
Vgs
VDC
Rg
-
Vgs
Vgs
td(on)
t
r
td(off)
t
f
ton
toff
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
L
EAR= 1/2 LIA2R
BVDSS
Vds
Id
Vgs
Vds
+
Vgs
Vdd
I AR
VDC
Id
Rg
-
DUT
Vgs
Vgs
Diode Recovery Test Circuit & Waveforms
Qrr = - Idt
Vds +
DUT
Vgs
trr
Vds -
Ig
L
Isd
IF
Isd
Vgs
dI/dt
IRM
+
Vdd
VDC
Vdd
-
Vds
Alpha & Omega Semiconductor, Ltd.
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