AOZ1015AI [AOS]

EZBuck⑩ 1.5A Synchronous Buck Regulator; EZBuck ™ 1.5A同步降压稳压器
AOZ1015AI
型号: AOZ1015AI
厂家: ALPHA & OMEGA SEMICONDUCTORS    ALPHA & OMEGA SEMICONDUCTORS
描述:

EZBuck⑩ 1.5A Synchronous Buck Regulator
EZBuck ™ 1.5A同步降压稳压器

稳压器
文件: 总15页 (文件大小:718K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
AOZ1015  
EZBuck™ 1.5A Synchronous Buck Regulator  
General Description  
Features  
The AOZ1015 is a high efficiency, simple to use, 1.5A  
buck regulator. The AOZ1015 works from a 4.5V to  
16V input voltage range, and provides up to 1.5A of  
continuous output current with an output voltage  
adjustable down to 0.8V.  
4.5V to 16V operating input voltage range  
130minternal PFET switch for high efficiency:  
up to 95%  
Internal Schottky diode  
Internal soft start  
The AOZ1015 comes in an SO-8 package and is rated  
over a -40°C to +85°C ambient temperature range.  
Output voltage adjustable to 0.8V  
1.5A continuous output current  
Fixed 500kHz PWM operation  
Cycle-by-cycle current limit  
Short-circuit protection  
Under voltage lockout  
Output over voltage protection  
Thermal shutdown  
Small size SO-8 package  
Applications  
Point of load DC/DC conversion  
PCIe graphics cards  
Set top boxes  
DVD drives and HDD  
LCD panels  
Cable modems  
Telecom/networking/datacom equipment  
Typical Application  
VIN  
C1  
22µF Ceramic  
L1  
4.7µH  
VIN  
From µPC  
R1  
EN  
VOUT  
AOZ1015  
LX  
R2  
COMP  
C4, C6  
22µF x 2  
Ceramic  
FB  
C
R3  
2
C
5
AGND  
PGND  
Figure 1. 3.3V/1.5A Buck Regulator  
Rev. 1.2 September 2007  
www.aosmd.com  
Page 1 of 15  
AOZ1015  
Ordering Information  
Part Number  
Ambient Temperature Range  
Package  
Environmental  
AOZ1015AI  
-40°C to +85°C  
SO-8  
RoHS  
All AOS Products are offering in packaging with Pb-free plating and compliant to RoHS standards.  
Please visit www.aosmd.com/web/quality/rohs_compliant.jsp for additional information.  
Pin Configuration  
1
2
3
4
8
7
6
5
PGND  
VIN  
LX  
LX  
AGND  
FB  
EN  
COMP  
SO-8  
(Top View)  
Pin Description  
Pin Number Pin Name  
Pin Function  
1
2
3
PGND  
Power ground. Electrically needs to be connected to AGND.  
V
Supply voltage input. When V rises above the UVLO threshold the device starts up.  
IN  
IN  
AGND  
Reference connection for controller section. Also used as thermal connection for controller  
section. Electrically needs to be connected to PGND.  
4
FB  
The FB pin is used to determine the output voltage via a resistor divider between the output  
and GND.  
5
6
COMP  
EN  
External loop compensation pin.  
The enable pin is active HIGH. Connect EN pin to V if not used. Do not leave the EN pin  
IN  
floating.  
7, 8  
LX  
PWM output connection to inductor. Thermal connection for output stage.  
Rev. 1.2 September 2007  
www.aosmd.com  
Page 2 of 15  
AOZ1015  
Block Diagram  
VIN  
Internal  
+5V  
UVLO  
& POR  
5V LDO  
Regulator  
OTP  
EN  
+
ISen  
Reference  
& Bias  
Softstart  
Q1  
ILimit  
+
+
Level  
Shifter  
+
FET  
Driver  
+
PWM  
Control  
Logic  
0.8V  
PWM  
Comp  
EAmp  
FB  
LX  
COMP  
500kHz/63kHz  
Oscillator  
Frequency  
Foldback  
Comparator  
+
0.2V  
Over Voltage  
Protection  
Comparator  
0.96V  
+
AGND  
PGND  
Absolute Maximum Ratings  
Exceeding the Absolute Maximum ratings may damage the  
device.  
Recommend Operating Ratings  
The device is not guaranteed to operate beyond the Maximum  
Operating Ratings.  
Parameter  
Rating  
Parameter  
Rating  
Supply Voltage (V )  
18V  
-0.7V to V +0.3V  
IN  
Supply Voltage (V )  
4.5V to 16V  
IN  
LX to AGND  
IN  
Output Voltage Range  
0.8V to V  
IN  
EN to AGND  
-0.3V to V +0.3V  
IN  
Ambient Temperature (T )  
-40°C to +85°C  
87°C/W  
A
FB to AGND  
-0.3V to 6V  
-0.3V to 6V  
-0.3V to +0.3V  
+150°C  
Package Thermal Resistance SO-8  
)
(2  
COMP to AGND  
PGND to AGND  
(Θ  
)
JA  
Note:  
2
2.The value of ΘJA is measured with the device mounted on 1-in FR-4  
board with 2oz. Copper, in a still air environment with T = 25°C. The  
value in any given application depends on the user’s specific board  
design.  
Junction Temperature (T )  
J
A
Storage Temperature (T )  
-65°C to +150°C  
S
(1)  
ESD Rating  
Human Body Model  
Machine Model  
2kV  
200V  
Note:  
1. Devices are inherently ESD sensitive, handling precautions are  
required. Human body model rating: 1.5kin series with 100pF.  
The machine model is a 200pF capacitor discharged directly into  
each pin.  
Rev. 1.2 September 2007  
www.aosmd.com  
Page 3 of 15  
AOZ1015  
Electrical Characteristics  
)
(3  
T = 25°C, V = V = 12V, V = 3.3V unless otherwise specified.  
OUT  
A
IN  
EN  
Symbol  
Parameter  
Conditions  
Min.  
4.5  
Typ. Max. Units  
V
Supply Voltage  
16  
V
V
IN  
V
Input Under-Voltage Lockout Threshold  
V
V
Rising  
Falling  
4.00  
3.70  
UVLO  
IN  
IN  
I
Supply Current (Quiescent)  
Shutdown Supply Current  
Feedback Voltage  
I
= 0, V = 1.2V, V > 1.2V  
2
3
mA  
µA  
V
IN  
OUT  
FB  
EN  
I
V
= 0V  
1
10  
OFF  
EN  
V
0.782  
0.8  
0.5  
0.5  
0.818  
FB  
Load Regulation  
%
Line Regulation  
%
I
Feedback Voltage Input Current  
200  
nA  
FB  
ENABLE  
V
EN Input Threshold  
Off Threshold  
On Threshold  
0.6  
EN  
V
2.0  
V
EN Input Hysteresis  
EN Input Current  
100  
mV  
µA  
HYS  
I
1
600  
6
EN  
MODULATOR  
f
Frequency  
400  
100  
500  
kHz  
%
O
D
Maximum Duty Cycle  
Minimum Duty Cycle  
Error Amplifier Voltage Gain  
Error Amplifier Transconductance  
MAX  
D
%
MIN  
500  
200  
V/ V  
µA/V  
PROTECTION  
I
Current Limit  
2
3.6  
A
LIM  
V
Output Over-Voltage Protection  
Threshold  
Off threshold  
On threshold  
920  
820  
960  
860  
1000  
900  
PR  
mV  
T
Over-Temperature Shutdown Limit  
Soft Start Interval  
150  
2.2  
°C  
J
t
ms  
SS  
OUTPUT STAGE  
High-Side Switch On-Resistance  
V
V
= 12V  
= 5V  
97  
166  
130  
200  
IN  
IN  
mΩ  
Note:  
3. Specification in BOLD indicate an ambient temperature range of -40°C to +85°C. These specifications are guaranteed by design.  
Rev. 1.2 September 2007  
www.aosmd.com  
Page 4 of 15  
AOZ1015  
Typical Performance Characteristics  
Circuit of Figure 1. T = 25°C, V = V = 12V, V = 3.3V unless otherwise specified.  
OUT  
A
IN  
EN  
Light Load (DCM) Operation  
Full Load (CCM) Operation  
Vin  
Vin  
ripple  
0.1V/div  
ripple  
0.1V/div  
Vo  
Vo  
ripple  
20mV/div  
ripple  
20mV/div  
IL  
IL  
1A/div  
1A/div  
VLX  
VLX  
10V/div  
10V/div  
1µs/div  
1µs/div  
Startup to Full Load  
Full Load to Turnoff  
Vin  
10V/div  
Vin  
10V/div  
Vo  
1V/div  
Vo  
Iin  
1V/div  
0.5A/div  
Iin  
0.5A/div  
400µs/div  
400µs/div  
50% to 100% Load Transient  
Light Load to Turnoff  
Vo  
Ripple  
50mV/div  
Vin  
5V/div  
Vo  
1V/div  
Io  
1A/div  
Iin  
0.5A/div  
100µs/div  
1s/div  
Rev. 1.2 September 2007  
www.aosmd.com  
Page 5 of 15  
AOZ1015  
Typical Performance Characteristics (Continued)  
Circuit of Figure 1. T = 25°C, V = V = 12V, V = 3.3V unless otherwise specified.  
OUT  
A
IN  
EN  
Short Circuit Protection  
Short Circuit Recovery  
Vo  
2V/div  
Vo  
2V/div  
IL  
1A/div  
IL  
1A/div  
100µs/div  
1ms/div  
AOZ1015AI Efficiency  
Efficiency (V = 12V) vs. Load Current  
IN  
100  
95  
8.0V OUTPUT  
5.0V OUTPUT  
90  
85  
80  
75  
70  
65  
3.3V OUTPUT  
0
0.2  
0.4  
0.6  
0.8  
1.0  
1.2  
1.4  
1.6  
Load Current (A)  
Thermal de-rating curves for SO-8 package part under typical input and output condition based on the evaluation board.  
25°C ambient temperature and natural convection (air speed < 50LFM) unless otherwise specified.  
Derating Curves at 5V Input  
Derating Curves at 12V Input  
2.0  
1.8  
1.6  
1.4  
1.2  
1.0  
0.8  
0.6  
0.4  
0.2  
0
2.0  
1.8  
1.6  
1.4  
1.2  
1.0  
0.8  
0.6  
0.4  
0.2  
0
3.3V, 5.0V Output  
1.8V Output  
3.3V, 5.0V, 8.0 Output  
1.8V Output  
25  
35  
45  
55  
65  
75  
85  
25  
35  
45  
55  
65  
75  
85  
Ambient Temperature (T )  
Ambient Temperature (T )  
A
A
Rev. 1.2 September 2007  
www.aosmd.com  
Page 6 of 15  
AOZ1015  
Detailed Description  
The AOZ1015 is a current-mode step down regulator with  
integrated high side PMOS switch and a low side free-  
wheeling Schottky diode. It operates from a 4.5V to 16V  
input voltage range and supplies up to 1.5A of load  
current.The duty cycle can be adjusted from 6% to 100%  
allowing a wide range of output voltages. Features  
include; enable control, Power-On Reset, input under  
voltage lockout, fixed internal soft-start and thermal shut  
down.  
The AOZ1015 uses a P-Channel MOSFET as the high  
side switch. It saves the bootstrap capacitor normally  
seen in a circuit which is using an NMOS switch. It allows  
100% turn-on of the upper switch to achieve linear regu-  
lation mode of operation.The minimum voltage drop from  
V
to V is the load current X DC resistance of MOSFET  
IN  
O
+ DC resistance of the buck inductor. It can be calculated  
by equation below:  
V
= V I × (R  
+ R  
)
inductor  
O_MAX  
IN  
O
DS(ON)  
The AOZ1015 is available in an SO-8 package.  
where;  
Enable and Soft Start  
V
V
is the maximum output voltage,  
O_MAX  
The AOZ1015 has an internal soft start feature to limit  
in-rush current and ensure the output voltage ramps  
up smoothly to regulation voltage. A soft start process  
begins when the input voltage rises to 4.0V and voltage  
on EN pin is HIGH. In the soft start process, the output  
voltage is typically ramped to regulation voltage in 2.2ms.  
The 2.2ms soft start time is set internally.  
is the input voltage from 4.5V to 16V,  
IN  
I
is the output current from 0A to 1.5A,  
O
R
is the on resistance of the internal MOSFET, the value  
DS(ON)  
is between 97mand 200mdepending on input voltage and  
junction temperature, and  
R
is the inductor DC resistance.  
inductor  
The EN pin of the AOZ1015 is active HIGH. Connect the  
Switching Frequency  
EN pin to V if the enable function is not used. Pulling  
IN  
The AOZ1015 switching frequency is fixed and set by an  
internal oscillator. The actual switching frequency could  
range from 400kHz to 600kHz due to device variation.  
EN to ground will disable the AOZ1015. Do not leave it  
open. The voltage on the EN pin must be above 2.0V to  
enable the AOZ1015. When voltage on EN falls below  
0.6V, the AOZ1015 is disabled. If an application circuit  
requires the AOZ1015 to be disabled, an open drain or  
open collector circuit should be used to interface to EN  
pin.  
Output Voltage Programming  
Output voltage can be set by feeding back the output to  
the FB pin with a resistor divider network. In the  
application circuit shown in Figure 1. The resistor divider  
Steady-State Operation  
network includes R and R . Usually, a design is started  
2
3
by picking a fixed R value and calculating the required  
Under steady-state conditions, the converter operates  
in fixed frequency and Continuous-Conduction Mode  
(CCM).  
3
R with equation below.  
2
R
2
V
= 0.8 × 1 +  
------  
The AOZ1015 integrates an internal P-MOSFET as the  
high-side switch. Inductor current is sensed by amplifying  
the voltage drop across the drain to source of the high  
side power MOSFET. Output voltage is divided down by  
the external voltage divider at the FB pin. The difference  
of the FB pin voltage and reference is amplified by the  
internal transconductance error amplifier. The error  
voltage, which shows on the COMP pin, is compared  
against the current signal, which is the sum of inductor  
current signal and ramp compensation signal, at PWM  
comparator input. If the current signal is less than the  
error voltage, the internal high-side switch is on. The  
inductor current flows from the input through the inductor  
to the output. When the current signal exceeds the error  
voltage, the high-side switch is off. The inductor current  
is freewheeling through the internal Schottky diode to  
output.  
O
R
3
Some standard values of R , R for most commonly used  
2
3
output voltage values are listed in Table 1.  
Table 1.  
V (V)  
R (k)  
R (k)  
O
2
3
0.8  
1.2  
1.5  
1.8  
2.5  
3.3  
5.0  
1.0  
4.99  
10  
Open  
10  
11.5  
10.2  
10  
12.7  
21.5  
31.6  
52.3  
10  
10  
Rev. 1.2 September 2007  
www.aosmd.com  
Page 7 of 15  
AOZ1015  
The combination of R and R should be large enough to  
Power-On Reset (POR)  
2
3
avoid drawing excessive current from the output, which  
will cause power loss.  
A power-on reset circuit monitors the input voltage.  
When the input voltage exceeds 4V, the converter starts  
operation. When input voltage falls below 3.7V, the  
converter will stop switching.  
Since the switch duty cycle can be as high as 100%, the  
maximum output voltage can be set as high as the input  
voltage minus the voltage drop on upper PMOS and  
inductor.  
Thermal Protection  
An internal temperature sensor monitors the junction  
temperature. It shuts down the internal control circuit and  
high side PMOS if the junction temperature exceeds  
150°C.  
Protection Features  
The AOZ1015 has multiple protection features to prevent  
system circuit damage under abnormal conditions.  
Application Information  
Over Current Protection (OCP)  
The basic AOZ1015 application circuit is shown in  
Figure 1. Component selection is explained below.  
The sensed inductor current signal is also used for  
over current protection. Since the AOZ1015 employs  
peak current mode control, the COMP pin voltage is  
proportional to the peak inductor current. The COMP pin  
voltage is limited to be between 0.4V and 2.5V internally.  
The peak inductor current is automatically limited cycle  
by cycle.  
Input Capacitor  
The input capacitor (C in Figure 1) must be connected  
1
to the V pin and PGND pin of the AOZ1015 to maintain  
IN  
steady input voltage and filter out the pulsing input  
current. A small decoupling capacitor (C in Figure 1),  
d
The cycle by cycle current limit threshold is set between  
2.0A and 3.6A. When the load current reaches the  
current limit threshold, the cycle by cycle current limit  
circuit turns off the high side switch immediately to  
terminate the current duty cycle. The inductor current  
stop rising. The cycle by cycle current limit protection  
directly limits inductor peak current.The average inductor  
current is also limited due to the limitation on peak  
inductor current. When cycle by cycle current limit circuit  
is triggered, the output voltage drops as the duty cycle  
decreases.  
usually 1µF, should be connected to the V pin and  
IN  
AGND pin for stable operation of the AOZ1015. The  
voltage rating of input capacitor must be greater than  
maximum input voltage plus ripple voltage.  
The input ripple voltage can be approximated by equation  
below:  
I
V
V
O
O
O
V  
=
× 1 –  
×
------------------  
----------  
----------  
IN  
f × C  
V
V
IN  
IN  
IN  
Since the input current is discontinuous in a buck  
converter, the current stress on the input capacitor is  
another concern when selecting the capacitor. For a buck  
circuit, the RMS value of input capacitor current can be  
calculated by:  
The AOZ1015 has internal short circuit protection to  
protect itself from catastrophic failure under output short  
circuit conditions. The FB pin voltage is proportional to  
the output voltage. Whenever FB pin voltage is below  
0.2V, the short circuit protection circuit is triggered.  
As a result, the converter is shut down and hiccups at  
a frequency equal to 1/8 of normal switching frequency.  
The converter will start up via a soft start once the short  
circuit condition is resolved. In short circuit protection  
mode, the inductor average current is greatly reduced  
because of the low hiccup frequency.  
V
V
O
O
I
= I  
×
O
1 –  
----------  
----------  
CIN_RMS  
V
V
IN  
IN  
If let m equal the conversion ratio:  
V
O
= m  
----------  
V
Output Over Voltage Protection (OVP)  
IN  
The AOZ1015 monitors the feedback voltage. When the  
feedback voltage is higher than 960mV, it immediately  
turns-off the PMOS to protect the output voltage  
overshoot at fault condition. When feedback voltage is  
lower than 860mV, the PMOS is allowed to turn on in  
the next cycle.  
The relationship between the input capacitor RMS current  
and voltage conversion ratio is calculated and shown in  
Figure 2. It can be seen that when V is half of V , C is  
O
IN  
IN  
under the worst current stress. The worst current stress  
on C is 0.5 x I .  
IN  
O
Rev. 1.2 September 2007  
www.aosmd.com  
Page 8 of 15  
AOZ1015  
The inductor takes the highest current in a buck circuit.  
The conduction loss on inductor needs to be checked for  
thermal and efficiency requirements.  
0.5  
0.4  
0.3  
0.2  
0.1  
0
Surface mount inductors in different shape and styles are  
available from Coilcraft, Elytone and Murata. Shielded  
inductors are small and radiate less EMI noise.They cost  
more than unshielded inductors. The choice depends on  
EMI requirement, price and size.  
ICIN_RMS(m)  
IO  
Output Capacitor  
The output capacitor is selected based on the DC output  
voltage rating, output ripple voltage specification and  
ripple current rating.  
0
0.5  
m
1
The selected output capacitor must have a higher rated  
voltage specification than the maximum desired output  
voltage including ripple. De-rating needs to be consid-  
ered for long term reliability.  
Figure 2. I  
vs. Voltage Conversion Ratio  
CIN  
For reliable operation and best performance, the input  
capacitors must have current rating higher than I  
CIN_RMS  
at the worst operating conditions. Ceramic capacitors are  
preferred for input capacitors because of their low  
ESR and high ripple current rating. Depending on the  
application circuits, other low ESR tantalum capacitors  
or aluminum electrolytic capacitors may also be used.  
When selecting ceramic capacitors, X5R or X7R type  
dielectric ceramic capacitors are preferred for their better  
temperature and voltage characteristics. Note that the  
ripple current rating from capacitor manufacturers is  
based on a certain device life time. Further de-rating may  
be necessary for practical design requirement.  
Output ripple voltage specification is another important  
factor for selecting the output capacitor. In a buck  
converter circuit, output ripple voltage is determined by  
inductor value, switching frequency, output capacitor  
value and ESR. It can be calculated by the equation  
below:  
1
V = I × ESR  
+
--------------------------  
O
L
CO  
8 × f × C  
O
where,  
C
is output capacitor value, and  
O
Inductor  
ESR is the equivalent series resistance of the output  
CO  
The inductor is used to supply constant current to output  
when it is driven by a switching voltage. For a given input  
and output voltage, inductance and switching frequency  
together decide the inductor ripple current, which is:  
capacitor.  
When a low ESR ceramic capacitor is used as an output  
capacitor, the impedance of the capacitor at the switching  
frequency dominates. Output ripple is primarily caused  
by capacitor value and inductor ripple current.The output  
ripple voltage calculation can be simplified to:  
V
V
O
O
I  
=
× 1 –  
-----------  
f × L  
----------  
L
V
IN  
1
V = I ×  
--------------------------  
The peak inductor current is:  
O
L
8 × f × C  
O
I  
L
If the impedance of ESR at switching frequency  
I
= I  
+
O
--------  
Lpeak  
2
dominates, the output ripple voltage is primarily decided  
by capacitor ESR and inductor ripple current. The output  
ripple voltage calculation can be further simplified to:  
High inductance gives low inductor ripple current but  
requires a larger size inductor to avoid saturation. Low  
ripple current reduces inductor core losses. It also  
reduces RMS current through the inductor and switches,  
which results in less conduction loss. Usually, peak to  
peak ripple current on inductor is designed to be 20%  
to 30% of output current.  
V = I × ESR  
CO  
O
L
For lower output ripple voltage across the entire  
operating temperature range, X5R or X7R dielectric  
type of ceramic, or other low ESR tantalum are  
recommended to be used as output capacitors.  
When selecting the inductor, make sure it is able to  
handle the peak current without saturation even at the  
highest operating temperature.  
Rev. 1.2 September 2007  
www.aosmd.com  
Page 9 of 15  
AOZ1015  
where;  
is the error amplifier transconductance, which is 200 x 10  
A/V,  
In a buck converter, output capacitor current is continuous.  
The RMS current of the output capacitor is decided by  
the peak to peak inductor ripple current. It can be  
calculated by:  
-6  
G
EA  
G
is the error amplifier voltage gain, which is 500 V/V, and  
VEA  
I  
L
C is compensation capacitor.  
C
I
=
----------  
CO_RMS  
12  
The zero given by the external compensation network,  
capacitor C (C in Figure 1) and resistor R (R in  
Figure 1), is located at:  
C
5
C
1
Usually, the ripple current rating of the output capacitor  
is a smaller issue because of the low current stress.  
When the buck inductor is selected to be very small and  
inductor ripple current is high, the output capacitor could  
be overstressed.  
1
f
=
------------------------------------  
Z 2  
2π × C × R  
C
C
To design the compensation circuit, a target crossover  
Loop Compensation  
frequency f for close loop must be selected. The  
C
The AOZ1015 employs peak current mode control for  
easy use and fast transient response. Peak current mode  
control eliminates the double pole effect of the output  
L&C filter. It greatly simplifies the compensation loop  
design.  
system crossover frequency is where the control loop has  
unity gain. The crossover frequency is also called the  
converter bandwidth. Generally, a higher bandwidth  
means faster response to load transient. However,  
the bandwidth should not be too high due to system  
stability concern. When designing the compensation  
loop, converter stability under all line and load conditions  
must be considered.  
With peak current mode control, the buck power stage  
can be simplified to be a one-pole and one-zero system  
in frequency domain. The pole is the dominant pole and  
can be calculated by:  
Usually, it is recommended to set the bandwidth to be  
less than 1/10 of the switching frequency. The AOZ1015  
operates at a fixed switching frequency range from 40  
0kHz to 600kHz. It is recommended to choose a  
crossover frequency less than 50kHz.  
1
f
=
-----------------------------------  
P1  
2π ×  
×
R
C
O
L
The zero is a ESR zero due to output capacitor and its  
ESR. It is can be calculated by:  
f
= 50kHz  
C
1
f
=
-------------------------------------------------  
Z 1  
The strategy for choosing R and C is to set the cross  
C
C
2π × C × ESR  
O
CO  
over frequency with R and set the compensator zero  
C
with C . Using selected crossover frequency, f , to  
where;  
is the output filter capacitor,  
C
C
calculate R :  
C
C
O
R is load resistor value, and  
V
L
2π × C  
O
O
R
= f  
×
C
×
----------- -----------------------------  
C
ESR is the equivalent series resistance of output capacitor.  
CO  
V
G
EA  
× G  
FB  
CS  
The compensation design is actually to shape the  
converter close loop transfer function to get the desired  
gain and phase. Several different types of compensation  
networks can be used for the AOZ1015. In most cases, a  
series capacitor and resistor network connected to the  
COMP pin sets the pole-zero and is adequate for a stable  
high-bandwidth control loop.  
where;  
f is the desired crossover frequency,  
C
V
is 0.8V,  
FB  
-6  
G
is the error amplifier transconductance, which is 200 x 10  
EA  
A/V, and  
G
is the current sense circuit transconductance, which is  
CS  
The FB pin and the COMP pin are the inverting input  
and the output of the internal transconductance error  
amplifier. A series R and C compensation network  
connected to COMP provides one pole and one zero.  
The pole is:  
5.64 A/V.  
The compensation capacitor C and resistor R together  
make a zero. This zero is put somewhere close to the  
dominate pole f but lower than 1/5 of selected  
C
C
p1  
crossover frequency. C can is selected by:  
C
G
EA  
f
=
-------------------------------------------  
P2  
1.5  
2π × C × G  
C
VEA  
C
=
-------------------------------------  
C
2π × R × f  
C
P1  
Rev. 1.2 September 2007  
www.aosmd.com  
Page 10 of 15  
AOZ1015  
The previous equation above can also be simplified to:  
The maximum junction temperature of the AOZ1015 is  
150°C, which limits the maximum load current capability.  
Please see the thermal de-rating curves for the maximum  
load current of the AOZ1015 under different ambient  
temperatures.  
C
× R  
L
O
C
=
----------------------  
C
R
C
An easy-to-use application software which helps to  
design and simulate the compensation loop can be found  
at www.aosmd.com.  
The thermal performance of the AOZ1015 is strongly  
affected by the PCB layout. Extra care should be taken  
by users during the design process to ensure that the IC  
will operate under the recommended environmental  
conditions.  
Thermal Management and Layout  
Consideration  
Several layout tips are listed below for the best electronic  
and thermal performance. Figure 3 illustrates a single  
layer PCB layout example as reference.  
In the AOZ1015 buck regulator circuit, high pulsing  
current flows through two circuit loops. The first loop  
starts from the input capacitors, to the V pin, to the  
IN  
1. Do not use thermal relief connection to the V and  
IN  
LX pins, to the filter inductor, to the output capacitor  
and load, and then returns to the input capacitor through  
ground. Current flows in the first loop when the high side  
switch is on. The second loop starts from inductor, to the  
output capacitors and load, to the PGND pin of the  
AOZ1015, to the LX pins of the AOZ1015. Current flows  
in the second loop when the low side diode is on.  
the PGND pins. Pour a maximized copper area to the  
PGND pin and the V pin to help thermal dissipation.  
IN  
2. The input capacitors should be connected as close  
as possible to the V and PGND pins.  
IN  
3. A ground plane is preferred. If a ground plane is not  
used, separate PGND from AGND and connect  
them only at one point to avoid the PGND pin noise  
coupling to the AGND pin. In this case, a decoupling  
In PCB layout, minimizing the two loops area reduces the  
noise of this circuit and improves efficiency. A ground  
plane is recommended to connect input capacitor, output  
capacitor, and PGND pin of the AOZ1015.  
capacitor should be connected between V and  
IN  
AGND.  
4. Make the current trace from LX pins to L to C to the  
In the AOZ1015 buck regulator circuit, the two major  
power dissipating components are the AOZ1015 and  
the output inductor. The total power dissipation of  
converter circuit can be measured by input power minus  
output power.  
O
PGND as short as possible.  
5. Pour copper plane on all unused board area and  
connect it to stable DC nodes, like V , GND or V  
.
IN  
OUT  
6. The two LX pins are connected to the internal PFET  
drain. They are low resistance thermal conduction  
path and a noisy switching node. Connecting a  
copper plane to the LX pin to help thermal dissipa-  
tion. This copper plane should not be too large  
otherwise switching noise may be coupled to other  
parts of the circuit.  
P
= V × I V × I  
IN IN O O  
total_loss  
The power dissipation of the inductor can be approxi-  
mately calculated by output current and DCR of inductor.  
2
P
= I × R  
× 1.1  
inductor  
inductor _loss  
O
7. Keep sensitive signal traces such as trace  
connecting FB and COMP away from the LX pins.  
The actual AOZ1015 junction temperature can be  
calculated with power dissipation in the AOZ1015 and  
thermal impedance from junction to ambient.  
T
= (P  
P  
) × Θ  
inductor _loss  
junction  
total_loss  
+ T  
ambient  
Rev. 1.2 September 2007  
www.aosmd.com  
Page 11 of 15  
AOZ1015  
Cout  
LX  
LX  
PGND  
VIN  
1
2
3
4
8
7
6
5
Cin  
SO-8  
L
Cd  
AGND  
FB  
EN  
R3  
R2  
COMP  
R1  
C5  
Figure 3. AOZ1015 PCB Layout  
Rev. 1.2 September 2007  
www.aosmd.com  
Page 12 of 15  
AOZ1015  
Package Dimensions, SO-8L  
D
Gauge Plane  
Seating Plane  
0.25  
e
8
L
E
E1  
h x 45°  
1
C
θ
7° (4x)  
A2  
A
0.1  
A1  
b
Dimensions in millimeters  
Dimensions in inches  
Symbols Min. Nom. Max.  
Symbols Min.  
Nom. Max.  
0.053 0.065 0.069  
0.004 0.010  
0.049 0.059 0.065  
2.20  
A
A1  
A2  
b
1.35  
0.10  
1.25  
0.31  
0.17  
4.80  
3.80  
1.65  
1.75  
0.25  
1.65  
0.51  
0.25  
5.00  
4.00  
A
A1  
A2  
b
1.50  
0.012  
0.007  
0.020  
0.010  
c
c
5.74  
D
E1  
e
4.90  
3.90  
1.27 BSC  
6.00  
D
E1  
e
0.189 0.193 0.197  
0.150 0.154 0.157  
0.050 BSC  
1.27  
E
5.80  
0.25  
0.40  
0°  
6.20  
0.50  
1.27  
8°  
E
0.228 0.236 0.244  
h
h
0.010  
0.016  
0°  
0.020  
0.050  
8°  
L
L
0.80  
θ
θ
Unit: mm  
Notes:  
1. All dimensions are in millimeters.  
2. Dimensions are inclusive of plating  
3. Package body sizes exclude mold flash and gate burrs. Mold flash at the non-lead sides should be less than 6 mils.  
4. Dimension L is measured in gauge plane.  
5. Controlling dimension is millimeter, converted inch dimensions are not necessarily exact.  
Rev. 1.2 September 2007  
www.aosmd.com  
Page 13 of 15  
AOZ1015  
Tape and Reel Dimensions  
SO-8 Carrier Tape  
P1  
P2  
See Note 3  
D1  
T
See Note 5  
E1  
E2  
E
See Note 3  
B0  
K0  
D0  
P0  
A0  
Feeding Direction  
Unit: mm  
Package  
A0  
B0  
K0  
D0  
1.60  
D1  
E
E1  
E2  
P0  
P1  
P2  
T
SO-8  
6.40  
5.20  
2.10  
1.50  
12.00 1.75  
5.50  
8.00  
4.00  
2.00  
0.25  
(12mm) ±0.10 ±0.10 ±0.10 ±0.10 ±0.10 ±0.10 ±0.10 ±0.10 ±0.10 ±0.10 ±0.10 ±0.10  
SO-8 Reel  
W1  
S
G
V
N
K
M
R
H
W
Tape Size Reel Size  
M
N
W
W1  
ø330.00 ø97.00 13.00 17.40  
H
K
S
G
R
V
ø13.00  
10.60  
2.00  
12mm  
ø330  
±0.50  
±0.10 ±0.30 ±1.00  
+0.50/-0.20  
±0.50  
SO-8 Tape  
Leader/Trailer  
& Orientation  
Trailer Tape  
300mm min. or  
75 empty pockets  
Components Tape  
Orientation in Pocket  
Leader Tape  
500mm min. or  
125 empty pockets  
Rev. 1.2 September 2007  
www.aosmd.com  
Page 14 of 15  
AOZ1015  
AOZ1015 Package Marking  
Z1015AL  
FAYWLT  
Part Number Code  
Assembly Lot Code  
Fab & Assembly Location  
Year & Week Code  
This datasheet contains preliminary data; supplementary data may be published at a later date.  
Alpha & Omega Semiconductor reserves the right to make changes at any time without notice.  
LIFE SUPPORT POLICY  
ALPHA & OMEGA SEMICONDUCTOR PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL  
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS.  
As used herein:  
1. Life support devices or systems are devices or  
systems which, (a) are intended for surgical implant into  
the body or (b) support or sustain life, and (c) whose  
failure to perform when properly used in accordance  
with instructions for use provided in the labeling, can be  
reasonably expected to result in a significant injury of  
the user.  
2. A critical component in any component of a life  
support, device, or system whose failure to perform can  
be reasonably expected to cause the failure of the life  
support device or system, or to affect its safety or  
effectiveness.  
Rev. 1.2 September 2007  
www.aosmd.com  
Page 15 of 15  

相关型号:

AOZ1016

EZBuck⑩ 2A Simple Buck Regulator
AOS

AOZ1016AI

EZBuck⑩ 2A Simple Buck Regulator
AOS

AOZ1016AIL

Switching Regulator, Current-mode, 3.6A, 600kHz Switching Freq-Max, PDSO8, GREEN, SOP-8
AOS

AOZ1017

EZBuck⑩ 3A Simple Regulator
AOS

AOZ1017-EVA

EZBuck™ 3A Simple Buck Regulator Evaluation Board Note
AOS

AOZ1017AI

EZBuck⑩ 3A Simple Regulator
AOS

AOZ1017AIL

Switching Regulator/Controller
AOS

AOZ1017DI

EZBuck™ 3A Simple Regulator
AOS

AOZ1018

EZBuck⑩ 2A Simple Regulator
AOS

AOZ1018AI

EZBuck⑩ 2A Simple Regulator
AOS

AOZ1019

EZBuck⑩ 2A Simple Regulator
AOS

AOZ1019-EVA

EZBuck⑩ 2A Simple Buck Regulator Evaluation Board Note
AOS