AOZ1017DI [AOS]
EZBuck⢠3A Simple Regulator; EZBuckâ ?? ¢ 3A简单的稳压器
| 型号： | AOZ1017DI |
| 厂家： | 
ALPHA & OMEGA SEMICONDUCTORS |
| 描述： | EZBuck⢠3A Simple Regulator |
| 文件： | 总16页 (文件大小：517K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
AOZ1017D
EZBuck™ 3A Simple Regulator
General Description
Features
The AOZ1017D is a high efficiency, simple to use, 3A
buck regulator. The AOZ1017D works from a 4.5V to 16V
input voltage range, and provides up to 3A of continuous
output current with an output voltage adjustable down to
0.8V.
● 4.5V to 16V operating input voltage range
● 50mΩ internal PFET switch for high efficiency:
up to 95%
● Internal soft start
● Output voltage adjustable to 0.8V
● 3A continuous output current
● Fixed 500kHz PWM operation
● Cycle-by-cycle current limit
● Short-circuit protection
The AOZ1017D comes in a 5x4 DFN-8 package and is
rated over a -40°C to +85°C ambient temperature range.
● Output over voltage protection
● Thermal shutdown
● Small size 5x4 DFN-8 package
Applications
● Point of load DC/DC conversion
● PCIe graphics cards
● Set top boxes
● DVD drives and HDD
● LCD panels
● Cable modems
● Telecom/Networking/Datacom equipment
Typical Application
VIN
C1
22µF Ceramic
VIN
L1
VOUT
4.7µH
U1
3.3V
From µPC
EN
LX
FB
AOZ1017D
R1
R2
COMP
C2, C3
R
C
22µF Ceramic
C5
D1
C
C
AGND
GND
Figure 1. 3.3V/3A Buck Regulator
Rev. 1.1 April 2009
www.aosmd.com
Page 1 of 16
AOZ1017D
Ordering Information
Part Number
Ambient Temperature Range
-40°C to +85°C
Package
Environmental
AOZ1017DI
RoHS
5x4 DFN-8
AOZ1017DIL
Green Product
AOS Green Products use reduced levels of Halogens, and are also RoHS compliant.
Please visit www.aosmd.com/web/quality/rohs_compliant.jsp for additional information.
Pin Configuration
1
2
3
4
8
7
6
5
VIN
PGND
AGND
FB
LX
LX
LX
EN
AGND
COMP
5x4 DFN
(Top View)
Pin Description
Pin
Number
Pin Name
Pin Function
1
2
3
VIN
Supply voltage input. When VIN rises above the UVLO threshold the device starts up.
Power ground. Electrically needs to be connected to AGND.
PGND
AGND
Reference connection for controller section. Also used as thermal connection for controller
section. Electrically needs to be connected to PGND.
4
FB
The FB pin is used to determine the output voltage via a resistor divider between the output and
GND.
5
6
COMP
EN
External loop compensation pin.
The enable pin is active HIGH. Connect EN pin to VIN if not used. Do not leave the EN pin floating.
PWM output connection to inductor. Thermal connection for output stage.
7, 8
LX
Rev. 1.1 April 2009
www.aosmd.com
Page 2 of 16
AOZ1017D
Block Diagram
VIN
Internal
+5V
UVLO
& POR
5V LDO
Regulator
OTP
EN
+
ISen
–
Reference
& Bias
Softstart
Q1
ILimit
+
–
+
Level
Shifter
+
FET
Driver
+
–
PWM
Control
Logic
0.8V
PWM
Comp
EAmp
FB
LX
COMP
500kHz/63kHz
Oscillator
Frequency
Foldback
Comparator
+
–
0.2V
Frequency
Foldback
Comparator
+
–
0.96V
AGND
PGND
Rev. 1.1 April 2009
www.aosmd.com
Page 3 of 16
AOZ1017D
Absolute Maximum Ratings
Exceeding the Absolute Maximum ratings may damage the
device.
Recommend Operating Ratings
The device is not guaranteed to operate beyond the Maximum
Operating Ratings.
Parameter
Supply Voltage (VIN)
Rating
Parameter
Rating
4.5V to 16V
0.8V to VIN
Supply Voltage (VIN)
LX to AGND
18V
Output Voltage Range
-0.7V to VIN+0.3V
-0.3V to VIN+0.3V
-0.3V to 6V
Ambient Temperature (TA)
-40°C to +85°C
EN to AGND
(2)
Package Thermal Resistance (ΘJA
5x4 DFN-8
)
FB to AGND
50°C/W
30°C/W
COMP to AGND
PGND to AGND
-0.3V to 6V
Package Thermal Resistance (ΘJC
)
5x4 DFN-8
-0.3V to +0.3V
+150°C
Package Power Dissipation (PD)
@ 25°C Ambient
Junction Temperature (TJ)
Storage Temperature (TS)
-65°C to +150°C
5x4 DFN-8
1.15W
Note:
2
1. The value of Θ is measured with the device mounted on 1-in FR-4
JA
board with 2oz. Copper, in a still air environment with T = 25°C. The
A
value in any given application depends on the user's specific board
design.
Electrical Characteristics
)
TA = 25°C, VIN = VEN = 12V, VOUT = 3.3V unless otherwise specified(2
Symbol
Parameter
Supply Voltage
Conditions
Min.
4.5
Typ. Max. Units
VIN
16
V
VUVLO
Input Under-Voltage Lockout Threshold
VIN Rising
VIN Falling
4.00
3.70
V
IIN
Supply Current (Quiescent)
Shutdown Supply Current
Feedback Voltage
IOUT = 0, VFB = 1.2V, VEN >1.2V
VEN = 0V
2
3
mA
µA
V
IOFF
VFB
1
10
0.782
0.8
0.5
0.5
0.818
Load Regulation
%
Line Regulation
%
IFB
Feedback Voltage Input Current
EN Input threshold
200
nA
VEN
Off Threshold
On Threshold
0.6
V
2.0
VHYS
EN Input Hysteresis
100
mV
MODULATOR
fO
Frequency
400
100
500
600
6
kHz
%
DMAX
DMIN
Maximum Duty Cycle
Minimum Duty Cycle
%
Error Amplifier Voltage Gain
Error Amplifier Transconductance
500
200
V/ V
µA/V
PROTECTION
ILIM
Current Limit
4
5
A
VPR
Over-Voltage Protection Threshold
Off Threshold
On Threshold
960
840
mV
TJ
Over-Temperature Shutdown Limit
Soft Start Interval
150
2.2
°C
tSS
ms
OUTPUT STAGE
High-Side Switch On-Resistance
V
V
IN = 12V
IN = 5V
40
65
50
85
mΩ
Note:
2. Specification in BOLD indicate an ambient temperature range of -40°C to +85°C. These specifications are guaranteed by design.
Rev. 1.1 April 2009
www.aosmd.com
Page 4 of 16
AOZ1017D
Typical Performance Characteristics
Circuit of Figure 1. TA = 25°C, VIN = VEN = 12V, VOUT = 3.3V unless otherwise specified.
Light Load (DCM) Operation
Full Load (CCM) Operation
Vin ripple
50mV/div
Vin ripple
0.1V/div
Vo ripple
50mV/div
Vo ripple
50mV/div
IL
IL
2A/div
2A/div
IL
IL
10V/div
10V/div
1μs/div
1μs/div
Startup to Full Load
Full Load to Turnoff
Vin
Vin
5V/div
5V/div
Vo
Vo
2V/div
1V/div
lin
lin
1A/div
1A/div
400μs/div
1ms/div
50% to 100% Load Transient
No Load to Turnoff
Vin
5V/div
Vo Ripple
0.1V/div
Vo
1V/div
lo
2A/div
lin
1A/div
100μs/div
1s/div
Rev. 1.1 April 2009
www.aosmd.com
Page 5 of 16
AOZ1017D
Typical Performance Characteristics (Continued)
Circuit of Figure 1. TA = 25°C, VIN = VEN = 12V, VOUT = 3.3V unless otherwise specified.
Short Circuit Protection
Short Circuit Recovery
Vo
Vo
2V/div
2V/div
IL
IL
2A/div
2A/div
100μs/div
1ms/div
Efficiency (VIN = 12V) vs. Load Current
100
95
90
85
80
75
8.0V OUTPUT
5.0V OUTPUT
3.3V OUTPUT
0
0.5
1.0
1.5
2.0
2.5
3.0
Load Current (A)
Thermal de-rating curves for SO-8 package part under typical input and output condition based on the evaluation board.
Circuit of Figure 1. 25°C ambient temperature and natural convection (air speed < 50LFM) unless otherwise specified.
Derating Curve at 5V Input
Derating Curve at 12V Input
3.5
3.0
2.5
2.0
1.5
1.0
0
3.5
3.0
2.5
2.0
1.5
1.0
0
1.8V, 5V, 8V OUTPUT
3.3V OUTPUT
1.8V, 3.3V, 5V OUTPUT
25
35
45
55
65
75
85
25
35
45
55
65
75
85
Ambient Temperature (T )
Ambient Temperature (T )
A
A
Rev. 1.1 April 2009
www.aosmd.com
Page 6 of 16
AOZ1017D
Detailed Description
The AOZ1017D is a current-mode step down regulator
with integrated high side PMOS switch. It operates from
a 4.5V to 16V input voltage range and supplies up to 3A
of load current. The duty cycle can be adjusted from 6%
to 100% allowing a wide range of output voltage. Fea-
tures include Enable Control, Power-On Reset, Input
Under Voltage Lockout, Fixed Internal Soft-Start and
Thermal Shut Down.
The AOZ1017D uses a P-Channel MOSFET as the high
side switch. It saves the bootstrap capacitor normally
seen in a circuit which is using an NMOS switch. It allows
100% turn-on of the upper switch to achieve linear
regulation mode of operation. The minimum voltage drop
from V to V is the load current x DC resistance of
IN
O
MOSFET + DC resistance of buck inductor. It can be
calculated by equation below:
The AOZ1017D is available in 5x4 DFN-8 package.
V
= V – I × (R
+ R
)
inductor
O_MAX
where;
VO_MAX is the maximum output voltage,
IN
O
DS(ON)
Enable and Soft Start
The AOZ1017D has internal soft start feature to limit
in-rush current and ensure the output voltage ramps up
smoothly to regulation voltage. A soft start process
begins when the input voltage rises to 4.0V and voltage
on EN pin is HIGH. In the soft start process, the output
voltage is typically ramped to regulation voltage in 2.2ms.
The 2.2ms soft start time is set internally.
VIN is the input voltage from 4.5V to 16V,
IO is the output current from 0A to 3A,
RDS(ON) is the on resistance of internal MOSFET, the value is
between 40mΩ and 70mΩ depending on input voltage and
junction temperature, and
Rinductor is the inductor DC resistance.
The EN pin of the AOZ1017D is active HIGH. Connect
the EN pin to V if enable function is not used. Pulling
IN
Switching Frequency
EN to ground will disable the AOZ1017D. Do not leave it
open. The voltage on EN pin must be above 2.0 V to
enable the AOZ1017D. When voltage on EN pin falls
below 0.6V, the AOZ1017D is disabled. If an application
circuit requires the AOZ1017D to be disabled, an open
drain or open collector circuit should be used to interface
to the EN pin.
The AOZ1017D switching frequency is fixed and set by
an internal oscillator. The practical switching frequency
could range from 400kHz to 600kHz due to device
variation.
Output Voltage Programming
Output voltage can be set by feeding back the output to
the FB pin with a resistor divider network. In the applica-
tion circuit shown in Figure 1. The resistor divider net-
Steady-State Operation
Under steady-state conditions, the converter operates in
fixed frequency and Continuous-Conduction Mode
(CCM).
work includes R and R . Usually, a design is started by
1
2
picking a fixed R value and calculating the required R
2
1
with equation below.
The AOZ1017D integrates an internal P-MOSFET as the
high-side switch. Inductor current is sensed by amplifying
the voltage drop across the drain to source of the high
side power MOSFET. Output voltage is divided down by
the external voltage divider at the FB pin. The difference
of the FB pin voltage and reference is amplified by the
internal transconductance error amplifier. The error
voltage, which shows on the COMP pin, is compared
against the current signal, which is the sum of inductor
current signal and ramp compensation signal, at PWM
comparator input. If the current signal is less than the
error voltage, the internal high-side switch is on. The
inductor current flows from the input through the inductor
to the output. When the current signal exceeds the error
voltage, the high-side switch is off. The inductor current
is freewheeling through the external Schottky diode to
output.
R
⎛
⎞
⎟
⎠
1
------
V
= 0.8 × 1 +
⎜
O
R
⎝
2
Some standard values of R and R for most commonly
used output voltage values are listed in Table 1.
1
2
Table 1.
V (V)
R (kΩ)
R (kΩ)
O
1
2
0.8
1.2
1.5
1.8
2.5
3.3
5.0
1.0
4.99
10
open
10
11.5
10.2
10
12.7
21.5
31.6
52.3
10
10
Rev. 1.1 April 2009
www.aosmd.com
Page 7 of 16
AOZ1017D
The combination of R and R should be large enough to
Output Over Voltage Protection (OVP)
1
2
avoid drawing excessive current from the output, which
will cause power loss.
The AOZ1017D monitors the feedback voltage: when the
feedback voltage is higher than 960mV, it immediately
turns off the PMOS to protect the output voltage
overshoot at fault condition. When feedback voltage is
lower than 840mV, the PMOS is allowed to turn on in
the next cycle.
Since the switch duty cycle can be as high as 100%, the
maximum output voltage can be set as high as the input
voltage minus the voltage drop on upper PMOS and
inductor.
Thermal Protection
Protection Features
The AOZ1017D has multiple protection features to pre-
vent system circuit damage under abnormal conditions.
An internal temperature sensor monitors the junction
temperature. It shuts down the internal control circuit and
high side PMOS if the junction temperature exceeds
150°C.
Over Current Protection (OCP)
The sensed inductor current signal is also used for over
current protection. Since the AOZ1017D employs peak
current mode control, the COMP pin voltage is propor-
tional to the peak inductor current. The COMP pin volt-
age is limited to be between 0.4V and 2.5V internally.
The peak inductor current is automatically limited cycle
by cycle.
Application Information
The basic AOZ1017D application circuit is shown in
Figure 1. Component selection is explained below.
Input Capacitor
The input capacitor must be connected to the V pin
IN
and PGND pin of the AOZ1017D to maintain steady input
voltage and filter out the pulsing input current. The
voltage rating of the input capacitor must be greater than
the maximum input voltage plus the ripple voltage.
The cycle by cycle current limit threshold is set between
4A and 5A. When the load current reaches the current
limit threshold, the cycle by cycle current limit circuit turns
off the high side switch immediately to terminate the
current duty cycle. The inductor current stop rising.
The cycle by cycle current limit protection directly limits
inductor peak current. The average inductor current is
also limited due to the limitation on peak inductor current.
When cycle by cycle current limit circuit is triggered, the
output voltage drops as the duty cycle is decreasing.
The input ripple voltage can be approximated by the
following equation:
I
V
V
O
⎛
⎞
⎟
⎠
O
O
-----------------
--------
--------
ΔV
=
× 1 –
×
⎜
IN
V
f × C
V
⎝
IN
IN
IN
Since the input current is discontinuous in a buck
converter, the current stress on the input capacitor is
another concern when selecting the capacitor. For a buck
circuit, the RMS value of input capacitor current can be
calculated by:
The AOZ1017D has internal short circuit protection to
protect itself from catastrophic failure under output short
circuit conditions. The FB pin voltage is proportional to
the output voltage. Whenever FB pin voltage is below
0.2V, the short circuit protection circuit is triggered.
As a result, the converter is shut down and hiccups at a
frequency equals to 1/8 of normal switching frequency.
The converter will start up via a soft start once the short
circuit condition is resolved. In short circuit protection
mode, the inductor average current is greatly reduced
because of the low hiccup frequency.
V
⎛
⎜
⎝
⎞
⎟
⎠
V
O
O
--------
--------
I
= I ×
1 –
CIN_RMS
O
V
V
IN
IN
if let m equal the conversion ratio:
V
O
--------
= m
V
IN
Power-On Reset (POR)
A power-on reset circuit monitors the input voltage. When
the input voltage exceeds 4V, the converter starts opera-
tion. When input voltage falls below 3.7V, the converter
will be shut down.
The relation between the input capacitor RMS current
and voltage conversion ratio is calculated and shown in
Figure 2 on the next page. It can be seen that when V is
O
half of V , C is under the worst current stress. The
IN
IN
worst current stress on C is 0.5 x I .
IN
O
Rev. 1.1 April 2009
www.aosmd.com
Page 8 of 16
AOZ1017D
Surface mount inductors in different shape and styles are
available from Coilcraft, Elytone and Murata. Shielded
inductors are small and radiate less EMI noise. But they
cost more than unshielded inductors. The choice
depends on EMI requirement, price and size.
0.5
0.4
0.3
0.2
0.1
0
ICIN_RMS(m)
IO
Table 2 lists some inductors for typical output voltage
design.
V
L1
Manufacturer
OUT
0
0.5
m
1
5.0V
Shielded, 6.8µH,
Coilcraft
MSS1278-682MLD
Figure 2. ICIN vs. Voltage Conversion Ratio
Shielded, 6.8µH
MSS1260-682MLD
Coilcraft
Coilcraft
Coilcraft
ELYTONE
ELYTONE
Coilcraft
Coilcraft
For reliable operation and best performance, the input
capacitors must have current rating higher than I
3.3V
Un-shielded, 4.7µH,
DO3316P-472MLD
CIN_RMS
at the worst operating conditions. Ceramic capacitors are
preferred for the input capacitors because of their low
ESR and high ripple current rating. Depending on the
application circuits, other low ESR tantalum capacitors or
aluminum electrolytic capacitors may be used. When
selecting ceramic capacitors, X5R or X7R type dielectric
ceramic capacitors are preferred for their better
temperature and voltage characteristics. Note that the
ripple current rating from capacitor manufactures are
based on certain usage lifetime. Further de-rating may be
necessary for practical design requirement.
Shielded, 4.7µH,
DO1260-472NXD
Shielded, 3.3µH,
ET553-3R3
1.8 V
Shielded, 2.2µH,
ET553-2R2
Unshielded, 3.3µH,
DO3316P-222MLD
Shielded, 2.2µH,
MSS1260-222NXD
Inductor
Output Capacitor
The inductor is used to supply constant current to output
when it is driven by a switching voltage. For given input
and output voltage, inductance and switching frequency
together decide the inductor ripple current, which is,
The output capacitor is selected based on the DC output
voltage rating, output ripple voltage specification and
ripple current rating.
The selected output capacitor must have a higher rated
voltage specification than the maximum desired output
voltage including ripple. De-rating needs to be consid-
ered for long term reliability.
V
V
O
⎛
⎞
⎟
⎠
O
----------
--------
ΔI
=
× 1 –
⎜
L
V
f × L
⎝
IN
The peak inductor current is:
Output ripple voltage specification is another important
factor for selecting the output capacitor. In a buck
converter circuit, output ripple voltage is determined by
inductor value, switching frequency, output capacitor
value and ESR. It can be calculated by the equation
below:
ΔI
L
--------
I
= I +
Lpeak
O
2
High inductance gives low inductor ripple current but
requires a larger size inductor to avoid saturation. Low
ripple current reduces inductor core losses. It also
reduces RMS current through inductor and switches,
which results in less conduction loss.
1
⎛
⎞
-------------------------
+
ΔV = ΔI × ESR
O
L
CO
⎝
⎠
8 × f × C
O
where;
When selecting the inductor, make sure it is able to
handle the peak current without saturation even at the
highest operating temperature.
CO is output capacitor value, and
ESRCO is the Equivalent Series Resistor of output capacitor.
The inductor takes the highest current in a buck circuit.
The conduction loss on inductor needs to be checked for
thermal and efficiency requirements.
Rev. 1.1 April 2009
www.aosmd.com
Page 9 of 16
AOZ1017D
When low ESR ceramic capacitor is used as output
capacitor, the impedance of the capacitor at the switch-
ing frequency dominates. Output ripple is mainly caused
by capacitor value and inductor ripple current. The output
ripple voltage calculation can be simplified to:
With peak current mode control, the buck power stage
can be simplified to be a one-pole and one-zero system
in frequency domain. The pole is dominant pole and can
be calculated by:
1
----------------------------------
f
=
p1
1
2π × C × R
-------------------------
ΔV = ΔI ×
O
L
O
L
8 × f × C
O
The zero is a ESR zero due to output capacitor and its
ESR. It is can be calculated by:
If the impedance of ESR at switching frequency domi-
nates, the output ripple voltage is mainly decided by
capacitor ESR and inductor ripple current. The output
ripple voltage calculation can be further simplified to:
1
------------------------------------------------
f
=
Z1
2π × C × ESR
O
CO
where;
ΔV = ΔI × ESR
CO
O
L
CO is the output filter capacitor,
For lower output ripple voltage across the entire
operating temperature range, an X5R or X7R dielectric
type of ceramic, or other low ESR tantalum capacitor
or aluminum electrolytic capacitor may also be used as
output capacitors.
RL is load resistor value, and
ESRCO is the equivalent series resistance of output capacitor.
The compensation design is actually to shape the con-
verter close loop transfer function to get the desired gain
and phase. Several different types of compensation net-
work can be used for the AOZ1017D. For most cases, a
series capacitor and resistor network connected to the
COMP pin sets the pole-zero and is adequate for a stable
high-bandwidth control loop.
In a buck converter, output capacitor current is continu-
ous. The RMS current of output capacitor is defined by
the peak to peak inductor ripple current. It can be
calculated by:
ΔI
L
----------
I
=
In the AOZ1017D, FB pin and COMP pin are the invert-
ing input and the output of internal transconductance
error amplifier. A series R and C compensation network
connected to COMP provides one pole and one zero.
The pole is:
CO_RMS
12
Usually, the ripple current rating of the output capacitor
is a smaller issue because of the low current stress.
When the buck inductor is selected to be very small and
inductor ripple current is high, the output capacitor could
be overstressed.
G
EA
------------------------------------------
f
=
p2
2π × C × G
C
VEA
where;
Schottky Diode Selection
GEA is the error amplifier transconductance, which is 200 x 10-6
A/V,
The external freewheeling diode supplies the current to
the inductor when the high side PMOS switch is off. To
reduce the losses due to the forward voltage drop and
recovery of diode, a Schottky diode is recommended.
The maximum reverse voltage rating of the chosen
Schottky diode should be greater than the maximum
input voltage, and the current rating should be greater
than the maximum load current.
GVEA is the error amplifier voltage gain, which is 500 V/V, and
CC is compensation capacitor.
The zero given by the external compensation network,
capacitor C and resistor R , is located at:
C
C
1
-----------------------------------
=
f
Z2
2π × C × R
Loop Compensation
C
C
The AOZ1017D employs peak current mode control for
easy use and fast transient response. Peak current mode
control eliminates the double pole effect of the output
L&C filter. It greatly simplifies the compensation loop
design.
To design the compensation circuit, a target crossover
frequency f for close loop must be selected. The system
C
crossover frequency is where control loop has unity gain.
The crossover frequency is also called the converter
bandwidth. Generally, a higher bandwidth means faster
response to load transient. However, the bandwidth
should not be too high because of system stability
Rev. 1.1 April 2009
www.aosmd.com
Page 10 of 16
AOZ1017D
concern. When designing the compensation loop,
converter stability under all line and load condition must
be considered.
Thermal Management and Layout
Consideration
In the AOZ1017D buck regulator circuit, high pulsing
current flows through two circuit loops. The first loop
Usually, it is recommended to set the bandwidth to be
less than 1/10 of the switching frequency. The
AOZ1017D operates at a fixed switching frequency
range from 400kHz to 600kHz. It is recommended to
choose a crossover frequency less than 50kHz.
starts from the input capacitors, to the V pin, to the LX
IN
pins, to the filter inductor, to the output capacitor and
load, and then returns to the input capacitor through
ground. Current flows in the first loop when the high side
switch is on. The second loop starts from inductor, to the
output capacitors and load, to the anode of Schottky
diode, to the cathode of Schottky diode. Current flows in
the second loop when the low side diode is on.
f
= 50kHz
C
The strategy for choosing R and C is to set the cross
C
C
over frequency with R and set the compensator zero
C
In the PCB layout, minimizing the two loops area reduces
the noise of this circuit and improves efficiency. A ground
plane is strongly recommended to connect the input
capacitor, output capacitor, and PGND pin of the
AOZ1017D.
with C . Using selected crossover frequency, f , to
C
C
calculate R :
C
V
2π × C
O
O
---------- -----------------------------
R
= f ×
×
C
C
V
G
× G
EA CS
FB
In the AOZ1017D buck regulator circuit, the major power
dissipating components are the AOZ1017D, the Schottky
diode and output inductor. The total power dissipation of
converter circuit can be measured by input power minus
output power.
where;
fC is desired crossover frequency,
VFB is 0.8V,
GEA is the error amplifier transconductance, which is 200x10-6
A/V, and
P
= V × I – V × I
IN IN O O
total_loss
GCS is the current sense circuit transconductance, which is
6.68 A/V.
The power dissipation in Schottky can be approximated
as:
The compensation capacitor C and resistor R together
C
C
P
= I × (1 – D) × V
O FW_Schottky
diode_loss
make a zero. This zero is put somewhere close to the
dominate pole f but lower than 1/5 of selected cross-
p1
where;
over frequency. C can is selected by:
C
VFW_Schottky is the Schottky diode forward voltage drop.
1.5
----------------------------------
=
C
The power dissipation of inductor can be approximately
calculated by output current and DCR of inductor.
C
2π × R × f
C
p1
2
The equation above can also be simplified to:
P
= I × R
× 1.1
inductor
inductor_loss
O
C × R
O
L
---------------------
C
=
The actual junction temperature can be calculated
with power dissipation in the AOZ1017D and thermal
impedance from junction to ambient.
C
R
C
An easy-to-use application software which helps to
design and simulate the compensation loop can be found
at www.aosmd.com.
T
=
junction
(P
– P
– P
) × Θ + T
inductor_loss JA amb
total_loss
diode_loss
Rev. 1.1 April 2009
www.aosmd.com
Page 11 of 16
AOZ1017D
The maximum junction temperature of AOZ1017D is
150°C, which limits the maximum load current capability.
Please see the thermal de-rating curves for maximum
load current of the AOZ1017D under different ambient
temperatures.
3. A ground plane is preferred. If a ground plane is not
used, separate PGND from AGND and connect
them only at one point to avoid the PGND pin noise
coupling to the AGND pin.
4. Make the current trace from LX pins to L to C to the
O
PGND as short as possible.
The thermal performance of the AOZ1017D is strongly
affected by the PCB layout. Extra care should be taken
by users during design process to ensure that the IC
will operate under the recommended environmental
conditions.
5. Pour copper plane on all unused board area and
connect it to stable DC nodes, like V , GND or
IN
V
.
OUT
6. The two LX pins are connected to the internal PFET
drain. They are low resistance thermal conduction
path and most noisy switching node. Connecting a
copper plane to the LX pins will help thermal
dissipation. This copper plane should not be too
larger otherwise switching noise may be coupled to
other part of circuit.
Several layout tips are listed below for the best electric
and thermal performance. Figure 3 illustrates a PCB
layout example as reference.
1. Do not use thermal relief connection to the V and
IN
the PGND pin. Pour a maximized copper area to the
PGND pin and the V pin to help thermal dissipation.
7. Keep sensitive signal trace away from the LX pins.
IN
2. Input capacitor should be connected as close as
possible to the V pin and the PGND pin.
IN
Figure 3. AOZ1017D (DFN-8) PCB Layout
Rev. 1.1 April 2009
www.aosmd.com
Page 12 of 16
AOZ1017D
Package Dimensions, 5x4 DFN-8
D
A
Pin #1 IDA
L
e
D/2
B
1
E/2
R
E
E3
E2
Index Area
(D/2 x E/2)
D2
D3
L1
aaa C
ccc C
A
A3
C
Seating
Plane
ddd C
A1
b
C A B
bbb
Dimensions in millimeters
Dimensions in inches
Symbols Min. Nom. Max.
Symbols Min.
Nom. Max.
A
A1
A3
b
0.80
0.00
0.90
0.02
1.00
0.05
A
A1
A3
b
0.031 0.035 0.039
0.000 0.001 0.002
0.008 REF
Recommended Land Pattern
0.20 REF
0.40
2.125
1.775
0.35
0.45
0.014 0.016 0.018
0.197 BSC
0.6
D
5.00 BSC
D
D2
D3
E
1.975 2.125 2.225
1.625 1.775 1.875
4.00 BSC
D2
D3
E
0.078 0.084 0.088
0.064 0.070 0.074
0.157 BSC
2.7
2.2
E2
E3
e
2.500 2.650 2.750
2.050 2.200 2.300
0.95 BSC
E2
E3
e
0.098 0.104 0.108
0.081 0.087 0.091
0.037 BSC
0.8
0.5
0.95
L
0.600 0.700 0.800
0.400 0.500 0.600
0.30 REF
L
0.024 0.028 0.031
0.016 0.020 0.024
0.012 REF
Unit: mm
L1
R
L1
R
aaa
bbb
ccc
ddd
–
–
–
–
0.15
0.10
0.10
0.08
–
–
–
–
aaa
bbb
ccc
ddd
–
–
–
–
0.006
0.004
0.004
0.003
–
–
–
–
Notes:
1. Dimensions and tolerancing conform to ASME Y14.5M-1994.
2. All dimensions are in millimeters.
3. The location of the terminal #1 identifier and terminal numbering convention conforms to JEDEC publication 95 SP-002.
4. Dimension b applies to metallized terminal and is measured between 0.15mm and 0.30mm from the terminal tip. If the terminal has the
optional radius on the other end of the terminal, the dimension b should not be measured in that radius area.
5. Coplanarity applies to the terminals and all other bottom surface metallization.
6. Drawing shown are for illustration only.
Rev. 1.1 April 2009
www.aosmd.com
Page 13 of 16
AOZ1017D
Tape Dimensions, 5x4 DFN-8
Tape
0.20
T
D1
E1
E2
D0
E
B0
Feeding
Direction
K0
P0
A0
Unit: mm
Package
A0
B0
K0
D0
D1
E
E1
E2
P0
P1
P2
T
1.50
Min.
Typ.
1.50
DFN 5x4
(12 mm)
5.30
0.10
4.30
0.10
1.20
0.10
12.00
0.30
1.75
0.10
5.50
0.10
8.00
0.10
4.00
0.20
2.00
0.10
0.30
0.05
+0.10 / –0
Leader/Trailer and Orientation
Trailer Tape
(300mm Min.)
Components Tape
Orientation in Pocket
Leader Tape
(500mm Min.)
Rev. 1.1 April 2009
www.aosmd.com
Page 14 of 16
AOZ1017D
Reel Dimensions, 5x4 DFN-8
II
I
6.0 1
M
I
Zoom In
R1
P
B
W1
III
Zoom In
3-1.8
0.05
II
Zoom In
A
N=ø100 ꢀ
3-ø1/4"
A A
1.8
6.0
6.45 0.05
6.ꢀ
0.00
-0.05
8.00
R1
ꢀ.ꢀ0
ꢀ.00
8.9 0.1
14 REF
5.0
C
1.8
1ꢀ REF
11.90
46.0 0.1
44.5 0.1
41.5 REF
43.00
3.3
4.0
44.5 0.1
6.50
6.10
40°
10.0
VIEW: C
ꢀ.5
1.80
0.80
3.00
A
8.0 0.1
+0.05
0.00
ꢀ.00
6.50
8.00
10.71
6°
Rev. 1.1 April 2009
www.aosmd.com
Page 15 of 16
AOZ1017D
AOZ1017D Package Marking
Z1017DI
FAYWLT
Part Number Code
Underscore Denotes Green Product
Assembly Lot Code
Fab & Assembly Location
Year & Week Code
LIFE SUPPORT POLICY
ALPHA & OMEGA SEMICONDUCTOR PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body or (b) support or sustain life, and (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of
the user.
2. A critical component in any component of a life
support, device, or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
Rev. 1.1 April 2009
www.aosmd.com
Page 16 of 16
相关型号：
©2020 ICPDF网 联系我们和版权申明